1# Copyright 2023 NXP
2# SPDX-License-Identifier: Apache-2.0
3
4# Common fields for panel timings
5# inherited from Linux panel bindings.
6
7description: |
8  Common timing settings for display panels. These timings can be added to
9  a panel under display-timings node. For example:
10
11  &lcdif {
12    display-timings {
13      compatible = "zephyr,panel-timing";
14      hsync-len = <8>;
15      hfront-porch = <32>;
16      hback-porch = <32>;
17      vsync-len = <2>;
18      vfront-porch = <16>;
19      vback-porch = <14>;
20      hsync-active = <0>;
21      vsync-active = <0>;
22      de-active = <1>;
23      pixelclk-active = <0>;
24      clock-frequency = <62346240>;
25    };
26  };
27
28compatible: "zephyr,panel-timing"
29
30properties:
31  clock-frequency:
32    type: int
33    description: |
34      Pixel clock for display controller in Hz. Must be at least as large as:
35      (height + vsync-len + vfront-porch + vback-porch) *
36      (width + hsync-len + hfront-porch + hback-porch) *
37      desired frame rate
38
39  hsync-len:
40    type: int
41    required: true
42    description: |
43      Horizontal synchronization pulse duration of panel driven by this
44      controller, in pixels
45
46  vsync-len:
47    type: int
48    required: true
49    description: |
50      Vertical synchronization pulse duration of panel driven by this
51      controller, in lines
52
53  hback-porch:
54    type: int
55    required: true
56    description: |
57      Horizontal back porch duration of panel driven by this controller,
58      in pixels
59
60  vback-porch:
61    type: int
62    required: true
63    description: |
64      Vertical back porch duration of panel driven by this controller, in lines
65
66  hfront-porch:
67    type: int
68    required: true
69    description: |
70      Horizontal front porch duration of panel driven by this controller,
71      in pixels
72
73  vfront-porch:
74    type: int
75    required: true
76    description: |
77      Vertical front porch duration of panel driven by this controller, in lines
78
79  hsync-active:
80    type: int
81    required: true
82    enum:
83      - 0
84      - 1
85    description: |
86      Polarity of horizontal sync pulse
87      0 selects active low
88      1 selects active high
89
90  vsync-active:
91    type: int
92    required: true
93    enum:
94      - 0
95      - 1
96    description: |
97      Polarity of vertical sync pulse
98      0 selects active low
99      1 selects active high
100
101  de-active:
102    type: int
103    required: true
104    enum:
105      - 0
106      - 1
107    description: |
108      Polarity of data enable, sent with each horizontal interval.
109      0 selects active low
110      1 selects active high.
111
112  pixelclk-active:
113    type: int
114    required: true
115    enum:
116      - 0
117      - 1
118    description: |
119      Polarity of pixel clock. Selects which edge to drive data to display on.
120      0 drives pixel data on falling edge, and samples on rising edge.
121      1 drives pixel data on rising edge, and samples data on falling edge
122
123  syncclk-active:
124    type: int
125    enum:
126      - 0
127      - 1
128    description: |
129      Drive sync on rising or sample sync on falling edge. If not specified
130      then the controller uses the setup specified by pixelclk-active.
131      Use 0 to drive sync on falling edge
132      and sample sync on rising edge of pixel clock.
133      Use 1 to drive sync on rising edge
134      and sample sync on falling edge of pixel clock.
135