1# Copyright (c) 2023 Antmicro <www.antmicro.com> 2# SPDX-License-Identifier: Apache-2.0 3 4description: | 5 The Ambiq Apollo4 pin controller is a node responsible for controlling 6 pin function selection and pin properties, such as routing a UART0 TX 7 to pin 60 and enabling the pullup resistor on that pin. 8 9 The node has the 'pinctrl' node label set in your SoC's devicetree, 10 so you can modify it like this: 11 12 &pinctrl { 13 /* your modifications go here */ 14 }; 15 16 All device pin configurations should be placed in child nodes of the 17 'pinctrl' node, as shown in this example: 18 19 /* You can put this in places like a board-pinctrl.dtsi file in 20 * your board directory, or a devicetree overlay in your application. 21 */ 22 23 /* include pre-defined combinations for the SoC variant used by the board */ 24 #include <dt-bindings/pinctrl/ambiq-apollo4-pinctrl.h> 25 26 &pinctrl { 27 uart0_default: uart0_default { 28 group1 { 29 pinmux = <UART0TX_P60>; 30 }; 31 group2 { 32 pinmux = <UART0RX_P47>; 33 input-enable; 34 }; 35 }; 36 }; 37 38 The 'uart0_default' child node encodes the pin configurations for a 39 particular state of a device; in this case, the default (that is, active) 40 state. 41 42 As shown, pin configurations are organized in groups within each child node. 43 Each group can specify a list of pin function selections in the 'pinmux' 44 property. 45 46 A group can also specify shared pin properties common to all the specified 47 pins, such as the 'input-enable' property in group 2. 48 49compatible: "ambiq,apollo4-pinctrl" 50 51include: base.yaml 52 53child-binding: 54 description: | 55 Definitions for a pinctrl state. 56 child-binding: 57 58 include: 59 - name: pincfg-node.yaml 60 property-allowlist: 61 - input-enable 62 - drive-push-pull 63 - drive-open-drain 64 - bias-high-impedance 65 - bias-pull-up 66 - bias-pull-down 67 68 properties: 69 pinmux: 70 required: true 71 type: array 72 description: | 73 An array of pins sharing the same group properties. Each 74 element of the array is an integer constructed from the 75 pin number and the alternative function of the pin. 76 drive-strength: 77 type: string 78 enum: 79 - "0.1" 80 - "0.5" 81 - "0.75" 82 - "1.0" 83 default: "0.1" 84 description: | 85 The drive strength of a pin, relative to full-driver strength. 86 The default value is 0.1, which is the reset value. 87 slew-rate: 88 type: string 89 enum: 90 - "slow" 91 - "fast" 92 default: "slow" 93 description: | 94 Select slew rate for a pin. The default is slow, which is the reset value. 95 ambiq,pull-up-ohms: 96 type: int 97 enum: 98 - 1500 99 - 6000 100 - 12000 101 - 24000 102 - 50000 103 - 100000 104 default: 1500 105 description: | 106 The pullup resistor value. The default value is 1500 ohms. 107 ambiq,iom-nce-module: 108 type: int 109 default: 0 110 description: | 111 IOM nCE module select, selects the SPI channel (CE) number (0-42). 112 0, IOM0CE0 : IOM 0 NCE 0 module 113 1, IOM0CE1 : IOM 0 NCE 1 module 114 2, IOM0CE2 : IOM 0 NCE 2 module 115 3, IOM0CE3 : IOM 0 NCE 3 module 116 4, IOM1CE0 : IOM 1 NCE 0 module 117 5, IOM1CE1 : IOM 1 NCE 1 module 118 6, IOM1CE2 : IOM 1 NCE 2 module 119 7, IOM1CE3 : IOM 1 NCE 3 module 120 8, IOM2CE0 : IOM 2 NCE 0 module 121 9, IOM2CE1 : IOM 2 NCE 1 module 122 10, IOM2CE2 : IOM 2 NCE 2 module 123 11, IOM2CE3 : IOM 2 NCE 3 module 124 12, IOM3CE0 : IOM 3 NCE 0 module 125 13, IOM3CE1 : IOM 3 NCE 1 module 126 14, IOM3CE2 : IOM 3 NCE 2 module 127 15, IOM3CE3 : IOM 3 NCE 3 module 128 16, IOM4CE0 : IOM 4 NCE 0 module 129 17, IOM4CE1 : IOM 4 NCE 1 module 130 18, IOM4CE2 : IOM 4 NCE 2 module 131 19, IOM4CE3 : IOM 4 NCE 3 module 132 20, IOM5CE0 : IOM 5 NCE 0 module 133 21, IOM5CE1 : IOM 5 NCE 1 module 134 22, IOM5CE2 : IOM 5 NCE 2 module 135 23, IOM5CE3 : IOM 5 NCE 3 module 136 24, IOM6CE0 : IOM 6 NCE 0 module 137 25, IOM6CE1 : IOM 6 NCE 1 module 138 26, IOM6CE2 : IOM 6 NCE 2 module 139 27, IOM6CE3 : IOM 6 NCE 3 module 140 28, IOM7CE0 : IOM 7 NCE 0 module 141 29, IOM7CE1 : IOM 7 NCE 1 module 142 30, IOM7CE2 : IOM 7 NCE 2 module 143 31, IOM7CE3 : IOM 7 NCE 3 module 144 32, MSPI0CEN0 : MSPI 0 NCE 0 module 145 33, MSPI0CEN1 : MSPI 0 NCE 1 module 146 34, MSPI1CEN0 : MSPI 1 NCE 0 module 147 35, MSPI1CEN1 : MSPI 1 NCE 1 module 148 36, MSPI2CEN0 : MSPI 2 NCE 0 module 149 37, MSPI2CEN1 : MSPI 2 NCE 1 module 150 38, DC_DPI_DE : DC DPI DE module 151 39, DISP_CONT_CSX : DISP CONT CSX module 152 40, DC_SPI_CS_N : DC SPI CS_N module 153 41, DC_QSPI_CS_N : DC QSPI CS_N module 154 42, DC_RESX : DC module RESX 155 If the pin is not a CE, this descriptor will be ignored. 156 Default value 0, which is the reset value. 157 ambiq,iom-mspi: 158 type: int 159 default: 0 160 description: | 161 Indicates the module which uses specific CE pin, 1 if CE is IOM, 0 if MSPI. 162 Default value 0, which is the reset value. 163 If the pin is not a CE, this descriptor will be ignored. 164 ambiq,iom-num: 165 type: int 166 default: 0 167 description: | 168 Indicates the instance which uses specific CE pin. 169 IOM number (0-7) or MSPI (0-2). 170 Default value 0, which is the reset value. 171 If the pin is not a CE, this descriptor will be ignored. 172 ambiq,interrupt-direction: 173 type: int 174 default: 0 175 description: | 176 Indicates the pininterrupt direction. 177 Default value 0, which is the reset value. 178