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/Zephyr-latest/dts/bindings/clock/
Dst,stm32-clock-mco.yaml4 # SPDX-License-Identifier: Apache-2.0
7 compatible: "st,stm32-clock-mco"
10 STM32 Microcontroller Clock Output (MCO)
12 Used to output a clock signal from the MCU to a GPIO pin.
13 The selected signal goes through a configurable prescaler before output.
19 pinctrl-0 = <&rcc_mco_pa8>;
20 pinctrl-names = "default";
24 include: [base.yaml, pinctrl-device.yaml]
35 pinctrl-0:
38 pinctrl-names:
Dlitex,clk.yaml2 # SPDX-License-Identifier: Apache-2.0
4 include: [clock-controller.yaml, base.yaml]
7 LiteX Mixed Mode Clock Manager
8 Common clock driver with MMCM unit for dynamic reconfiguration
9 of up to 7 clock outputs with ability to change frequency, duty
14 clock-cells:
15 - id
22 "#clock-cells":
26 clock-output-names:
28 type: string-array
[all …]
Dlitex,clkout.yaml2 # SPDX-License-Identifier: Apache-2.0
7 LiteX Mixed Mode Clock Manager clock output binding
13 "#clock-cells":
17 Number of cells in a clock specifier;
18 Typically 0 for nodes with a single clock output
19 and 1 for nodes with multiple clock outputs.
22 clock-output-names:
26 string of clock output signal name.
28 litex,clock-frequency:
32 default frequency in Hz for clock output
[all …]
Dst,stm32f1-clock-mco.yaml4 # SPDX-License-Identifier: Apache-2.0
7 compatible: "st,stm32f1-clock-mco"
10 STM32 F1 series Microcontroller Clock Output (MCO)
13 prescaler before the output. However, note that certain inputs of
15 output a slowed down variation of certain clocks.
20 pinctrl-0 = <&rcc_mco_pa8>;
21 pinctrl-names = "default";
25 Note: in the `clocks` property, the domain clock source cell should
26 use the value representing the base clock, regardless of whether or
30 /* PLL3 clock divided by 2 */
[all …]
Dambiq,clkctrl.yaml2 # SPDX-License-Identifier: Apache-2.0
4 description: Ambiq Apollo Series SoC Clock Controller
8 include: [clock-controller.yaml, pinctrl-device.yaml, base.yaml]
11 clock-frequency:
13 description: output clock frequency (Hz)
16 pinctrl-0:
19 pinctrl-names:
22 "#clock-cells":
/Zephyr-latest/samples/drivers/led/pwm/boards/
Dmec172xevb_assy6906.overlay4 * SPDX-License-Identifier: Apache-2.0
7 #include <zephyr/dt-bindings/pwm/pwm.h>
10 * BBLED controller 0 uses GPIO156/LED1 connected to JP71-11
11 * BBLED controller 1 uses GPIO157/LED2 connected to JP71-13
12 * BBLED controller 2 uses GPIO153/LED3 connected to JP71-5
13 * BBLED controller 3 uses GPIO035/PWM8 connected to JP67-19
16 * BBLED hardware divides input clock (32KHz or 48MHz) by (256 * (prescalar+1)
17 * and implements duty cycle for blink mode as an 8-bit value where 0 is off and
18 * 255 full on. BBLED PWM is 8-bit.
19 * BBLED-PWM driver get cycles API reports 32KHz/256 or 48M/256.
[all …]
Dmec15xxevb_assy6853.overlay4 * SPDX-License-Identifier: Apache-2.0
7 #include <zephyr/dt-bindings/pwm/pwm.h>
10 * BBLED controller 0 uses GPIO156/LED0 connected to JP31-13
11 * BBLED controller 1 uses GPIO157/LED1 connected to JP31-15
12 * BBLED controller 2 uses GPIO153/LED2 connected to JP31-17
14 * BBLED hardware divides input clock (32KHz or 48MHz) by (256 * (prescalar+1)
15 * and implements duty cycle for blink mode as an 8-bit value where 0 is off and
16 * 255 full on. BBLED PWM is 8-bit.
17 * BBLED-PWM driver get cycles API reports 32KHz/256 or 48M/256.
24 compatible = "pwm-leds";
[all …]
/Zephyr-latest/boards/ite/it82xx2_evb/
Dit82xx2_evb.dts3 * SPDX-License-Identifier: Apache-2.0
6 /dts-v1/;
8 #include <zephyr/dt-bindings/gpio/gpio.h>
10 #include <ite/it8xxx2-pinctrl-map.dtsi>
13 model = "IT82XX2 EV-Board";
14 compatible = "ite,it82xx2-evb";
17 i2c-0 = &i2c0;
18 peci-0 = &peci0;
22 pwm-0 = &pwm0;
27 zephyr,shell-uart = &uart1;
[all …]
/Zephyr-latest/boards/ite/it8xxx2_evb/
Dit8xxx2_evb.dts3 * SPDX-License-Identifier: Apache-2.0
6 /dts-v1/;
8 #include <zephyr/dt-bindings/gpio/gpio.h>
10 #include <ite/it8xxx2-pinctrl-map.dtsi>
13 model = "IT8XXX2 EV-Board";
14 compatible = "ite,it8xxx2-evb";
17 i2c-0 = &i2c0;
18 peci-0 = &peci0;
22 pwm-0 = &pwm0;
27 zephyr,shell-uart = &uart1;
[all …]
/Zephyr-latest/dts/riscv/
Driscv32-litex-vexriscv.dtsi2 * Copyright (c) 2018 - 2020 Antmicro <www.antmicro.com>
4 * SPDX-License-Identifier: Apache-2.0
7 #include <zephyr/dt-bindings/i2c/i2c.h>
10 #address-cells = <1>;
11 #size-cells = <1>;
12 compatible = "litex,vexriscv", "litex-dev";
21 #address-cells = <1>;
22 #size-cells = <0>;
24 clock-frequency = <100000000>;
25 compatible = "litex,vexriscv-standard", "riscv";
[all …]
/Zephyr-latest/boards/microchip/mec172xmodular_assy6930/
Dmec172xmodular_assy6930.dts4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
10 #include <microchip/mec172x/mec172xnsz-pinctrl.dtsi>
28 pwm-0 = &pwm0;
32 compatible = "gpio-leds";
49 clock-frequency = <96000000>;
77 current-speed = <115200>;
78 pinctrl-0 = <&uart1_tx_gpio170 &uart1_rx_gpio171>;
79 pinctrl-names = "default";
84 pinctrl-0 = <&adc00_gpio200 &adc03_gpio203
[all …]
/Zephyr-latest/boards/google/dragonclaw/
Dgoogle_dragonclaw.dts4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
10 #include <st/f4/stm32f412c(e-g)ux-pinctrl.dtsi>
14 compatible = "google,dragonclaw-fpmcu";
18 zephyr,shell-uart = &usart2;
21 zephyr,flash-controller = &flash;
26 /* HSI clock frequency is 16MHz */
31 /* LSI clock frequency is 32768kHz */
36 div-m = <8>;
37 mul-n = <192>; /* 16MHz * 192/8 = 384MHz VCO clock */
[all …]
/Zephyr-latest/boards/microchip/mec172xevb_assy6906/
Dmec172xevb_assy6906.dts4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
10 #include <microchip/mec172x/mec172xnsz-pinctrl.dtsi>
26 i2c-0 = &i2c_smb_0;
29 pwm-0 = &pwm0;
34 compatible = "gpio-leds";
53 clock-frequency = <96000000>;
81 current-speed = <115200>;
82 pinctrl-0 = <&uart1_tx_gpio170 &uart1_rx_gpio171>;
83 pinctrl-names = "default";
[all …]
/Zephyr-latest/samples/boards/st/mco/boards/
Dnucleo_f429zi.overlay1 /* The clock that is output must be enabled. */
7 * 0b010: HSE clock selected
20 pinctrl-0 = <&rcc_mco_1_pa8>;
21 pinctrl-names = "default";
29 pinctrl-0 = <&rcc_mco_2_pc9>;
30 pinctrl-names = "default";
Dstm32f746g_disco.overlay1 /* The clock that is output must be enabled. */
19 pinctrl-0 = <&rcc_mco_1_pa8>; /* D10 (CN7) */
20 pinctrl-names = "default";
24 * 0b10: HSE oscillator clock selected
32 pinctrl-0 = <&rcc_mco_2_pc9>; /* uSD_D1 (CN3 pin 8) */
33 pinctrl-names = "default";
Dnucleo_u5a5zj_q.overlay1 /* The clock that is output must be enabled. */
7 * 0b0111: LSE clock selected
15 pinctrl-0 = <&rcc_mco_pa8>;
16 pinctrl-names = "default";
/Zephyr-latest/dts/bindings/i2s/
Dst,stm32-i2s-common.yaml2 # SPDX-License-Identifier: Apache-2.0
6 include: [i2s-controller.yaml, pinctrl-device.yaml]
18 dma-names:
21 pinctrl-0:
24 pinctrl-names:
27 mck-enabled:
30 Master Clock Output function.
31 An mck pin must be listed within pinctrl-0 when enabling this property.
/Zephyr-latest/dts/bindings/pwm/
Despressif,esp32-mcpwm.yaml2 # SPDX-License-Identifier: Apache-2.0
13 Each MCPWM peripheral has one clock divider (prescaler), three PWM timers, three PWM operators,
25 Channel 0 -> Timer 0, Operator 0, output PWM0A
26 Channel 1 -> Timer 0, Operator 0, output PWM0B
27 Channel 2 -> Timer 1, Operator 1, output PWM1A
28 Channel 3 -> Timer 1, Operator 1, output PWM1B
29 Channel 4 -> Timer 2, Operator 2, output PWM2A
30 Channel 5 -> Timer 2, Operator 2, output PWM2B
31 Channel 6 -> Capture 0
32 Channel 7 -> Capture 1
[all …]
/Zephyr-latest/boards/st/nucleo_wl55jc/
Dnucleo_wl55jc.dts2 * Copyright (c) 2020-2024 STMicroelectronics
4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
9 #include <st/wl/stm32wl55jcix-pinctrl.dtsi>
12 #include <zephyr/dt-bindings/input/input-event-codes.h>
15 model = "STMicroelectronics STM32WL55JC-NUCLEO board";
16 compatible = "st,stm32wl55-nucleo";
20 zephyr,shell-uart = &lpuart1;
23 zephyr,code-partition = &slot0_partition;
27 compatible = "gpio-leds";
[all …]
/Zephyr-latest/boards/st/stm32f3_disco/
Dstm32f3_disco.dts2 * Copyright (c) 2017 I-SENSE group of ICCS
4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
9 #include <st/f3/stm32f303v(b-c)tx-pinctrl.dtsi>
10 #include <zephyr/dt-bindings/input/input-event-codes.h>
18 zephyr,shell-uart = &usart1;
25 compatible = "gpio-leds";
61 compatible = "gpio-keys";
76 die-temp0 = &die_temp;
77 volt-sensor0 = &vref;
[all …]
/Zephyr-latest/boards/arduino/nicla_vision/
Darduino_nicla_vision_stm32h747xx_m7.dts4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
9 #include <st/h7/stm32h747a(g-i)ix-pinctrl.dtsi>
10 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
15 compatible = "arduino,nicla-vision";
19 zephyr,shell-uart = &lpuart1;
20 zephyr,uart-mcumgr = &lpuart1;
21 zephyr,bt-hci = &bt_hci_uart;
24 zephyr,code-partition = &slot0_partition;
34 compatible = "usb-ulpi-phy";
[all …]
/Zephyr-latest/boards/witte/linum/
Dlinum.dts4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
9 #include <st/h7/stm32h753bitx-pinctrl.dtsi>
10 #include <zephyr/dt-bindings/input/input-event-codes.h>
18 zephyr,shell-uart = &usart1;
22 zephyr,code-partition = &slot0_partition;
27 compatible = "zephyr,memory-region", "mmio-sram";
30 zephyr,memory-region = "SDRAM1";
31 zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_RAM) )>;
35 compatible = "gpio-leds";
[all …]
/Zephyr-latest/boards/adafruit/qt_py_rp2040/
Dadafruit_qt_py_rp2040.dts5 * SPDX-License-Identifier: Apache-2.0
8 /dts-v1/;
11 #include "adafruit_qt_py_rp2040-pinctrl.dtsi"
14 #include <zephyr/dt-bindings/led/led.h>
20 zephyr,flash-controller = &ssi;
22 zephyr,shell-uart = &uart1;
23 zephyr,code-partition = &code_partition;
28 led-strip = &ws2812;
36 compatible = "fixed-partitions";
37 #address-cells = <1>;
[all …]
/Zephyr-latest/tests/drivers/spi/spi_loopback/boards/
Ds32z2xxdc2_s32z270_rtu0.overlay4 * SPDX-License-Identifier: Apache-2.0
11 output-enable;
15 input-enable;
21 pinctrl-0 = <&spi0_default>;
22 pinctrl-names = "default";
23 clock-frequency = <100000000>;
27 compatible = "test-spi-loopback-slow";
29 spi-max-frequency = <500000>;
33 compatible = "test-spi-loopback-fast";
35 spi-max-frequency = <16000000>;
Ds32z2xxdc2_s32z270_rtu1.overlay4 * SPDX-License-Identifier: Apache-2.0
11 output-enable;
15 input-enable;
21 pinctrl-0 = <&spi0_default>;
22 pinctrl-names = "default";
23 clock-frequency = <100000000>;
27 compatible = "test-spi-loopback-slow";
29 spi-max-frequency = <500000>;
33 compatible = "test-spi-loopback-fast";
35 spi-max-frequency = <16000000>;

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