Searched +full:adsp +full:- +full:clkctl +full:- +full:freq +full:- +full:default (Results 1 – 7 of 7) sorted by relevance
| /Zephyr-latest/dts/bindings/clock/ |
| D | intel,adsp-shim-clkctl.yaml | 2 # SPDX-License-Identifier: Apache-2.0
4 description: Intel ADSP clock controlling related constants.
6 compatible: "intel,adsp-shim-clkctl"
9 adsp-clkctl-clk-wovcro:
12 Index of WOVCRO clock encoding in the encoding array (if wovcro-supported is true).
14 adsp-clkctl-clk-lpro:
18 adsp-clkctl-clk-hpro:
22 adsp-clkctl-clk-ipll:
26 adsp-clkctl-freq-enc:
31 adsp-clkctl-freq-mask:
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| /Zephyr-latest/dts/xtensa/intel/ |
| D | intel_adsp_cavs25_tgph.dtsi | 4 * SPDX-License-Identifier: Apache-2.0
12 #address-cells = <1>;
13 #size-cells = <0>;
17 compatible = "cdns,tensilica-xtensa-lx6";
19 cpu-power-states = <&d3>;
20 i-cache-line-size = <64>;
21 d-cache-line-size = <64>;
26 compatible = "cdns,tensilica-xtensa-lx6";
28 cpu-power-states = <&d3>;
31 power-states {
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| D | intel_adsp_cavs25.dtsi | 4 * SPDX-License-Identifier: Apache-2.0
12 #address-cells = <1>;
13 #size-cells = <0>;
17 compatible = "cdns,tensilica-xtensa-lx6";
19 cpu-power-states = <&d3>;
20 i-cache-line-size = <64>;
21 d-cache-line-size = <64>;
26 compatible = "cdns,tensilica-xtensa-lx6";
28 cpu-power-states = <&d3>;
33 compatible = "cdns,tensilica-xtensa-lx6";
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| D | intel_adsp_ace20_lnl.dtsi | 4 * SPDX-License-Identifier: Apache-2.0
12 #address-cells = <1>;
13 #size-cells = <0>;
17 compatible = "cdns,tensilica-xtensa-lx7";
19 cpu-power-states = <&d0i3 &d3>;
20 i-cache-line-size = <64>;
21 d-cache-line-size = <64>;
26 compatible = "cdns,tensilica-xtensa-lx7";
28 cpu-power-states = <&d0i3 &d3>;
33 compatible = "cdns,tensilica-xtensa-lx7";
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| D | intel_adsp_ace15_mtpm.dtsi | 4 * SPDX-License-Identifier: Apache-2.0
12 #address-cells = <1>;
13 #size-cells = <0>;
17 compatible = "cdns,tensilica-xtensa-lx7";
19 cpu-power-states = <&d0i3 &d3>;
20 i-cache-line-size = <64>;
21 d-cache-line-size = <64>;
26 compatible = "cdns,tensilica-xtensa-lx7";
28 cpu-power-states = <&d3>;
33 compatible = "cdns,tensilica-xtensa-lx7";
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| D | intel_adsp_ace30_ptl.dtsi | 4 * SPDX-License-Identifier: Apache-2.0
12 #address-cells = <1>;
13 #size-cells = <0>;
17 compatible = "cdns,tensilica-xtensa-lx7";
19 cpu-power-states = <&d0i3 &d3>;
20 i-cache-line-size = <64>;
21 d-cache-line-size = <64>;
26 compatible = "cdns,tensilica-xtensa-lx7";
28 cpu-power-states = <&d0i3 &d3>;
33 compatible = "cdns,tensilica-xtensa-lx7";
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| D | intel_adsp_ace30.dtsi | 4 * SPDX-License-Identifier: Apache-2.0
12 #address-cells = <1>;
13 #size-cells = <0>;
17 compatible = "cdns,tensilica-xtensa-lx7";
19 cpu-power-states = <&d0i3 &d3>;
20 i-cache-line-size = <64>;
21 d-cache-line-size = <64>;
26 compatible = "cdns,tensilica-xtensa-lx7";
28 cpu-power-states = <&d0i3 &d3>;
33 compatible = "cdns,tensilica-xtensa-lx7";
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