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/Zephyr-latest/dts/arm/st/l4/
Dstm32l4r5Xi.dtsi22 wkup-pin@1 {
23 wkup-gpios = <&gpioa 0 STM32_PWR_WKUP_PIN_SRC_0>;
26 wkup-pin@2 {
27 wkup-gpios = <&gpioc 13 STM32_PWR_WKUP_PIN_SRC_0>;
30 wkup-pin@3 {
31 wkup-gpios = <&gpioe 6 STM32_PWR_WKUP_PIN_SRC_0>;
34 wkup-pin@4 {
35 wkup-gpios = <&gpioa 2 STM32_PWR_WKUP_PIN_SRC_0>;
38 wkup-pin@5 {
39 wkup-gpios = <&gpioc 5 STM32_PWR_WKUP_PIN_SRC_0>;
Dstm32l4.dtsi488 wkup-pins-nb = <5>; /* 5 system wake-up pins */
489 wkup-pins-pol;
490 wkup-pins-pupd;
495 wkup-pin@1 {
499 wkup-pin@2 {
503 wkup-pin@3 {
507 wkup-pin@4 {
511 wkup-pin@5 {
/Zephyr-latest/dts/arm/st/wb/
Dstm32wb55Xg.dtsi25 wkup-pin@2 {
27 wkup-gpios = <&gpioc 13 STM32_PWR_WKUP_PIN_SRC_0>;
30 wkup-pin@3 {
32 wkup-gpios = <&gpioc 12 STM32_PWR_WKUP_PIN_SRC_0>;
35 wkup-pin@5 {
37 wkup-gpios = <&gpioc 5 STM32_PWR_WKUP_PIN_SRC_0>;
Dstm32wb.dtsi528 wkup-pins-nb = <5>; /* 5 system wake-up pins */
529 wkup-pins-pol;
530 wkup-pins-pupd;
535 wkup-pin@1 {
537 wkup-gpios = <&gpioa 0 STM32_PWR_WKUP_PIN_SRC_0>;
540 wkup-pin@4 {
542 wkup-gpios = <&gpioa 2 STM32_PWR_WKUP_PIN_SRC_0>;
/Zephyr-latest/dts/bindings/power/
Dst,stm32-pwr.yaml14 wkup-pins-nb:
18 For example wkup-pins-nb = <8>; on the stm32u5
20 wkup-pin-srcs:
30 wkup-pins-pol:
35 wkup-pins-pupd:
51 All nodes using this binding must be named "wkup-pin@[index]"
60 wkup-gpios:
67 wkup-gpios = <&gpiob 2 STM32_PWR_WKUP_PIN_SRC_1>, <...>;
/Zephyr-latest/samples/boards/st/power_mgmt/wkup_pins/
DREADME.rst14 Press the user button designated in boards's devicetree overlay as "wkup-src" to power it on again.
16 .. _gpio-as-a-wkup-pin-src-sample-requirements:
Dsample.yaml6 filter: dt_enabled_alias_with_parent_compat("wkup-src",
/Zephyr-latest/samples/boards/st/power_mgmt/wkup_pins/boards/
Dnucleo_l4r5zi.overlay9 wkup-src = &user_button;
Dnucleo_u575zi_q.overlay9 wkup-src = &user_button;
Dnucleo_u5a5zj_q.overlay9 wkup-src = &user_button;
Dnucleo_wl55jc.overlay9 wkup-src = &user_button_1;
/Zephyr-latest/dts/arm/st/u5/
Dstm32u5.dtsi869 wkup-pins-nb = <8>; /* 8 system wake-up pins */
870 wkup-pin-srcs = <3>; /* 3 gpio sources associated with each wkup pin */
871 wkup-pins-pol;
872 wkup-pins-pupd;
877 wkup-pin@1 {
879 wkup-gpios = <&gpioa 0 STM32_PWR_WKUP_PIN_SRC_0>,
884 wkup-pin@2 {
886 wkup-gpios = <&gpioa 4 STM32_PWR_WKUP_PIN_SRC_0>,
891 wkup-pin@3 {
893 wkup-gpios = <&gpioe 6 STM32_PWR_WKUP_PIN_SRC_0>,
[all …]
/Zephyr-latest/dts/arm/st/wl/
Dstm32wl.dtsi510 wkup-pins-nb = <3>; /* 3 system wake-up pins */
511 wkup-pins-pol;
512 wkup-pins-pupd;
517 wkup-pin@1 {
519 wkup-gpios = <&gpioa 0 STM32_PWR_WKUP_PIN_SRC_0>;
522 wkup-pin@2 {
524 wkup-gpios = <&gpioc 13 STM32_PWR_WKUP_PIN_SRC_0>;
527 wkup-pin@3 {
529 wkup-gpios = <&gpiob 3 STM32_PWR_WKUP_PIN_SRC_0>;
/Zephyr-latest/include/zephyr/dt-bindings/gpio/
Dstm32-gpio.h26 * in STM32 PWR devicetree node, through the property "wkup-gpios".
/Zephyr-latest/dts/arm/st/h7/
Dstm32h745.dtsi53 interrupt-names = "ep1_out", "ep1_in", "wkup", "otghs";
67 interrupt-names = "ep1_out", "ep1_in", "wkup", "otgfs";
Dstm32h743.dtsi36 interrupt-names = "ep1_out", "ep1_in", "wkup", "otgfs";
/Zephyr-latest/soc/st/stm32/common/
Dstm32_wkup_pins.c125 uint32_t pupd_cfg; /* pull-up/down config of GPIO port associated w/ this wkup pin */
286 /* Each wake-up pin on STM32U5 is associated with 4 wkup srcs, 3 of them correspond to GPIOs. */ in stm32_pwr_wkup_pin_cfg_gpio()
/Zephyr-latest/drivers/gpio/
Dgpio_smartbond.c25 /* GPIO P0 and P1 share single GPIO and WKUP peripheral instance with separate
412 DT_INST_REG_ADDR_BY_NAME(id, wkup), \
/Zephyr-latest/dts/arm/renesas/smartbond/
Dda1469x.dtsi201 reg-names = "data", "mode", "latch", "wkup";
214 reg-names = "data", "mode", "latch", "wkup";
/Zephyr-latest/boards/beagle/beaglebone_ai64/doc/
Dindex.rst13 MCU, WKUP). This document gives overview of Zephyr running on Cortex R5's
/Zephyr-latest/dts/arm/gd/gd32e50x/
Dgd32e50x.dtsi128 interrupt-names = "global", "wkup";
/Zephyr-latest/boards/olimex/olimexino_stm32/doc/
Dindex.rst205 | 3 | D2 | PA0 / WKUP / |