Home
last modified time | relevance | path

Searched full:ucpd (Results 1 – 21 of 21) sorted by relevance

/Zephyr-latest/drivers/usb_c/tcpc/
Ducpd_stm32_priv.h34 * @brief UCPD alert mask used for enabling alerts
43 * @brief UCPD alert mask used for clearing alerts
52 * @brief UCPD alert mask used for enabling alerts
62 * @brief UCPD alert mask used for clearing alerts
71 * @brief UCPD alert mask for all alerts
94 * @brief Map UCPD ANASUB value to TCPC RP value
96 * @param r UCPD ANASUB value
101 * @brief Map TCPC RP value to UCPD ANASUB value
108 * @brief Create value for writing to UCPD CR ANASUBMOD
113 * @brief UCPD VSTATE CCx open value when in source mode
[all …]
Ducpd_stm32.c26 * @brief UCPD TX ORDSET values
63 * @brief Apply the UCPD CC1 and CC2 pin configurations.
66 * when UCPDx is enabled, with CC1 and CC2 pin UCPD
416 * range of 0, 1, or 2. This range maps to 1, 2, or 3 in ucpd for in ucpd_set_cc()
649 /* Trigger ucpd peripheral to start pd message transmit */ in ucpd_start_transmit()
795 LOG_INF("ucpd: Failed to send GoodCRC!"); in ucpd_manage_tx()
797 LOG_INF("ucpd: GoodCRC message discarded!"); in ucpd_manage_tx()
881 * UCPD driver based on USB-PD rx messages. These 2 types of in ucpd_alert_handler()
884 * UCPD generated GoodCRC messages, are the priority path as in ucpd_alert_handler()
892 * of the ucpd transmitter, they are treated as a 3rd tx msg in ucpd_alert_handler()
[all …]
/Zephyr-latest/dts/arm/st/g0/
Dstm32g071.dtsi37 ucpd1: ucpd@4000a000 {
38 compatible = "st,stm32-ucpd";
45 ucpd2: ucpd@4000a400 {
46 compatible = "st,stm32-ucpd";
/Zephyr-latest/soc/st/stm32/stm32g0x/
Dsoc.c25 * @brief Disable the internal Pull-Up in Dead Battery pins of UCPD peripherals
27 * The internal Pull-Up in Dead Battery pins of UCPD peripherals are disabled,
28 * unless the UCPD driver and the corresponding peripheral is enabled. In that
91 /* Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral */ in soc_early_init_hook()
/Zephyr-latest/dts/bindings/tcpc/
Dst,stm32-ucpd.yaml8 compatible: "st,stm32-ucpd"
36 producing UCPD peripheral clock (ucpd_clk). It is recommended
/Zephyr-latest/dts/arm/st/u5/
Dstm32u545.dtsi13 /delete-node/ ucpd@4000dc00;
Dstm32u5.dtsi829 ucpd1: ucpd@4000dc00 {
830 compatible = "st,stm32-ucpd";
/Zephyr-latest/boards/st/b_g474e_dpow1/doc/
Dindex.rst60 | UCPD | on-chip | ucpd |
93 - UCPD CC2 : PB4
94 - UCPD CC1 : PB6
/Zephyr-latest/boards/st/stm32g081b_eval/doc/
Dindex.rst7 power delivery controller interfaces (UCPD), compliant with USB type-C r1.2
106 | UCPD | on-chip + ucpd |
/Zephyr-latest/boards/st/stm32g081b_eval/
Dstm32g081b_eval.dts164 * UCPD is fed directly from HSI which is @ 16MHz. The ucpd_clk goes to
195 * UCPD is fed directly from HSI which is @ 16MHz. The ucpd_clk goes to
/Zephyr-latest/boards/st/stm32g071b_disco/doc/
Dindex.rst67 | UCPD | on-chip | ucpd |
/Zephyr-latest/dts/bindings/usb-c/
Dusb-c-connector.yaml14 USB-C connector attached to a STM32 UCPD typec port controller, which has
/Zephyr-latest/boards/weact/stm32g431_core/doc/
Dindex.rst47 | UCPD | on-chip | ucpd |
/Zephyr-latest/boards/st/b_g474e_dpow1/
Db_g474e_dpow1.dts158 * UCPD is fed directly from HSI which is @ 16MHz. The ucpd_clk goes to
/Zephyr-latest/boards/st/stm32g071b_disco/
Dstm32g071b_disco.dts160 * UCPD is fed directly from HSI which is @ 16MHz. The ucpd_clk goes to
/Zephyr-latest/dts/arm/st/g4/
Dstm32g4.dtsi658 ucpd1: ucpd@4000a000 {
659 compatible = "st,stm32-ucpd";
/Zephyr-latest/boards/st/nucleo_g431rb/doc/
Dindex.rst75 - USB Type-C™ /USB power delivery controller (UCPD)
/Zephyr-latest/modules/
DKconfig.stm32807 (UCPD) LL module driver
/Zephyr-latest/dts/arm/st/l5/
Dstm32l5.dtsi702 ucpd1: ucpd@4000dc00 {
703 compatible = "st,stm32-ucpd";
/Zephyr-latest/boards/st/nucleo_g474re/doc/
Dindex.rst75 - USB Type-C™ /USB power delivery controller (UCPD)
/Zephyr-latest/doc/releases/
Drelease-notes-3.3.rst1920 - :dtcompatible:`st,stm32-ucpd`: