Searched full:rmii (Results 1 – 25 of 69) sorted by relevance
123
| /Zephyr-latest/dts/bindings/ethernet/ |
| D | infineon,xmc4xxx-ethernet.yaml | 28 description: Receive bit 0 (rxd0) signal GPIO connection. Used for RMII and MII interfaces.
38 description: Receive bit 1 (rxd1) signal GPIO connection. Used for RMII and MII interfaces.
59 rmii-rx-clk-port-ctrl:
62 If the RMII interface is used it connects GPIO to the rmii-clk signal.
75 If the RMII interface is used it connects GPIO to the Carrier Sense Data Valid (crs-dv)
96 description: Receive Error (rxer) signal GPIO connection. Used for MII and RMII interfaces.
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| D | silabs,gecko-ethernet.yaml | 26 # RMII interface location
27 location-rmii:
30 description: location of RMII pins, configuration defined as <location>
49 # RMII interface pins
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| D | microchip,ksz8081.yaml | 23 - "rmii"
24 - "rmii-25MHz"
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| D | ti,dp83825.yaml | 22 - "rmii"
23 - "rmii-25MHz"
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| D | espressif,esp32-eth.yaml | 18 GPIO to output RMII Clock.
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| D | davicom,dm8806-phy.yaml | 4 description: Davicom DM8806 Ethernet MAC and PHY with RMII interface
61 - "rmii"
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| D | ethernet-controller.yaml | 37 - "rmii"
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| D | atmel,gmac-common.yaml | 51 default: "rmii"
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| /Zephyr-latest/tests/drivers/build_all/ethernet/ |
| D | app.overlay | 50 microchip,interface-type = "rmii";
59 microchip,interface-type = "rmii";
68 microchip,interface-type = "rmii";
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| /Zephyr-latest/boards/espressif/esp32_ethernet_kit/doc/ |
| D | index.rst | 119 media-independent interface (RMII), a variant of the media-independent
207 RMII Clock Selection
210 The ethernet MAC and PHY under RMII working mode need a common 50 MHz
211 reference clock (i.e. RMII clock) that can be provided either externally,
216 For additional information on the RMII clock selection, please refer to
219 RMII Clock Sourced Externally by PHY
222 By default, the ESP32-Ethernet-Kit is configured to provide RMII clock for the
227 .. figure:: img/esp32-ethernet-kit-rmii-clk-from-phy.jpg
229 :alt: RMII Clock from IP101GRI PHY
232 RMII Clock from IP101GRI PHY
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| /Zephyr-latest/boards/nxp/mimxrt1180_evk/ |
| D | board.c | 14 /* RMII mode */ in board_early_init_hook()
17 /* Output reference clock for RMII */ in board_early_init_hook()
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| /Zephyr-latest/boards/nxp/rd_rw612_bga/ |
| D | rd_rw612_bga_rw612_ethernet.dts | 24 phy-connection-type = "rmii";
37 microchip,interface-type = "rmii";
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| /Zephyr-latest/drivers/ethernet/ |
| D | eth_gecko_priv.h | 72 struct soc_gpio_pin rmii[7]; member
107 /* RMII pins excluding reference clock, handled by board.c */
132 /* RMII reference clock is not included in RMII pin set
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| D | eth_gecko.c | 444 for (idx = 0; idx < ARRAY_SIZE(cfg->pin_list->rmii); idx++) { in eth_init_pins()
445 GPIO_PinModeSet(cfg->pin_list->rmii[idx].port, cfg->pin_list->rmii[idx].pin, in eth_init_pins()
446 cfg->pin_list->rmii[idx].mode, cfg->pin_list->rmii[idx].out); in eth_init_pins()
482 /* Enable global clock and RMII operation */ in eth_init()
654 .rmii = PIN_LIST_RMII
662 ARRAY_SIZE(pins_eth0.rmii),
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| /Zephyr-latest/boards/pjrc/teensy4/ |
| D | teensy41.dts | 42 phy-connection-type = "rmii";
56 ti,interface-type = "rmii";
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| /Zephyr-latest/boards/atmel/sam0/same54_xpro/doc/ |
| D | index.rst | 114 - GMAC RMII REFCK : PA14
115 - GMAC RMII TXEN : PA17
116 - GMAC RMII TXD0 : PA18
117 - GMAC RMII TXD1 : PA19
118 - GMAC RMII CRSDV : PC20
119 - GMAC RMII RXD0 : PA13
120 - GMAC RMII RXD1 : PA12
121 - GMAC RMII RXER : PA15
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| /Zephyr-latest/drivers/ethernet/phy/ |
| D | phy_dm8806_priv.h | 127 * MII/RevMII/RMII
132 * be configured as RMII
136 * is configured as RMII
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| /Zephyr-latest/drivers/ethernet/nxp_enet/ |
| D | Kconfig | 132 bool "RMII clock from external sources"
134 Setting this option will configure MCUX clock block to feed RMII
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| /Zephyr-latest/boards/silabs/radio_boards/slwrb4321a/ |
| D | board.c | 32 /* enable CMU_CLK2 as RMII reference clock */ in efm32gg_slwstk6121a_init()
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| D | slwrb4321a.dts | 131 /* RMII interface pins */
132 location-rmii = <GECKO_LOCATION(0)>;
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| /Zephyr-latest/boards/infineon/xmc45_relax_kit/ |
| D | xmc45_relax_kit.dts | 148 rmii-rx-clk-port-ctrl = "P15_8";
151 phy-connection-type = "rmii";
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| /Zephyr-latest/boards/silabs/starter_kits/slstk3701a/ |
| D | slstk3701a.dts | 162 /* RMII interface pins */
163 location-rmii = <GECKO_LOCATION(1)>;
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| D | board.c | 41 /* enable CMU_CLK2 as RMII reference clock */ in efm32gg_stk3701a_init()
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| /Zephyr-latest/boards/infineon/xmc47_relax_kit/ |
| D | xmc47_relax_kit.dts | 186 rmii-rx-clk-port-ctrl = "P15_8";
189 phy-connection-type = "rmii";
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| /Zephyr-latest/boards/nxp/mimxrt1160_evk/ |
| D | mimxrt1160_evk.dtsi | 142 phy-connection-type = "rmii";
156 microchip,interface-type = "rmii";
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