1 /* 2 * Copyright 2024 NXP 3 * SPDX-License-Identifier: Apache-2.0 4 */ 5 6 #include <zephyr/devicetree.h> 7 #include <zephyr/platform/hooks.h> 8 #include <soc.h> 9 10 #if CONFIG_BOARD_EARLY_INIT_HOOK board_early_init_hook(void)11void board_early_init_hook(void) 12 { 13 #if defined(CONFIG_ETH_NXP_IMX_NETC) && (DT_CHILD_NUM_STATUS_OKAY(DT_NODELABEL(netc)) != 0) 14 /* RMII mode */ 15 BLK_CTRL_WAKEUPMIX->NETC_LINK_CFG[4] = BLK_CTRL_WAKEUPMIX_NETC_LINK_CFG_MII_PROT(1); 16 17 /* Output reference clock for RMII */ 18 BLK_CTRL_WAKEUPMIX->NETC_PORT_MISC_CFG |= 19 BLK_CTRL_WAKEUPMIX_NETC_PORT_MISC_CFG_PORT4_RMII_REF_CLK_DIR_MASK; 20 21 /* Unlock the IERB. It will warm reset whole NETC. */ 22 NETC_PRIV->NETCRR &= ~NETC_PRIV_NETCRR_LOCK_MASK; 23 24 while ((NETC_PRIV->NETCRR & NETC_PRIV_NETCRR_LOCK_MASK) != 0U) { 25 } 26 27 /* Set the access attribute, otherwise MSIX access will be blocked. */ 28 NETC_IERB->ARRAY_NUM_RC[0].RCMSIAMQR &= ~(7U << 27); 29 NETC_IERB->ARRAY_NUM_RC[0].RCMSIAMQR |= (1U << 27); 30 31 /* Lock the IERB. */ 32 NETC_PRIV->NETCRR |= NETC_PRIV_NETCRR_LOCK_MASK; 33 while ((NETC_PRIV->NETCSR & NETC_PRIV_NETCSR_STATE_MASK) != 0U) { 34 } 35 #endif 36 } 37 #endif 38