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/Zephyr-latest/drivers/clock_control/
DKconfig.stm3250 menu "STM32WB0 LSI options"
54 int "Size of LSI measurement window (in periods)"
58 Size of the LSI measurement window (# of LSI periods)
60 The measurement process involves waiting for a certain amount of LSI periods
61 to occur, in order to determine precisely the LSI period, and thus frequency.
63 This property controls how much LSI periods are required for each measure.
72 int "LSI run-time measurement interval (ms)"
77 Since the LSI RC frequency is affected by temperature, which is not stable
78 across time, it is recommended to perform measurements of the LSI frequency
81 This property enables runtime LSI measurement if present. In this case,
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Dclock_stm32_ll_wb0.c70 * This IP is required to perform LSI measurements.
78 "System clock frequency must be at least 32MHz to use LSI");
82 "System clock frequency must be at least 16MHz to use LSI");
86 * @brief Variable holding the "current frequency of LSI", according
88 * a new measurement of the LSI frequency is performed.
93 * @brief Perform a measurement of the LSI frequency and updates
115 /* Start LSI calibration */ in measure_lsi_frequency()
134 * Calculate LSI frequency from calibration results and update in measure_lsi_frequency()
137 * LSI calibration counts the amount of 16MHz clock half-periods that in measure_lsi_frequency()
141 * elapsed while waiting for @p STM32_WB0_LSI_MEASURE_WINDOW_SIZE LSI periods in measure_lsi_frequency()
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Dclock_control_wch_rcc.c99 /* Always enable the LSI. */ in clock_control_wch_rcc_init()
/Zephyr-latest/dts/bindings/clock/
Dst,stm32wb0-lsi-clock.yaml5 STM32WB0 LSI Clock
7 The STM32WB0 MCUs are equipped with a regular RC LSI clock with a frequency of 24~40kHz.
8 The SoCs are also equipped with hardware to perform LSI frequency measurement, which
12 Several LSI frequency measurement options can be configured via Kconfig.
14 compatible: "st,stm32wb0-lsi-clock"
/Zephyr-latest/drivers/watchdog/
DKconfig.stm3225 MCU's LSI clock frequency and can be calculated with:
27 max. prescaler value (256) * max. reload ticks (4096) / LSI freq.
30 calculated for highest LSI frequency among STM32 MCUs of 40 kHz.
Dwdt_iwdg_stm32.c48 * Status register needs 5 LSI clock cycles divided by prescaler to be updated.
69 /* Convert timeout to LSI clock ticks. */ in iwdg_stm32_convert_timeout()
205 * the LSI oscillator is forced ON and cannot be disabled. in iwdg_stm32_init()
/Zephyr-latest/drivers/timer/
DKconfig.stm32_lptim28 bool "LSI"
30 Use LSI as LPTIM clock
55 - LSI(32KHz): 4000 ticks/sec
Dstm32_lptim_timer.c34 #warning Kconfig for LPTIM source clock (LSI/LSE) is deprecated, use device tree.
54 * - system clock based on an LPTIM instance, clocked by LSI or LSE
75 * This is for example about of 65000 x 2000ms when clocked by LSI
441 /* Driver only supports freqs up to 32768Hz. On L0, LSI freq is 37KHz, in sys_clock_driver_init()
/Zephyr-latest/soc/st/stm32/stm32l1x/
DKconfig.defconfig10 # adjust the fallback because of the LSI oscaillator characteristics
/Zephyr-latest/arch/xtensa/include/
Dxtensa_asm2_s.h136 lsi f0, a1, ___xtensa_irq_bsa_t_fpu0_OFFSET
137 lsi f1, a1, ___xtensa_irq_bsa_t_fpu1_OFFSET
138 lsi f2, a1, ___xtensa_irq_bsa_t_fpu2_OFFSET
139 lsi f3, a1, ___xtensa_irq_bsa_t_fpu3_OFFSET
140 lsi f4, a1, ___xtensa_irq_bsa_t_fpu4_OFFSET
141 lsi f5, a1, ___xtensa_irq_bsa_t_fpu5_OFFSET
142 lsi f6, a1, ___xtensa_irq_bsa_t_fpu6_OFFSET
143 lsi f7, a1, ___xtensa_irq_bsa_t_fpu7_OFFSET
144 lsi f8, a1, ___xtensa_irq_bsa_t_fpu8_OFFSET
145 lsi f9, a1, ___xtensa_irq_bsa_t_fpu9_OFFSET
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/Zephyr-latest/soc/st/stm32/stm32f0x/
DKconfig.defconfig15 # adjust the fallback because of the LSI oscillator characteristics
/Zephyr-latest/soc/st/stm32/stm32f1x/
DKconfig.defconfig12 # adjust the fallback because of the LSI oscaillator characteristics
/Zephyr-latest/soc/st/stm32/stm32l0x/
DKconfig.defconfig12 # adjust the fallback because of the LSI oscillator characteristics
/Zephyr-latest/soc/st/stm32/stm32f4x/
DKconfig.defconfig12 # adjust the fallback because of the LSI oscaillator characteristics
/Zephyr-latest/boards/google/icetower/
Dgoogle_icetower.dts25 /* LSI clock frequency is 32kHz */
/Zephyr-latest/samples/boards/st/power_mgmt/serial_wakeup/
DREADME.rst25 - Clocked by an oscillator available in Stop mode (LSE, LSI) or an oscillator capable
/Zephyr-latest/tests/drivers/clock_control/stm32_clock_configuration/stm32_common_devices/src/
Dtest_stm32_clock_configuration_lptim.c57 "Expected LPTIM1 src: LSI (0x%lx). Actual LPTIM1 src: 0x%x", in ZTEST()
/Zephyr-latest/boards/google/dragonclaw/
Dgoogle_dragonclaw.dts31 /* LSI clock frequency is 32768kHz */
/Zephyr-latest/dts/arm/st/wb0/
Dstm32wb0.dtsi85 clk_lsi: clk-lsi {
90 compatible = "st,stm32wb0-lsi-clock", "fixed-clock";
/Zephyr-latest/dts/riscv/wch/
Dch32v00x.dtsi43 clk_lsi: clk-lsi {
/Zephyr-latest/boards/st/nucleo_l073rz/
Dnucleo_l073rz.dts95 * LSI freq is 37KHz but stm32_lptim driver is using 32000Hz
/Zephyr-latest/include/zephyr/drivers/clock_control/
Dstm32_clock_control.h550 * @brief Type definition for LSI frequency update callbacks
557 * update of the LSI frequency is completed.
563 * @note Callbacks are NEVER invoked if runtime LSI measurement is disabled
/Zephyr-latest/dts/bindings/
Dvendor-prefixes.txt390 lsi LSI Corp. (LSI Logic)
/Zephyr-latest/dts/arm/st/f1/
Dstm32f1.dtsi61 clk_lsi: clk-lsi {
/Zephyr-latest/dts/arm/st/l0/
Dstm32l0.dtsi79 clk_lsi: clk-lsi {

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