1# STM32 IWDG configuration
2
3# Copyright (c) 2016 Open-RnD Sp. z o.o.
4# Copyright (c) 2017 RnDity Sp. z o.o.
5# Copyright (c) 2019 Centaur Analytics, Inc
6# SPDX-License-Identifier: Apache-2.0
7
8menuconfig IWDG_STM32
9	bool "Independent Watchdog (IWDG) Driver for STM32 family of MCUs"
10	default y
11	depends on DT_HAS_ST_STM32_WATCHDOG_ENABLED
12	select HAS_WDT_DISABLE_AT_BOOT
13	help
14	  Enable IWDG driver for STM32 line of MCUs
15
16config IWDG_STM32_INITIAL_TIMEOUT
17	int "Value for IWDG timeout in ms"
18	depends on IWDG_STM32
19	default 100
20	range 1 26214
21	help
22	  Set initial timeout value for IWDG in ms if enabled at boot.
23
24	  The min timeout supported is 1 ms. The max timeout depends on the
25	  MCU's LSI clock frequency and can be calculated with:
26
27	    max. prescaler value (256) * max. reload ticks (4096) / LSI freq.
28
29	  Limiting maximum timeout to a safe value of 26214 ms here, which was
30	  calculated for highest LSI frequency among STM32 MCUs of 40 kHz.
31
32config WWDG_STM32
33	bool "System Window Watchdog (WWDG) Driver for STM32 family of MCUs"
34	default y
35	depends on DT_HAS_ST_STM32_WINDOW_WATCHDOG_ENABLED
36	help
37	  Enable WWDG driver for STM32 line of MCUs
38