| /hal_gigadevice-latest/gd32f4xx/standard_peripheral/source/ |
| D | gd32f4xx_enet.c | 880 uint32_t offset = 0U, size = 0U; in enet_frame_receive() local 957 uint32_t offset = 0U; in enet_frame_transmit() local 1397 uint32_t offset = 0U, max = 0U, limit = 0U; in enet_registers_get() local 2484 uint32_t offset = 0U, size = 0U; in enet_ptpframe_receive_enhanced_mode() local 2582 uint32_t offset = 0; in enet_ptpframe_transmit_enhanced_mode() local 2846 uint32_t offset = 0U, size = 0U; in enet_ptpframe_receive_normal_mode() local 2941 uint32_t offset = 0U, timeout = 0U; in enet_ptpframe_transmit_normal_mode() local
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| D | gd32f4xx_misc.c | 119 void nvic_vector_table_set(uint32_t nvic_vict_tab, uint32_t offset) in nvic_vector_table_set()
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| /hal_gigadevice-latest/gd32e50x/standard_peripheral/source/ |
| D | gd32e50x_enet.c | 878 uint32_t offset = 0U, size = 0U; in enet_frame_receive() local 954 uint32_t offset = 0U; in enet_frame_transmit() local 1405 uint32_t offset = 0U, max = 0U, limit = 0U; in enet_registers_get() local 2493 uint32_t offset = 0U, size = 0U; in enet_ptpframe_receive_enhanced_mode() local 2592 uint32_t offset = 0; in enet_ptpframe_transmit_enhanced_mode() local 2856 uint32_t offset = 0U, size = 0U; in enet_ptpframe_receive_normal_mode() local 2950 uint32_t offset = 0U, timeout = 0U; in enet_ptpframe_transmit_normal_mode() local
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| D | gd32e50x_misc.c | 131 void nvic_vector_table_set(uint32_t nvic_vict_tab, uint32_t offset) in nvic_vector_table_set()
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| /hal_gigadevice-latest/gd32vf103/riscv/drivers/ |
| D | n200_timer.h | 14 #define TIMER_REG(offset) _REG32(TIMER_CTRL_ADDR, offset) argument
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| /hal_gigadevice-latest/gd32l23x/standard_peripheral/source/ |
| D | gd32l23x_misc.c | 83 void nvic_vector_table_set(uint32_t nvic_vict_tab, uint32_t offset) in nvic_vector_table_set()
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| /hal_gigadevice-latest/gd32f403/standard_peripheral/source/ |
| D | gd32f403_misc.c | 119 void nvic_vector_table_set(uint32_t nvic_vict_tab, uint32_t offset) in nvic_vector_table_set()
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| /hal_gigadevice-latest/gd32f3x0/standard_peripheral/source/ |
| D | gd32f3x0_misc.c | 132 void nvic_vector_table_set(uint32_t nvic_vict_tab, uint32_t offset) in nvic_vector_table_set()
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| D | gd32f3x0_adc.c | 405 void adc_inserted_channel_offset_config(uint8_t inserted_channel, uint16_t offset) in adc_inserted_channel_offset_config()
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| /hal_gigadevice-latest/gd32e10x/standard_peripheral/source/ |
| D | gd32e10x_misc.c | 131 void nvic_vector_table_set(uint32_t nvic_vict_tab, uint32_t offset) in nvic_vector_table_set()
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| /hal_gigadevice-latest/gd32a50x/standard_peripheral/source/ |
| D | gd32a50x_misc.c | 128 void nvic_vector_table_set(uint32_t nvic_vict_tab, uint32_t offset) in nvic_vector_table_set()
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| /hal_gigadevice-latest/gd32vf103/standard_peripheral/include/ |
| D | gd32vf103_fmc.h | 114 #define FMC_REG_VAL(offset) (REG32(FMC + ((uint32_t)(offset) >> 6))) argument 117 #define FMC_REG_VALS(offset) (REG32(FMC + ((uint32_t)(offset) >> 12))) argument
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| D | gd32vf103_i2c.h | 134 #define I2C_REG_VAL(i2cx, offset) (REG32((i2cx) + (((uint32_t)(offset) & 0xFFFFU) >> 6))) argument 138 #define I2C_REG_VAL2(i2cx, offset) (REG32((i2cx) + ((uint32_t)(offset) >> 22))) argument
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| D | gd32vf103_usart.h | 125 #define USART_REG_VAL(usartx, offset) (REG32((usartx) + (((uint32_t)(offset) & (0x0000FFFFU)… argument 129 #define USART_REG_VAL2(usartx, offset) (REG32((usartx) + ((uint32_t)(offset) >> 22))) argument
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| /hal_gigadevice-latest/gd32f403/standard_peripheral/include/ |
| D | gd32f403_fmc.h | 140 #define FMC_REG_VAL(offset) (REG32(FMC + ((uint32_t)(offset) >> 6))) argument 143 #define FMC_REG_VALS(offset) (REG32(FMC + ((uint32_t)(offset) >> 12))) argument
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| D | gd32f403_i2c.h | 137 #define I2C_REG_VAL(i2cx, offset) (REG32((i2cx) + (((uint32_t)(offset) & 0xFFFFU) >> 6))) argument 141 #define I2C_REG_VAL2(i2cx, offset) (REG32((i2cx) + ((uint32_t)(offset) >> 22))) argument
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| D | gd32f403_usart.h | 147 #define USART_REG_VAL(usartx, offset) (REG32((usartx) + (((uint32_t)(offset) & 0xFFFFU) >> 6)… argument 151 #define USART_REG_VAL2(usartx, offset) (REG32((usartx) + ((uint32_t)(offset) >> 22))) argument
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| /hal_gigadevice-latest/gd32f3x0/standard_peripheral/include/ |
| D | gd32f3x0_i2c.h | 136 #define I2C_REG_VAL(i2cx, offset) (REG32((i2cx) + (((uint32_t)(offset) & 0x0000FFFFU) >> 6))) argument 140 #define I2C_REG_VAL2(i2cx, offset) (REG32((i2cx) + ((uint32_t)(offset) >> 22))) argument
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| /hal_gigadevice-latest/gd32l23x/standard_peripheral/include/ |
| D | gd32l23x_i2c.h | 166 #define I2C_REG_VAL(i2cx, offset) (REG32((i2cx) + (((uint32_t)(offset) & 0x0000FFFFU) >> 6))) argument 170 #define I2C_REG_VAL2(i2cx, offset) (REG32((i2cx) + ((uint32_t)(offset) >> 22))) argument
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| D | gd32l23x_lpuart.h | 151 #define LPUART_REG_VAL(lpuart, offset) (REG32((lpuart) + (((uint32_t)(offset) & 0x0000FFFFU) >… argument 155 #define LPUART_REG_VAL2(lpuart, offset) (REG32((lpuart) + ((uint32_t)(offset) >> 22))) argument
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| D | gd32l23x_dma.h | 177 #define DMAMUX_REG_VAL(offset) (REG32(DMAMUX + (((uint32_t)(offset) & 0x0000FFFFU) >> 6)… argument 181 #define DMAMUX_REG_VAL2(offset) (REG32(DMAMUX + ((uint32_t)(offset) >> 22))) argument 183 #define DMAMUX_REG_VAL3(offset) (REG32(DMAMUX + (((uint32_t)(offset) & 0x0000FFFFU) >> 6… argument
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| /hal_gigadevice-latest/gd32e10x/standard_peripheral/include/ |
| D | gd32e10x_i2c.h | 153 #define I2C_REG_VAL(i2cx, offset) (REG32((i2cx) + (((uint32_t)(offset) & 0x0000FFFFU) >> 6))) argument 157 #define I2C_REG_VAL2(i2cx, offset) (REG32((i2cx) + ((uint32_t)(offset) >> 22))) argument
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| D | gd32e10x_usart.h | 153 #define USART_REG_VAL(usartx, offset) (REG32((usartx) + (((uint32_t)(offset) & 0xFFFFU) >> 6)… argument 157 #define USART_REG_VAL2(usartx, offset) (REG32((usartx) + ((uint32_t)(offset) >> 22))) argument
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| /hal_gigadevice-latest/gd32a50x/standard_peripheral/include/ |
| D | gd32a50x_i2c.h | 164 #define I2C_REG_VAL(i2cx, offset) (REG32((i2cx) + (((uint32_t)(offset) & 0x0000FFFFU) >> 6))) argument 168 #define I2C_REG_VAL2(i2cx, offset) (REG32((i2cx) + ((uint32_t)(offset) >> 22))) argument
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| /hal_gigadevice-latest/gd32f4xx/standard_peripheral/include/ |
| D | gd32f4xx_i2c.h | 155 #define I2C_REG_VAL(i2cx, offset) (REG32((i2cx) + (((uint32_t)(offset) & 0x0000FFFFU) >> 6))) argument 159 #define I2C_REG_VAL2(i2cx, offset) (REG32((i2cx) + ((uint32_t)(offset) >> 22))) argument
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