| /hal_stm32-3.5.0/stm32cube/stm32f4xx/drivers/include/ |
| D | stm32f4xx_hal_rcc_ex.h | 1839 #define __HAL_RCC_CRC_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_CRCLPEN)) macro
2734 #define __HAL_RCC_CRC_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_CRCLPEN)) macro
3184 #define __HAL_RCC_CRC_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_CRCLPEN)) macro
3480 #define __HAL_RCC_CRC_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_CRCLPEN)) macro
3837 #define __HAL_RCC_CRC_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_CRCLPEN)) macro
4566 #define __HAL_RCC_CRC_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_CRCLPEN)) macro
5538 #define __HAL_RCC_CRC_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_CRCLPEN)) macro
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| /hal_stm32-3.5.0/stm32cube/stm32wlxx/drivers/include/ |
| D | stm32wlxx_hal_rcc.h | 1347 #define __HAL_RCC_CRC_CLK_SLEEP_ENABLE() LL_C2_AHB1_GRP1_EnableClockSleep(LL_C2_AHB1_GRP… macro
1357 #define __HAL_RCC_CRC_CLK_SLEEP_ENABLE() LL_AHB1_GRP1_EnableClockSleep(LL_AHB1_GRP1_PERI… macro
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| /hal_stm32-3.5.0/stm32cube/stm32f7xx/drivers/include/ |
| D | stm32f7xx_hal_rcc.h | 576 #define __HAL_RCC_CRC_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_CRCLPEN)) macro
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| /hal_stm32-3.5.0/stm32cube/stm32l0xx/drivers/include/ |
| D | stm32l0xx_hal_rcc.h | 939 #define __HAL_RCC_CRC_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHBSMENR, (RCC_AHBSMENR_CRCSMEN)) macro
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| /hal_stm32-3.5.0/stm32cube/stm32c0xx/drivers/include/ |
| D | stm32c0xx_hal_rcc.h | 1026 #define __HAL_RCC_CRC_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHBSMENR, RCC_AHBSMENR_CRCSMEN) macro
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| /hal_stm32-3.5.0/stm32cube/stm32l1xx/drivers/include/ |
| D | stm32l1xx_hal_rcc.h | 1026 #define __HAL_RCC_CRC_CLK_SLEEP_ENABLE() (RCC->AHBLPENR |= (RCC_AHBLPENR_CRCLPEN)) macro
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| /hal_stm32-3.5.0/stm32cube/stm32wbaxx/drivers/include/ |
| D | stm32wbaxx_hal_rcc.h | 1332 #define __HAL_RCC_CRC_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_CRCSMEN) macro
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| /hal_stm32-3.5.0/stm32cube/stm32f2xx/drivers/include/ |
| D | stm32f2xx_hal_rcc.h | 1229 #define __HAL_RCC_CRC_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_CRCLPEN)) macro
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| /hal_stm32-3.5.0/stm32cube/stm32g0xx/drivers/include/ |
| D | stm32g0xx_hal_rcc.h | 1912 #define __HAL_RCC_CRC_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHBSMENR, RCC_AHBSMENR_CRCSMEN) macro
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| /hal_stm32-3.5.0/stm32cube/stm32g4xx/drivers/include/ |
| D | stm32g4xx_hal_rcc.h | 1977 #define __HAL_RCC_CRC_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_CRCSMEN) macro
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| /hal_stm32-3.5.0/stm32cube/stm32wbxx/drivers/include/ |
| D | stm32wbxx_hal_rcc.h | 1956 #define __HAL_RCC_CRC_CLK_SLEEP_ENABLE() LL_AHB1_GRP1_EnableClockSleep(LL_AHB1_GRP1_PERIPH_C… macro
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| /hal_stm32-3.5.0/stm32cube/stm32l5xx/drivers/include/ |
| D | stm32l5xx_hal_rcc.h | 2017 #define __HAL_RCC_CRC_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_CRCSMEN) macro
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| /hal_stm32-3.5.0/stm32cube/stm32h7xx/drivers/include/ |
| D | stm32h7xx_hal_rcc.h | 5359 #define __HAL_RCC_CRC_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_CRCLPEN)) macro
5639 #define __HAL_RCC_CRC_CLK_SLEEP_ENABLE() (RCC->AHB4LPENR) |= (RCC_AHB4LPENR_CRCLPEN) macro
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| /hal_stm32-3.5.0/stm32cube/stm32u5xx/drivers/include/ |
| D | stm32u5xx_hal_rcc.h | 3169 #define __HAL_RCC_CRC_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_CRCSMEN) macro
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| /hal_stm32-3.5.0/stm32cube/stm32l4xx/drivers/include/ |
| D | stm32l4xx_hal_rcc.h | 2759 #define __HAL_RCC_CRC_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_CRCSMEN) macro
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| /hal_stm32-3.5.0/stm32cube/stm32h5xx/drivers/include/ |
| D | stm32h5xx_hal_rcc.h | 3427 #define __HAL_RCC_CRC_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB1LPENR, RCC_AHB1LPENR_CRCLPEN) macro
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