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Searched defs:CMD (Results 1 – 25 of 131) sorted by relevance

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/hal_stm32-3.5.0/stm32cube/stm32f1xx/drivers/include/
Dstm32f1xx_hal_eth.h45 #define IS_ETH_AUTONEGOTIATION(CMD) (((CMD) == ETH_AUTONEGOTIATION_ENABLE) || \ argument
57 #define IS_ETH_WATCHDOG(CMD) (((CMD) == ETH_WATCHDOG_ENABLE) || \ argument
59 #define IS_ETH_JABBER(CMD) (((CMD) == ETH_JABBER_ENABLE) || \ argument
69 #define IS_ETH_CARRIER_SENSE(CMD) (((CMD) == ETH_CARRIERSENCE_ENABLE) || \ argument
71 #define IS_ETH_RECEIVE_OWN(CMD) (((CMD) == ETH_RECEIVEOWN_ENABLE) || \ argument
73 #define IS_ETH_LOOPBACK_MODE(CMD) (((CMD) == ETH_LOOPBACKMODE_ENABLE) || \ argument
75 #define IS_ETH_CHECKSUM_OFFLOAD(CMD) (((CMD) == ETH_CHECKSUMOFFLAOD_ENABLE) || \ argument
77 #define IS_ETH_RETRY_TRANSMISSION(CMD) (((CMD) == ETH_RETRYTRANSMISSION_ENABLE) || \ argument
79 #define IS_ETH_AUTOMATIC_PADCRC_STRIP(CMD) (((CMD) == ETH_AUTOMATICPADCRCSTRIP_ENABLE) || \ argument
85 #define IS_ETH_DEFERRAL_CHECK(CMD) (((CMD) == ETH_DEFFERRALCHECK_ENABLE) || \ argument
[all …]
/hal_stm32-3.5.0/stm32cube/stm32f4xx/drivers/include/Legacy/
Dstm32f4xx_hal_eth_legacy.h44 #define IS_ETH_AUTONEGOTIATION(CMD) (((CMD) == ETH_AUTONEGOTIATION_ENABLE) || \ argument
56 #define IS_ETH_WATCHDOG(CMD) (((CMD) == ETH_WATCHDOG_ENABLE) || \ argument
58 #define IS_ETH_JABBER(CMD) (((CMD) == ETH_JABBER_ENABLE) || \ argument
68 #define IS_ETH_CARRIER_SENSE(CMD) (((CMD) == ETH_CARRIERSENCE_ENABLE) || \ argument
70 #define IS_ETH_RECEIVE_OWN(CMD) (((CMD) == ETH_RECEIVEOWN_ENABLE) || \ argument
72 #define IS_ETH_LOOPBACK_MODE(CMD) (((CMD) == ETH_LOOPBACKMODE_ENABLE) || \ argument
74 #define IS_ETH_CHECKSUM_OFFLOAD(CMD) (((CMD) == ETH_CHECKSUMOFFLAOD_ENABLE) || \ argument
76 #define IS_ETH_RETRY_TRANSMISSION(CMD) (((CMD) == ETH_RETRYTRANSMISSION_ENABLE) || \ argument
78 #define IS_ETH_AUTOMATIC_PADCRC_STRIP(CMD) (((CMD) == ETH_AUTOMATICPADCRCSTRIP_ENABLE) || \ argument
84 #define IS_ETH_DEFERRAL_CHECK(CMD) (((CMD) == ETH_DEFFERRALCHECK_ENABLE) || \ argument
[all …]
/hal_stm32-3.5.0/stm32cube/stm32f2xx/drivers/include/
Dstm32f2xx_hal_eth.h44 #define IS_ETH_AUTONEGOTIATION(CMD) (((CMD) == ETH_AUTONEGOTIATION_ENABLE) || \ argument
56 #define IS_ETH_WATCHDOG(CMD) (((CMD) == ETH_WATCHDOG_ENABLE) || \ argument
58 #define IS_ETH_JABBER(CMD) (((CMD) == ETH_JABBER_ENABLE) || \ argument
68 #define IS_ETH_CARRIER_SENSE(CMD) (((CMD) == ETH_CARRIERSENCE_ENABLE) || \ argument
70 #define IS_ETH_RECEIVE_OWN(CMD) (((CMD) == ETH_RECEIVEOWN_ENABLE) || \ argument
72 #define IS_ETH_LOOPBACK_MODE(CMD) (((CMD) == ETH_LOOPBACKMODE_ENABLE) || \ argument
74 #define IS_ETH_CHECKSUM_OFFLOAD(CMD) (((CMD) == ETH_CHECKSUMOFFLAOD_ENABLE) || \ argument
76 #define IS_ETH_RETRY_TRANSMISSION(CMD) (((CMD) == ETH_RETRYTRANSMISSION_ENABLE) || \ argument
78 #define IS_ETH_AUTOMATIC_PADCRC_STRIP(CMD) (((CMD) == ETH_AUTOMATICPADCRCSTRIP_ENABLE) || \ argument
84 #define IS_ETH_DEFERRAL_CHECK(CMD) (((CMD) == ETH_DEFFERRALCHECK_ENABLE) || \ argument
[all …]
/hal_stm32-3.5.0/stm32cube/stm32f7xx/drivers/include/Legacy/
Dstm32f7xx_hal_eth_legacy.h44 #define IS_ETH_AUTONEGOTIATION(CMD) (((CMD) == ETH_AUTONEGOTIATION_ENABLE) || \ argument
56 #define IS_ETH_WATCHDOG(CMD) (((CMD) == ETH_WATCHDOG_ENABLE) || \ argument
58 #define IS_ETH_JABBER(CMD) (((CMD) == ETH_JABBER_ENABLE) || \ argument
68 #define IS_ETH_CARRIER_SENSE(CMD) (((CMD) == ETH_CARRIERSENCE_ENABLE) || \ argument
70 #define IS_ETH_RECEIVE_OWN(CMD) (((CMD) == ETH_RECEIVEOWN_ENABLE) || \ argument
72 #define IS_ETH_LOOPBACK_MODE(CMD) (((CMD) == ETH_LOOPBACKMODE_ENABLE) || \ argument
74 #define IS_ETH_CHECKSUM_OFFLOAD(CMD) (((CMD) == ETH_CHECKSUMOFFLAOD_ENABLE) || \ argument
76 #define IS_ETH_RETRY_TRANSMISSION(CMD) (((CMD) == ETH_RETRYTRANSMISSION_ENABLE) || \ argument
78 #define IS_ETH_AUTOMATIC_PADCRC_STRIP(CMD) (((CMD) == ETH_AUTOMATICPADCRCSTRIP_ENABLE) || \ argument
84 #define IS_ETH_DEFERRAL_CHECK(CMD) (((CMD) == ETH_DEFFERRALCHECK_ENABLE) || \ argument
[all …]
/hal_stm32-3.5.0/stm32cube/stm32f4xx/soc/
Dstm32f411xe.h429 __IO uint32_t CMD; /*!< SDIO command register, Address offset: 0x0C */ member
Dstm32f401xc.h428 __IO uint32_t CMD; /*!< SDIO command register, Address offset: 0x0C */ member
Dstm32f401xe.h428 __IO uint32_t CMD; /*!< SDIO command register, Address offset: 0x0C */ member
Dstm32f412cx.h569 __IO uint32_t CMD; /*!< SDIO command register, Address offset: 0x0C */ member
Dstm32f415xx.h590 __IO uint32_t CMD; /*!< SDIO command register, Address offset: 0x0C */ member
Dstm32f412rx.h592 __IO uint32_t CMD; /*!< SDIO command register, Address offset: 0x0C */ member
Dstm32f412zx.h592 __IO uint32_t CMD; /*!< SDIO command register, Address offset: 0x0C */ member
Dstm32f412vx.h592 __IO uint32_t CMD; /*!< SDIO command register, Address offset: 0x0C */ member
Dstm32f405xx.h591 __IO uint32_t CMD; /*!< SDIO command register, Address offset: 0x0C */ member
Dstm32f423xx.h654 __IO uint32_t CMD; /*!< SDIO command register, Address offset: 0x0C */ member
/hal_stm32-3.5.0/stm32cube/stm32l1xx/soc/
Dstm32l151xd.h538 __IO uint32_t CMD; /*!< SDIO command register, Address offset: 0x0C */ member
Dstm32l152xd.h553 __IO uint32_t CMD; /*!< SDIO command register, Address offset: 0x0C */ member
Dstm32l162xd.h574 __IO uint32_t CMD; /*!< SDIO command register, Address offset: 0x0C */ member
/hal_stm32-3.5.0/stm32cube/stm32f1xx/soc/
Dstm32f103xg.h596 __IO uint32_t CMD; member
Dstm32f103xe.h590 __IO uint32_t CMD; member
/hal_stm32-3.5.0/stm32cube/stm32f2xx/soc/
Dstm32f205xx.h589 __IO uint32_t CMD; /*!< SDIO command register, Address offset: 0x0C */ member
Dstm32f215xx.h590 __IO uint32_t CMD; /*!< SDIO command register, Address offset: 0x0C */ member
/hal_stm32-3.5.0/stm32cube/stm32f7xx/soc/
Dstm32f723xx.h637 __IO uint32_t CMD; /*!< SDMMC command register, Address offset: 0x0C */ member
Dstm32f730xx.h638 __IO uint32_t CMD; /*!< SDMMC command register, Address offset: 0x0C */ member
Dstm32f722xx.h637 __IO uint32_t CMD; /*!< SDMMC command register, Address offset: 0x0C */ member
/hal_stm32-3.5.0/stm32cube/stm32l4xx/soc/
Dstm32l451xx.h767 __IO uint32_t CMD; /*!< SDMMC command register, Address offset: 0x0C */ member

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