Home
last modified time | relevance | path

Searched +full:switch +full:- +full:frequency +full:- +full:hz (Results 1 – 25 of 505) sorted by relevance

12345678910>>...21

/Linux-v5.10/sound/soc/codecs/
Dtda7419.c1 // SPDX-License-Identifier: GPL-2.0-only
136 if (tvc->reg == tvc->rreg) in tda7419_vol_is_stereo()
146 (struct tda7419_vol_control *)kcontrol->private_value; in tda7419_vol_info()
148 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; in tda7419_vol_info()
149 uinfo->count = tda7419_vol_is_stereo(tvc) ? 2 : 1; in tda7419_vol_info()
150 uinfo->value.integer.min = tvc->min; in tda7419_vol_info()
151 uinfo->value.integer.max = tvc->max; in tda7419_vol_info()
163 val = 0 - val; in tda7419_vol_get_value()
166 val = val - thresh; in tda7419_vol_get_value()
168 val = thresh - val; in tda7419_vol_get_value()
[all …]
/Linux-v5.10/Documentation/devicetree/bindings/opp/
Dopp.txt2 ----------------------------------------------------
4 Devices work at voltage-current-frequency combinations and some implementations
13 Binding 1: operating-points
16 This binding only supports voltage-frequency pairs.
19 - operating-points: An array of 2-tuples items, and each item consists
20 of frequency and voltage like <freq-kHz vol-uV>.
21 freq: clock frequency in kHz
27 compatible = "arm,cortex-a9";
29 next-level-cache = <&L2>;
30 operating-points = <
[all …]
/Linux-v5.10/init/
Dcalibrate.c1 // SPDX-License-Identifier: GPL-2.0
29 * Also, this code tries to handle non-maskable asynchronous events
32 #define DELAY_CALIBRATION_TICKS ((HZ < 100) ? 1 : (HZ/100))
44 int max = -1; /* index of measured_times with max/min values or not set */ in calibrate_delay_direct()
45 int min = -1; in calibrate_delay_direct()
55 * will not do. As we don't really know whether jiffy switch in calibrate_delay_direct()
60 * 1. pre_start <- When we are sure that jiffy switch hasn't happened in calibrate_delay_direct()
61 * 2. check jiffy switch in calibrate_delay_direct()
62 * 3. start <- timer value before or after jiffy switch in calibrate_delay_direct()
63 * 4. post_start <- When we are sure that jiffy switch has happened in calibrate_delay_direct()
[all …]
/Linux-v5.10/drivers/clk/analogbits/
Dwrpll-cln28hpc.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2018-2019 SiFive, Inc.
16 * pre-determined set of performance points.
19 * - Analog Bits "Wide Range PLL Datasheet", version 2015.10.01
20 * - SiFive FU540-C000 Manual v1p0, Chapter 7 "Clocking and Reset"
21 * https://static.dev.sifive.com/FU540-C000-v1.0.pdf
28 #include <linux/clk/analogbits-wrpll-cln28hpc.h>
30 /* MIN_INPUT_FREQ: minimum input clock frequency, in Hz (Fref_min) */
33 /* MAX_INPUT_FREQ: maximum input clock frequency, in Hz (Fref_max) */
36 /* MIN_POST_DIVIDE_REF_FREQ: minimum post-divider reference frequency, in Hz */
[all …]
/Linux-v5.10/Documentation/devicetree/bindings/mfd/
Dqcom-rpm.txt8 - compatible:
12 "qcom,rpm-apq8064"
13 "qcom,rpm-msm8660"
14 "qcom,rpm-msm8960"
15 "qcom,rpm-ipq8064"
16 "qcom,rpm-mdm9615"
18 - reg:
20 Value type: <prop-encoded-array>
23 - interrupts:
25 Value type: <prop-encoded-array>
[all …]
/Linux-v5.10/include/linux/
Dtimex.h28 * Added defines for hybrid phase/frequency-lock loop.
32 * defines for PPS phase-lock loop.
46 * 1995-08-13 Torsten Duwe
47 * kernel PLL updated to 1994-12-13 specs (rfc-1589)
48 * 1997-08-30 Ulrich Windl
50 * 2004-08-12 Christoph Lameter
58 #define ADJ_ADJTIME 0x8000 /* switch between adjtime/adjtimex modes */
59 #define ADJ_OFFSET_SINGLESHOT 0x0001 /* old-fashioned adjtime */
60 #define ADJ_OFFSET_READONLY 0x2000 /* read-only adjtime */
71 * when an interrupt takes places versus a high speed, fine-grained
[all …]
/Linux-v5.10/include/linux/soundwire/
Dsdw.h1 /* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */
2 /* Copyright(c) 2015-17 Intel Corporation. */
71 * enum sdw_slave_status - Slave status
89 * @SDW_CLK_PRE_DEPREPARE: pre clock stop de-prepare
90 * @SDW_CLK_POST_DEPREPARE: post clock stop de-prepare
100 * enum sdw_command_response - Command response as defined by SDW spec
180 * enum sdw_p15_behave - Slave Port 15 behaviour when the Master attempts a
191 * enum sdw_dpn_type - Data port types
206 * enum sdw_clk_stop_mode - Clock Stop modes
209 * @SDW_CLK_STOP_MODE1: Slave may have entered a deeper power-saving mode,
[all …]
/Linux-v5.10/drivers/iio/pressure/
Dzpa2326.c1 // SPDX-License-Identifier: GPL-2.0-only
34 * - get device out of low power mode,
35 * - setup hardware sampling period,
36 * - at end of period, upon data ready interrupt: pop pressure samples out of
38 * - when no longer needed, stop sampling process by putting device into
44 * Note that hardware sampling frequency is taken into account only when
70 /* 200 ms should be enough for the longest conversion time in one-shot mode. */
71 #define ZPA2326_CONVERSION_JIFFIES (HZ / 5)
78 * struct zpa2326_frequency - Hardware sampling frequency descriptor
79 * @hz : Frequency in Hertz.
[all …]
/Linux-v5.10/drivers/clk/hisilicon/
Dclk-hi6220-stub.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/clk-provider.h>
33 /* CPU dynamic frequency scaling */
71 regmap_read(stub_clk->dfs_map, ACPU_DFS_CUR_FREQ, &freq); in hi6220_acpu_get_freq()
80 /* set the frequency in sram */ in hi6220_acpu_set_freq()
81 regmap_write(stub_clk->dfs_map, ACPU_DFS_FREQ_REQ, freq); in hi6220_acpu_set_freq()
89 mbox_send_message(stub_clk->mbox, &data); in hi6220_acpu_set_freq()
99 /* check the constrained frequency */ in hi6220_acpu_round_freq()
100 regmap_read(stub_clk->dfs_map, ACPU_DFS_FLAG, &limit_flag); in hi6220_acpu_round_freq()
102 regmap_read(stub_clk->dfs_map, ACPU_DFS_FREQ_LMT, &limit_freq); in hi6220_acpu_round_freq()
[all …]
/Linux-v5.10/drivers/iio/accel/
Dbma400_core.c1 // SPDX-License-Identifier: GPL-2.0-only
8 * - Support for power management
9 * - Support events and interrupts
10 * - Create channel for step count
11 * - Create channel for sensor time
27 * The G-range selection may be one of 2g, 4g, 8, or 16g. The scale may
50 int hz; member
68 switch (reg) { in bma400_is_writable_reg()
101 switch (reg) { in bma400_is_volatile_reg()
147 return &data->orientation; in bma400_accel_get_mount_matrix()
[all …]
/Linux-v5.10/sound/pci/hda/
Dhda_beep.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Digital Beep Input Interface for HD-audio codec
18 DIGBEEP_HZ_STEP = 46875, /* 46.875 Hz */
19 DIGBEEP_HZ_MIN = 93750, /* 93.750 Hz */
26 struct hda_codec *codec = beep->codec; in generate_tone()
28 if (tone && !beep->playing) { in generate_tone()
30 if (beep->power_hook) in generate_tone()
31 beep->power_hook(beep, true); in generate_tone()
32 beep->playing = 1; in generate_tone()
34 snd_hda_codec_write(codec, beep->nid, 0, in generate_tone()
[all …]
/Linux-v5.10/include/media/
Dtuner-types.h1 /* SPDX-License-Identifier: GPL-2.0 */
10 * enum param_type - type of the tuner pameters
27 * struct tuner_range - define the frequencies supported by the tuner
29 * @limit: Max frequency supported by that range, in 62.5 kHz
30 * (TV) or 62.5 Hz (Radio), as defined by
32 * @config: Value of the band switch byte (BB) to setup this mode.
43 * #) band switch byte (BB)
54 * struct tuner_params - Parameters to be used to setup the tuner. Those
55 * are used by drivers/media/tuners/tuner-types.c in
57 * the parameters are for tuners based on tda9887 IF-PLL
[all …]
/Linux-v5.10/Documentation/admin-guide/media/
Dvivid.rst1 .. SPDX-License-Identifier: GPL-2.0
13 Each input can be a webcam, TV capture device, S-Video capture device or an HDMI
14 capture device. Each output can be an S-Video output device or an HDMI output
23 - Support for read()/write(), MMAP, USERPTR and DMABUF streaming I/O.
24 - A large list of test patterns and variations thereof
25 - Working brightness, contrast, saturation and hue controls
26 - Support for the alpha color component
27 - Full colorspace support, including limited/full RGB range
28 - All possible control types are present
29 - Support for various pixel aspect ratios and video aspect ratios
[all …]
/Linux-v5.10/Documentation/devicetree/bindings/i2c/
Dnuvoton,npcm7xx-i2c.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/i2c/nuvoton,npcm7xx-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 both master and slave mode. Each controller can switch between master and slave
16 - Tali Perry <tali.perry1@gmail.com>
20 const: nuvoton,npcm7xx-i2c
32 clock-frequency:
33 description: Desired I2C bus clock frequency in Hz. If not specified,
34 the default 100 kHz frequency will be used.
[all …]
Di2c-davinci.txt7 - compatible: "ti,davinci-i2c" or "ti,keystone-i2c";
8 - reg : Offset and length of the register set for the device
9 - clocks: I2C functional clock phandle.
11 Documentation/devicetree/bindings/clock/ti,sci-clk.txt
13 SoC-specific Required Properties:
17 - power-domains: Should contain a phandle to a PM domain provider node
20 Documentation/devicetree/bindings/soc/ti/sci-pm-domain.txt
23 - interrupts : standard interrupt property.
24 - clock-frequency : desired I2C bus clock frequency in Hz.
25 - ti,has-pfunc: boolean; if defined, it indicates that SoC supports PFUNC
[all …]
/Linux-v5.10/Documentation/devicetree/bindings/regulator/
Dmps,mp886x.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jisheng Zhang <jszhang@kernel.org>
13 - $ref: regulator.yaml#
18 - mps,mp8867
19 - mps,mp8869
24 enable-gpios:
28 mps,fb-voltage-divider:
31 $ref: "/schemas/types.yaml#/definitions/uint32-array"
[all …]
/Linux-v5.10/sound/drivers/vx/
Dvx_uer.c1 // SPDX-License-Identifier: GPL-2.0-or-later
17 * vx_modify_board_clock - tell the board that its clock has been modified
32 * vx_modify_board_inputs - resync audio inputs
44 * vx_read_one_cbit - read one bit from UER config
52 mutex_lock(&chip->lock); in vx_read_one_cbit()
53 if (chip->type >= VX_TYPE_VXPOCKET) { in vx_read_one_cbit()
62 mutex_unlock(&chip->lock); in vx_read_one_cbit()
67 * vx_write_one_cbit - write one bit to UER config
74 mutex_lock(&chip->lock); in vx_write_one_cbit()
82 mutex_unlock(&chip->lock); in vx_write_one_cbit()
[all …]
/Linux-v5.10/drivers/media/radio/wl128x/
Dfmdrv.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Common header for all FM driver sub-modules.
18 #include <media/v4l2-ioctl.h>
19 #include <media/v4l2-common.h>
20 #include <media/v4l2-device.h>
21 #include <media/v4l2-ctrls.h>
40 #define FM_DRV_TX_TIMEOUT (5*HZ) /* 5 seconds */
41 #define FM_DRV_RX_SEEK_TIMEOUT (20*HZ) /* 20 seconds */
125 * Current RX channel Alternate Frequency cache.
126 * This info is used to switch to other freq (AF)
[all …]
/Linux-v5.10/drivers/iio/resolver/
Dad2s90.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2010-2010 Analog Devices Inc.
19 * Although chip's max frequency is 2Mhz, it needs 600ns between CS and the
20 * first falling edge of SCLK, so frequency should be at most 1 / (2 * 6e-7)
39 if (chan->type != IIO_ANGL) in ad2s90_read_raw()
40 return -EINVAL; in ad2s90_read_raw()
42 switch (m) { in ad2s90_read_raw()
49 mutex_lock(&st->lock); in ad2s90_read_raw()
50 ret = spi_read(st->sdev, st->rx, 2); in ad2s90_read_raw()
52 mutex_unlock(&st->lock); in ad2s90_read_raw()
[all …]
/Linux-v5.10/drivers/video/fbdev/
Dacornfb.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 1998-2001 Russell King
14 * - Blanking 8bpp displays with VIDC
26 #include <linux/dma-mapping.h>
32 #include <asm/mach-types.h>
52 * HSYNC and VSYNC frequency ranges. These are
68 }, { /* Hi-res mono */
114 struct fb_var_screeninfo *var = &info->var; in acornfb_set_timing()
122 vidc.h_sync_width = var->hsync_len - 8; in acornfb_set_timing()
123 vidc.h_border_start = vidc.h_sync_width + var->left_margin + 8 - 12; in acornfb_set_timing()
[all …]
/Linux-v5.10/drivers/iio/frequency/
Dadf4371.c1 // SPDX-License-Identifier: GPL-2.0
63 #define ADF4371_MAX_OUT_RF8_FREQ ADF4371_MAX_VCO_FREQ /* Hz */
64 #define ADF4371_MIN_OUT_RF8_FREQ (ADF4371_MIN_VCO_FREQ / 64) /* Hz */
65 #define ADF4371_MAX_OUT_RF16_FREQ (ADF4371_MAX_VCO_FREQ * 2) /* Hz */
66 #define ADF4371_MIN_OUT_RF16_FREQ (ADF4371_MIN_VCO_FREQ * 2) /* Hz */
67 #define ADF4371_MAX_OUT_RF32_FREQ (ADF4371_MAX_VCO_FREQ * 4) /* Hz */
68 #define ADF4371_MIN_OUT_RF32_FREQ (ADF4371_MIN_VCO_FREQ * 4) /* Hz */
70 #define ADF4371_MAX_FREQ_PFD 250000000UL /* Hz */
71 #define ADF4371_MAX_FREQ_REFIN 600000000UL /* Hz */
73 /* MOD1 is a 24-bit primary modulus with fixed value of 2^25 */
[all …]
/Linux-v5.10/drivers/media/tuners/
Dmt2063.c1 // SPDX-License-Identifier: GPL-2.0-only
34 /* Info: Unavoidable LO-related spur may be present in the output */
37 /* Info: Mask of bits used for # of LO-related spurs that were avoided during tuning */
41 /* Info: Upconverter frequency is out of range (may be reason for MT_UPC_UNLOCK) */
44 /* Info: Downconverter frequency is out of range (may be reason for MT_DPC_UNLOCK) */
56 /* DECT Frequency Avoidance */
144 * Two-wire serial bus subaddresses of the tuner registers.
221 u32 frequency; member
237 * mt2063_write - Write data into the I2C bus
241 struct dvb_frontend *fe = state->frontend; in mt2063_write()
[all …]
/Linux-v5.10/Documentation/m68k/
Dkernel-options.rst9 Author: Roman.Hodek@informatik.uni-erlangen.de (Roman Hodek)
11 Update: jds@kom.auc.dk (Jes Sorensen) and faq@linux-m68k.org (Chris Lawrence)
58 ----------
76 /dev/ram: -> 0x0100 (initial ramdisk)
77 /dev/hda: -> 0x0300 (first IDE disk)
78 /dev/hdb: -> 0x0340 (second IDE disk)
79 /dev/sda: -> 0x0800 (first SCSI disk)
80 /dev/sdb: -> 0x0810 (second SCSI disk)
81 /dev/sdc: -> 0x0820 (third SCSI disk)
82 /dev/sdd: -> 0x0830 (forth SCSI disk)
[all …]
/Linux-v5.10/drivers/iio/gyro/
Dfxas21002c_core.c1 // SPDX-License-Identifier: GPL-2.0
3 * Driver for NXP FXAS21002C Gyroscope - Core
116 * These values are taken from the low-pass filter cutoff frequency calculated
117 * ODR * 0.lpf_values. So, for ODR = 800Hz with a lpf value = 0.32
118 * => LPF cutoff frequency = 800 * 0.32 = 256 Hz
125 * These values are taken from the high-pass filter cutoff frequency calculated
126 * ODR * 0.0hpf_values. So, for ODR = 800Hz with a hpf value = 0.018750
127 * => HPF cutoff frequency = 800 * 0.018750 = 15 Hz
168 int odr_value_max = ARRAY_SIZE(fxas21002c_odr_values) - 1; in fxas21002c_odr_hz_from_value()
176 unsigned int hz) in fxas21002c_odr_value_from_hz() argument
[all …]
/Linux-v5.10/arch/mips/sni/
Dtime.c1 // SPDX-License-Identifier: GPL-2.0
15 #define SNI_COUNTER0_DIV ((SNI_CLOCK_TICK_RATE / SNI_COUNTER2_DIV) / HZ)
36 .name = "a20r-timer",
53 cd->event_handler(cd); in a20r_interrupt()
59 * a20r platform uses 2 counters to divide the input frequency.
67 cd->cpumask = cpumask_of(cpu); in sni_a20r_timer_setup()
70 IRQF_PERCPU | IRQF_TIMER, "a20r-timer", cd)) in sni_a20r_timer_setup()
71 pr_err("Failed to register a20r-timer interrupt\n"); in sni_a20r_timer_setup()
76 #define SNI_8254_TCSAMP_COUNTER ((SNI_8254_TICK_RATE / HZ) + 255)
103 * for every 1/HZ seconds. We round off the nearest 1 MHz of master in dosample()
[all …]

12345678910>>...21