Lines Matching +full:switch +full:- +full:frequency +full:- +full:hz

1 // SPDX-License-Identifier: GPL-2.0-or-later
17 * vx_modify_board_clock - tell the board that its clock has been modified
32 * vx_modify_board_inputs - resync audio inputs
44 * vx_read_one_cbit - read one bit from UER config
52 mutex_lock(&chip->lock); in vx_read_one_cbit()
53 if (chip->type >= VX_TYPE_VXPOCKET) { in vx_read_one_cbit()
62 mutex_unlock(&chip->lock); in vx_read_one_cbit()
67 * vx_write_one_cbit - write one bit to UER config
74 mutex_lock(&chip->lock); in vx_write_one_cbit()
82 mutex_unlock(&chip->lock); in vx_write_one_cbit()
86 * vx_read_uer_status - read the current UER status
89 * returns the frequency of UER, or 0 if not sync,
106 /* If clock is present, read frequency */ in vx_read_uer_status()
108 switch (val & VX_SUER_FREQ_MASK) { in vx_read_uer_status()
132 * compute the sample clock value from frequency
136 * HexFreq = (dword) ((double) ((double) 28224000 / (double) Frequency))
137 * switch ( HexFreq & 0x00000F00 )
140 * case 0x00000300: HexFreq -= 0x00000201 ;
144 * case 0x00000700: HexFreq = (dword) (((double) 28224000 / (double) (Frequency*2)) - 1)
145 * default : HexFreq = (dword) ((double) 28224000 / (double) (Frequency*4)) - 0x000001FF
158 /* max freq = 55125 Hz */ in vx_calc_clock_from_freq()
163 return hexfreq - 0x00000201; in vx_calc_clock_from_freq()
165 return (hexfreq / 2) - 1; in vx_calc_clock_from_freq()
169 return 0x5fe; /* min freq = 6893 Hz */ in vx_calc_clock_from_freq()
174 * vx_change_clock_source - change the clock source
181 mutex_lock(&chip->lock); in vx_change_clock_source()
182 chip->ops->set_clock_source(chip, source); in vx_change_clock_source()
183 chip->clock_source = source; in vx_change_clock_source()
184 mutex_unlock(&chip->lock); in vx_change_clock_source()
200 mutex_lock(&chip->lock); in vx_set_internal_clock()
208 mutex_unlock(&chip->lock); in vx_set_internal_clock()
214 * @bits: 32-bit status bits
220 if (chip->chip_status & VX_STAT_IS_STALE) in vx_set_iec958_status()
229 * vx_set_clock - change the clock and audio source if necessary
235 if (chip->chip_status & VX_STAT_IS_STALE) in vx_set_clock()
241 if (chip->clock_mode == VX_CLOCK_MODE_EXTERNAL || in vx_set_clock()
242 (chip->clock_mode == VX_CLOCK_MODE_AUTO && in vx_set_clock()
243 chip->audio_source == VX_AUDIO_SRC_DIGITAL)) { in vx_set_clock()
244 if (chip->clock_source != UER_SYNC) { in vx_set_clock()
249 } else if (chip->clock_mode == VX_CLOCK_MODE_INTERNAL || in vx_set_clock()
250 (chip->clock_mode == VX_CLOCK_MODE_AUTO && in vx_set_clock()
251 chip->audio_source != VX_AUDIO_SRC_DIGITAL)) { in vx_set_clock()
252 if (chip->clock_source != INTERNAL_QUARTZ) { in vx_set_clock()
256 if (chip->freq == freq) in vx_set_clock()
262 if (chip->freq == freq) in vx_set_clock()
264 chip->freq = freq; in vx_set_clock()
271 * vx_change_frequency - called from interrupt handler
277 if (chip->chip_status & VX_STAT_IS_STALE) in vx_change_frequency()
280 if (chip->clock_source == INTERNAL_QUARTZ) in vx_change_frequency()
283 * Read the real UER board frequency in vx_change_frequency()
285 freq = vx_read_uer_status(chip, &chip->uer_detected); in vx_change_frequency()
289 * The frequency computed by the DSP is good and in vx_change_frequency()
293 chip->freq_detected = freq; in vx_change_frequency()