Lines Matching +full:switch +full:- +full:frequency +full:- +full:hz
2 ----------------------------------------------------
4 Devices work at voltage-current-frequency combinations and some implementations
13 Binding 1: operating-points
16 This binding only supports voltage-frequency pairs.
19 - operating-points: An array of 2-tuples items, and each item consists
20 of frequency and voltage like <freq-kHz vol-uV>.
21 freq: clock frequency in kHz
27 compatible = "arm,cortex-a9";
29 next-level-cache = <&L2>;
30 operating-points = <
39 Binding 2: operating-points-v2
42 * Property: operating-points-v2
44 Devices supporting OPPs must set their "operating-points-v2" property with
54 should be documented as Documentation/devicetree/bindings/power/<vendor>-opp.txt
55 and should have a compatible description like: "operating-points-v2-<vendor>".
63 - compatible: Allow OPPs to express their compatibility. It should be:
64 "operating-points-v2".
66 - OPP nodes: One or more OPP nodes describing voltage-current-frequency
71 - opp-shared: Indicates that device nodes using this OPP Table Node's phandle
72 switch their DVFS state together, i.e. they share clock/voltage/current lines.
76 - status: Marks the OPP table enabled/disabled.
81 This defines voltage-current-frequency combinations along with other related
85 - opp-hz: Frequency in Hz, expressed as a 64-bit big-endian integer. This is a
90 - opp-peak-kBps: Peak bandwidth in kilobytes per second, expressed as an array
91 of 32-bit big-endian integers. Each element of the array represents the
96 - opp-microvolt: voltage in micro Volts.
111 - opp-microvolt-<name>: Named opp-microvolt property. This is exactly similar to
112 the above opp-microvolt property, but allows multiple voltage ranges to be
114 matching opp-microvolt-<name> property will be enabled for all OPPs. If the
116 opp-microvolt-<name> properties, then opp-microvolt property shall be used, if
119 - opp-microamp: The maximum current drawn by the device in microamperes
124 Should only be set if opp-microvolt is set for the OPP.
134 - opp-microamp-<name>: Named opp-microamp property. Similar to
135 opp-microvolt-<name> property, but for microamp instead.
137 - opp-level: A value representing the performance level of the device,
138 expressed as a 32-bit integer.
140 - opp-avg-kBps: Average bandwidth in kilobytes per second, expressed as an array
141 of 32-bit big-endian integers. Each element of the array represents the
144 meaningful in OPP tables where opp-peak-kBps is present.
146 - clock-latency-ns: Specifies the maximum possible transition latency (in
149 - turbo-mode: Marks the OPP to be used only for turbo modes. Turbo mode is
151 frequency for a short duration of time limited by the device's power, current
154 - opp-suspend: Marks the OPP to be used during device suspend. If multiple OPPs
155 in the table have this, the OPP with highest opp-hz will be used.
157 - opp-supported-hw: This property allows a platform to enable only a subset of
162 sub-group of hardware versions supported by the OPP. i.e. <sub-group A>,
163 <sub-group B>, etc. The OPP will be enabled if _any_ of these sub-groups match
166 Each sub-group is a platform defined array representing the hierarchy of
170 opp-supported-hw = <X1 Y1 Z1>, <X2 Y2 Z2>, <X3 Y3 Z3>.
175 and a non-zero output for _all_ the levels in a sub-group means the OPP is
176 supported by hardware. A value of 0xFFFFFFFF for each level in the sub-group
179 - status: Marks the node enabled/disabled.
181 - required-opps: This contains phandle to an OPP node in another device's OPP
189 Example 1: Single cluster Dual-core ARM cortex A9, switch DVFS states together.
193 #address-cells = <1>;
194 #size-cells = <0>;
197 compatible = "arm,cortex-a9";
199 next-level-cache = <&L2>;
201 clock-names = "cpu";
202 cpu-supply = <&cpu_supply0>;
203 operating-points-v2 = <&cpu0_opp_table>;
207 compatible = "arm,cortex-a9";
209 next-level-cache = <&L2>;
211 clock-names = "cpu";
212 cpu-supply = <&cpu_supply0>;
213 operating-points-v2 = <&cpu0_opp_table>;
218 compatible = "operating-points-v2";
219 opp-shared;
221 opp-1000000000 {
222 opp-hz = /bits/ 64 <1000000000>;
223 opp-microvolt = <975000 970000 985000>;
224 opp-microamp = <70000>;
225 clock-latency-ns = <300000>;
226 opp-suspend;
228 opp-1100000000 {
229 opp-hz = /bits/ 64 <1100000000>;
230 opp-microvolt = <1000000 980000 1010000>;
231 opp-microamp = <80000>;
232 clock-latency-ns = <310000>;
234 opp-1200000000 {
235 opp-hz = /bits/ 64 <1200000000>;
236 opp-microvolt = <1025000>;
237 clock-latency-ns = <290000>;
238 turbo-mode;
243 Example 2: Single cluster, Quad-core Qualcom-krait, switches DVFS states
248 #address-cells = <1>;
249 #size-cells = <0>;
254 next-level-cache = <&L2>;
256 clock-names = "cpu";
257 cpu-supply = <&cpu_supply0>;
258 operating-points-v2 = <&cpu_opp_table>;
264 next-level-cache = <&L2>;
266 clock-names = "cpu";
267 cpu-supply = <&cpu_supply1>;
268 operating-points-v2 = <&cpu_opp_table>;
274 next-level-cache = <&L2>;
276 clock-names = "cpu";
277 cpu-supply = <&cpu_supply2>;
278 operating-points-v2 = <&cpu_opp_table>;
284 next-level-cache = <&L2>;
286 clock-names = "cpu";
287 cpu-supply = <&cpu_supply3>;
288 operating-points-v2 = <&cpu_opp_table>;
293 compatible = "operating-points-v2";
296 * Missing opp-shared property means CPUs switch DVFS states
300 opp-1000000000 {
301 opp-hz = /bits/ 64 <1000000000>;
302 opp-microvolt = <975000 970000 985000>;
303 opp-microamp = <70000>;
304 clock-latency-ns = <300000>;
305 opp-suspend;
307 opp-1100000000 {
308 opp-hz = /bits/ 64 <1100000000>;
309 opp-microvolt = <1000000 980000 1010000>;
310 opp-microamp = <80000>;
311 clock-latency-ns = <310000>;
313 opp-1200000000 {
314 opp-hz = /bits/ 64 <1200000000>;
315 opp-microvolt = <1025000>;
316 opp-microamp = <90000;
317 lock-latency-ns = <290000>;
318 turbo-mode;
323 Example 3: Dual-cluster, Dual-core per cluster. CPUs within a cluster switch
328 #address-cells = <1>;
329 #size-cells = <0>;
332 compatible = "arm,cortex-a7";
334 next-level-cache = <&L2>;
336 clock-names = "cpu";
337 cpu-supply = <&cpu_supply0>;
338 operating-points-v2 = <&cluster0_opp>;
342 compatible = "arm,cortex-a7";
344 next-level-cache = <&L2>;
346 clock-names = "cpu";
347 cpu-supply = <&cpu_supply0>;
348 operating-points-v2 = <&cluster0_opp>;
352 compatible = "arm,cortex-a15";
354 next-level-cache = <&L2>;
356 clock-names = "cpu";
357 cpu-supply = <&cpu_supply1>;
358 operating-points-v2 = <&cluster1_opp>;
362 compatible = "arm,cortex-a15";
364 next-level-cache = <&L2>;
366 clock-names = "cpu";
367 cpu-supply = <&cpu_supply1>;
368 operating-points-v2 = <&cluster1_opp>;
373 compatible = "operating-points-v2";
374 opp-shared;
376 opp-1000000000 {
377 opp-hz = /bits/ 64 <1000000000>;
378 opp-microvolt = <975000 970000 985000>;
379 opp-microamp = <70000>;
380 clock-latency-ns = <300000>;
381 opp-suspend;
383 opp-1100000000 {
384 opp-hz = /bits/ 64 <1100000000>;
385 opp-microvolt = <1000000 980000 1010000>;
386 opp-microamp = <80000>;
387 clock-latency-ns = <310000>;
389 opp-1200000000 {
390 opp-hz = /bits/ 64 <1200000000>;
391 opp-microvolt = <1025000>;
392 opp-microamp = <90000>;
393 clock-latency-ns = <290000>;
394 turbo-mode;
399 compatible = "operating-points-v2";
400 opp-shared;
402 opp-1300000000 {
403 opp-hz = /bits/ 64 <1300000000>;
404 opp-microvolt = <1050000 1045000 1055000>;
405 opp-microamp = <95000>;
406 clock-latency-ns = <400000>;
407 opp-suspend;
409 opp-1400000000 {
410 opp-hz = /bits/ 64 <1400000000>;
411 opp-microvolt = <1075000>;
412 opp-microamp = <100000>;
413 clock-latency-ns = <400000>;
415 opp-1500000000 {
416 opp-hz = /bits/ 64 <1500000000>;
417 opp-microvolt = <1100000 1010000 1110000>;
418 opp-microamp = <95000>;
419 clock-latency-ns = <400000>;
420 turbo-mode;
430 compatible = "vendor,cpu-type";
433 vcc0-supply = <&cpu_supply0>;
434 vcc1-supply = <&cpu_supply1>;
435 vcc2-supply = <&cpu_supply2>;
436 operating-points-v2 = <&cpu0_opp_table>;
441 compatible = "operating-points-v2";
442 opp-shared;
444 opp-1000000000 {
445 opp-hz = /bits/ 64 <1000000000>;
446 opp-microvolt = <970000>, /* Supply 0 */
449 opp-microamp = <70000>, /* Supply 0 */
452 clock-latency-ns = <300000>;
457 opp-1000000000 {
458 opp-hz = /bits/ 64 <1000000000>;
459 opp-microvolt = <975000 970000 985000>, /* Supply 0 */
462 opp-microamp = <70000>, /* Supply 0 */
465 clock-latency-ns = <300000>;
470 opp-1000000000 {
471 opp-hz = /bits/ 64 <1000000000>;
472 opp-microvolt = <975000 970000 985000>, /* Supply 0 */
475 opp-microamp = <70000>, /* Supply 0 */
478 clock-latency-ns = <300000>;
483 Example 5: opp-supported-hw
489 compatible = "arm,cortex-a7";
492 cpu-supply = <&cpu_supply>
493 operating-points-v2 = <&cpu0_opp_table_slow>;
498 compatible = "operating-points-v2";
499 opp-shared;
501 opp-600000000 {
506 opp-supported-hw = <0xF 0xFFFFFFFF 0xFFFFFFFF>
507 opp-hz = /bits/ 64 <600000000>;
511 opp-800000000 {
514 * - cuts: only one, 6th cut (represented by 6th bit).
515 * - substrate: supports 16 different substrate versions
516 * - process: supports 9 different process versions
518 opp-supported-hw = <0x20 0xff0000ff 0x0000f4f0>
519 opp-hz = /bits/ 64 <800000000>;
523 opp-900000000 {
526 * - All cuts and substrate where process version is 0x2.
527 * - All cuts and process where substrate version is 0x2.
529 opp-supported-hw = <0xFFFFFFFF 0xFFFFFFFF 0x02>, <0xFFFFFFFF 0x01 0xFFFFFFFF>
530 opp-hz = /bits/ 64 <900000000>;
536 Example 6: opp-microvolt-<name>, opp-microamp-<name>:
542 compatible = "arm,cortex-a7";
545 operating-points-v2 = <&cpu0_opp_table>;
550 compatible = "operating-points-v2";
551 opp-shared;
553 opp-1000000000 {
554 opp-hz = /bits/ 64 <1000000000>;
555 opp-microvolt-slow = <915000 900000 925000>;
556 opp-microvolt-fast = <975000 970000 985000>;
557 opp-microamp-slow = <70000>;
558 opp-microamp-fast = <71000>;
561 opp-1200000000 {
562 opp-hz = /bits/ 64 <1200000000>;
563 opp-microvolt-slow = <915000 900000 925000>, /* Supply vcc0 */
565 opp-microvolt-fast = <975000 970000 985000>, /* Supply vcc0 */
567 opp-microamp = <70000>; /* Will be used for both slow/fast */