Lines Matching +full:switch +full:- +full:frequency +full:- +full:hz
1 // SPDX-License-Identifier: GPL-2.0-only
34 /* Info: Unavoidable LO-related spur may be present in the output */
37 /* Info: Mask of bits used for # of LO-related spurs that were avoided during tuning */
41 /* Info: Upconverter frequency is out of range (may be reason for MT_UPC_UNLOCK) */
44 /* Info: Downconverter frequency is out of range (may be reason for MT_DPC_UNLOCK) */
56 /* DECT Frequency Avoidance */
144 * Two-wire serial bus subaddresses of the tuner registers.
221 u32 frequency; member
237 * mt2063_write - Write data into the I2C bus
241 struct dvb_frontend *fe = state->frontend; in mt2063_write()
245 .addr = state->config->tuner_address, in mt2063_write()
256 if (fe->ops.i2c_gate_ctrl) in mt2063_write()
257 fe->ops.i2c_gate_ctrl(fe, 1); in mt2063_write()
258 ret = i2c_transfer(state->i2c, &msg, 1); in mt2063_write()
259 if (fe->ops.i2c_gate_ctrl) in mt2063_write()
260 fe->ops.i2c_gate_ctrl(fe, 0); in mt2063_write()
269 * mt2063_write - Write register data into the I2C bus, caching the value
278 return -ERANGE; in mt2063_setreg()
284 state->reg[reg] = val; in mt2063_setreg()
290 * mt2063_read - Read data from the I2C bus
296 struct dvb_frontend *fe = state->frontend; in mt2063_read()
301 if (fe->ops.i2c_gate_ctrl) in mt2063_read()
302 fe->ops.i2c_gate_ctrl(fe, 1); in mt2063_read()
308 .addr = state->config->tuner_address, in mt2063_read()
313 .addr = state->config->tuner_address, in mt2063_read()
320 status = i2c_transfer(state->i2c, msg, 2); in mt2063_read()
326 if (fe->ops.i2c_gate_ctrl) in mt2063_read()
327 fe->ops.i2c_gate_ctrl(fe, 0); in mt2063_read()
354 #define ceil(n, d) (((n) < 0) ? (-((-(n))/(d))) : (n)/(d) + ((n)%(d) != 0))
355 #define floor(n, d) (((n) < 0) ? (-((-(n))/(d))) - ((n)%(d) != 0) : (n)/(d))
371 if (pAS_Info->freeZones != NULL) { in InsertNode()
373 pNode = pAS_Info->freeZones; in InsertNode()
374 pAS_Info->freeZones = pNode->next_; in InsertNode()
377 pNode = &pAS_Info->MT2063_ExclZones[pAS_Info->nZones]; in InsertNode()
381 pNode->next_ = pPrevNode->next_; in InsertNode()
382 pPrevNode->next_ = pNode; in InsertNode()
385 pNode->next_ = pAS_Info->usedZones; in InsertNode()
386 pAS_Info->usedZones = pNode; in InsertNode()
389 pAS_Info->nZones++; in InsertNode()
399 struct MT2063_ExclZone_t *pNext = pNodeToRemove->next_; in RemoveNode()
405 pPrevNode->next_ = pNext; in RemoveNode()
408 pNodeToRemove->next_ = pAS_Info->freeZones; in RemoveNode()
409 pAS_Info->freeZones = pNodeToRemove; in RemoveNode()
412 pAS_Info->nZones--; in RemoveNode()
428 struct MT2063_ExclZone_t *pNode = pAS_Info->usedZones; in MT2063_AddExclZone()
435 if ((f_max > (pAS_Info->f_if1_Center - (pAS_Info->f_if1_bw / 2))) in MT2063_AddExclZone()
436 && (f_min < (pAS_Info->f_if1_Center + (pAS_Info->f_if1_bw / 2))) in MT2063_AddExclZone()
441 * New entry: |---| |--| |--| |-| |---| |--| in MT2063_AddExclZone()
443 * Existing: |--| |--| |--| |---| |-| |--| in MT2063_AddExclZone()
447 while ((pNode != NULL) && (pNode->max_ < f_min)) { in MT2063_AddExclZone()
449 pNode = pNode->next_; in MT2063_AddExclZone()
452 if ((pNode != NULL) && (pNode->min_ < f_max)) { in MT2063_AddExclZone()
454 if (f_min < pNode->min_) in MT2063_AddExclZone()
455 pNode->min_ = f_min; in MT2063_AddExclZone()
456 if (f_max > pNode->max_) in MT2063_AddExclZone()
457 pNode->max_ = f_max; in MT2063_AddExclZone()
460 pNode->min_ = f_min; in MT2063_AddExclZone()
461 pNode->max_ = f_max; in MT2063_AddExclZone()
465 pNext = pNode->next_; in MT2063_AddExclZone()
466 while ((pNext != NULL) && (pNext->min_ < pNode->max_)) { in MT2063_AddExclZone()
467 if (pNext->max_ > pNode->max_) in MT2063_AddExclZone()
468 pNode->max_ = pNext->max_; in MT2063_AddExclZone()
469 /* Remove pNext, return ptr to pNext->next */ in MT2063_AddExclZone()
485 pAS_Info->nZones = 0; /* this clears the used list */ in MT2063_ResetExclZones()
486 pAS_Info->usedZones = NULL; /* reset ptr */ in MT2063_ResetExclZones()
487 pAS_Info->freeZones = NULL; /* reset ptr */ in MT2063_ResetExclZones()
490 pAS_Info->f_ref * in MT2063_ResetExclZones()
491 ((pAS_Info->f_if1_Center - pAS_Info->f_if1_bw / 2 + in MT2063_ResetExclZones()
492 pAS_Info->f_in) / pAS_Info->f_ref) - pAS_Info->f_in; in MT2063_ResetExclZones()
494 pAS_Info->f_if1_Center + pAS_Info->f_if1_bw / 2 + in MT2063_ResetExclZones()
495 pAS_Info->f_LO1_FracN_Avoid) { in MT2063_ResetExclZones()
498 center - pAS_Info->f_LO1_FracN_Avoid, in MT2063_ResetExclZones()
499 center - 1); in MT2063_ResetExclZones()
501 center + pAS_Info->f_LO1_FracN_Avoid); in MT2063_ResetExclZones()
502 center += pAS_Info->f_ref; in MT2063_ResetExclZones()
506 pAS_Info->f_ref * in MT2063_ResetExclZones()
507 ((pAS_Info->f_if1_Center - pAS_Info->f_if1_bw / 2 - in MT2063_ResetExclZones()
508 pAS_Info->f_out) / pAS_Info->f_ref) + pAS_Info->f_out; in MT2063_ResetExclZones()
510 pAS_Info->f_if1_Center + pAS_Info->f_if1_bw / 2 + in MT2063_ResetExclZones()
511 pAS_Info->f_LO2_FracN_Avoid) { in MT2063_ResetExclZones()
514 center - pAS_Info->f_LO2_FracN_Avoid, in MT2063_ResetExclZones()
515 center - 1); in MT2063_ResetExclZones()
517 center + pAS_Info->f_LO2_FracN_Avoid); in MT2063_ResetExclZones()
518 center += pAS_Info->f_ref; in MT2063_ResetExclZones()
521 if (MT2063_EXCLUDE_US_DECT_FREQUENCIES(pAS_Info->avoidDECT)) { in MT2063_ResetExclZones()
523 …MT2063_AddExclZone(pAS_Info, 1920836000 - pAS_Info->f_in, 1922236000 - pAS_Info->f_in); /* Ctr = 1… in MT2063_ResetExclZones()
524 …MT2063_AddExclZone(pAS_Info, 1922564000 - pAS_Info->f_in, 1923964000 - pAS_Info->f_in); /* Ctr = 1… in MT2063_ResetExclZones()
525 …MT2063_AddExclZone(pAS_Info, 1924292000 - pAS_Info->f_in, 1925692000 - pAS_Info->f_in); /* Ctr = 1… in MT2063_ResetExclZones()
526 …MT2063_AddExclZone(pAS_Info, 1926020000 - pAS_Info->f_in, 1927420000 - pAS_Info->f_in); /* Ctr = 1… in MT2063_ResetExclZones()
527 …MT2063_AddExclZone(pAS_Info, 1927748000 - pAS_Info->f_in, 1929148000 - pAS_Info->f_in); /* Ctr = 1… in MT2063_ResetExclZones()
530 if (MT2063_EXCLUDE_EURO_DECT_FREQUENCIES(pAS_Info->avoidDECT)) { in MT2063_ResetExclZones()
531 …MT2063_AddExclZone(pAS_Info, 1896644000 - pAS_Info->f_in, 1898044000 - pAS_Info->f_in); /* Ctr = 1… in MT2063_ResetExclZones()
532 …MT2063_AddExclZone(pAS_Info, 1894916000 - pAS_Info->f_in, 1896316000 - pAS_Info->f_in); /* Ctr = 1… in MT2063_ResetExclZones()
533 …MT2063_AddExclZone(pAS_Info, 1893188000 - pAS_Info->f_in, 1894588000 - pAS_Info->f_in); /* Ctr = 1… in MT2063_ResetExclZones()
534 …MT2063_AddExclZone(pAS_Info, 1891460000 - pAS_Info->f_in, 1892860000 - pAS_Info->f_in); /* Ctr = 1… in MT2063_ResetExclZones()
535 …MT2063_AddExclZone(pAS_Info, 1889732000 - pAS_Info->f_in, 1891132000 - pAS_Info->f_in); /* Ctr = 1… in MT2063_ResetExclZones()
536 …MT2063_AddExclZone(pAS_Info, 1888004000 - pAS_Info->f_in, 1889404000 - pAS_Info->f_in); /* Ctr = 1… in MT2063_ResetExclZones()
537 …MT2063_AddExclZone(pAS_Info, 1886276000 - pAS_Info->f_in, 1887676000 - pAS_Info->f_in); /* Ctr = 1… in MT2063_ResetExclZones()
538 …MT2063_AddExclZone(pAS_Info, 1884548000 - pAS_Info->f_in, 1885948000 - pAS_Info->f_in); /* Ctr = 1… in MT2063_ResetExclZones()
539 …MT2063_AddExclZone(pAS_Info, 1882820000 - pAS_Info->f_in, 1884220000 - pAS_Info->f_in); /* Ctr = 1… in MT2063_ResetExclZones()
540 …MT2063_AddExclZone(pAS_Info, 1881092000 - pAS_Info->f_in, 1882492000 - pAS_Info->f_in); /* Ctr = 1… in MT2063_ResetExclZones()
545 * MT_ChooseFirstIF - Choose the best available 1st IF
553 * Update "f_Desired" to be the nearest "combinational-multiple" of in MT2063_ChooseFirstIF()
561 pAS_Info->f_LO1_Step * in MT2063_ChooseFirstIF()
562 ((pAS_Info->f_if1_Request + pAS_Info->f_in + in MT2063_ChooseFirstIF()
563 pAS_Info->f_LO1_Step / 2) / pAS_Info->f_LO1_Step) - in MT2063_ChooseFirstIF()
564 pAS_Info->f_in; in MT2063_ChooseFirstIF()
566 (pAS_Info->f_LO1_Step > in MT2063_ChooseFirstIF()
567 pAS_Info->f_LO2_Step) ? pAS_Info->f_LO1_Step : pAS_Info-> in MT2063_ChooseFirstIF()
576 struct MT2063_ExclZone_t *pNode = pAS_Info->usedZones; in MT2063_ChooseFirstIF()
581 if (pAS_Info->nZones == 0) in MT2063_ChooseFirstIF()
588 if (pAS_Info->f_if1_Center > f_Desired) in MT2063_ChooseFirstIF()
592 ((pAS_Info->f_if1_Center - f_Desired + in MT2063_ChooseFirstIF()
596 f_Desired - in MT2063_ChooseFirstIF()
598 ((f_Desired - pAS_Info->f_if1_Center + in MT2063_ChooseFirstIF()
608 floor((s32) (pNode->min_ - f_Center), (s32) f_Step); in MT2063_ChooseFirstIF()
612 ceil((s32) (pNode->max_ - f_Center), (s32) f_Step); in MT2063_ChooseFirstIF()
614 if ((pNode->min_ < f_Desired) && (pNode->max_ > f_Desired)) in MT2063_ChooseFirstIF()
621 if ((j > 0) && (tmpMin < zones[j - 1].max_)) in MT2063_ChooseFirstIF()
622 zones[j - 1].max_ = tmpMax; in MT2063_ChooseFirstIF()
629 pNode = pNode->next_; in MT2063_ChooseFirstIF()
654 return f_Center - ((u32) (-bestDiff) * f_Step); in MT2063_ChooseFirstIF()
660 * IsSpurInBand() - Checks to see if a spur will be present within the IF's
661 * bandwidth. (fIFOut +/- fIFBW, -fIFOut +/- fIFBW)
664 * <--+-+-+-------------------+-------------------+-+-+-->
666 * ^ b=-fIFOut+fIFBW/2 -b=+fIFOut-fIFBW/2 ^
667 * a=-fIFOut-fIFBW/2 -a=+fIFOut+fIFBW/2
669 * Note that some equations are doubled to prevent round-off
682 ** Calculate LO frequency settings. in IsSpurInBand()
685 const u32 f_LO1 = pAS_Info->f_LO1; in IsSpurInBand()
686 const u32 f_LO2 = pAS_Info->f_LO2; in IsSpurInBand()
687 const u32 d = pAS_Info->f_out + pAS_Info->f_out_bw / 2; in IsSpurInBand()
688 const u32 c = d - pAS_Info->f_out_bw; in IsSpurInBand()
689 const u32 f = pAS_Info->f_zif_bw / 2; in IsSpurInBand()
690 const u32 f_Scale = (f_LO1 / (UINT_MAX / 2 / pAS_Info->maxH1)) + 1; in IsSpurInBand()
703 ** gcd-based scale factor or f_Scale. in IsSpurInBand()
713 n0 = DIV_ROUND_UP(f_LO2 - d, f_LO1 - f_LO2); in IsSpurInBand()
716 for (n = n0; n <= pAS_Info->maxH1; ++n) { in IsSpurInBand()
717 md = (n * ((f_LO1 + hgds) / gd_Scale) - in IsSpurInBand()
721 if (md >= pAS_Info->maxH1) in IsSpurInBand()
727 /* If no spurs between +/- (f_out + f_IFBW/2), then try next harmonic */ in IsSpurInBand()
731 mc = (n * ((f_LO1 + hgcs) / gc_Scale) - in IsSpurInBand()
737 (gc_Scale * (f_nsLO1 - f_nsLO2)) + in IsSpurInBand()
738 n * (f_LO1 % gc_Scale) - mc * (f_LO2 % gc_Scale); in IsSpurInBand()
740 *fp = ((f_Spur - (s32) c) / (mc - n)) + 1; in IsSpurInBand()
741 *fm = (((s32) d - f_Spur) / (mc - n)) + 1; in IsSpurInBand()
745 /* Location of Zero-IF-spur to be checked */ in IsSpurInBand()
748 mf = (n * ((f_LO1 + hgfs) / gf_Scale) - in IsSpurInBand()
754 (gf_Scale * (f_nsLO1 - f_nsLO2)) + in IsSpurInBand()
755 n * (f_LO1 % gf_Scale) - me * (f_LO2 % gf_Scale); in IsSpurInBand()
757 *fp = ((f_Spur + (s32) f) / (me - n)) + 1; in IsSpurInBand()
758 *fm = (((s32) f - f_Spur) / (me - n)) + 1; in IsSpurInBand()
768 (gc_Scale * (f_nsLO1 - f_nsLO2)) + in IsSpurInBand()
769 n * (f_LO1 % gc_Scale) - ma * (f_LO2 % gc_Scale); in IsSpurInBand()
771 *fp = (((s32) d + f_Spur) / (ma - n)) + 1; in IsSpurInBand()
772 *fm = (-(f_Spur + (s32) c) / (ma - n)) + 1; in IsSpurInBand()
782 * MT_AvoidSpurs() - Main entry point to avoid spurs.
784 * and if present, chooses spur-free LO1, LO2 combination
791 pAS_Info->bSpurAvoided = 0; in MT2063_AvoidSpurs()
792 pAS_Info->nSpursFound = 0; in MT2063_AvoidSpurs()
796 if (pAS_Info->maxH1 == 0) in MT2063_AvoidSpurs()
802 * Make sure that have no LO-related spurs within the IF output in MT2063_AvoidSpurs()
805 * If there is an LO spur in this band, start at the current IF1 frequency in MT2063_AvoidSpurs()
806 * and work out until we find a spur-free frequency or run up against the in MT2063_AvoidSpurs()
808 * will be unchanged if a spur-free setting is not found. in MT2063_AvoidSpurs()
810 pAS_Info->bSpurPresent = IsSpurInBand(pAS_Info, &fm, &fp); in MT2063_AvoidSpurs()
811 if (pAS_Info->bSpurPresent) { in MT2063_AvoidSpurs()
812 u32 zfIF1 = pAS_Info->f_LO1 - pAS_Info->f_in; /* current attempt at a 1st IF */ in MT2063_AvoidSpurs()
813 u32 zfLO1 = pAS_Info->f_LO1; /* current attempt at an LO1 freq */ in MT2063_AvoidSpurs()
814 u32 zfLO2 = pAS_Info->f_LO2; /* current attempt at an LO2 freq */ in MT2063_AvoidSpurs()
819 ** Spur was found, attempt to find a spur-free 1st IF in MT2063_AvoidSpurs()
822 pAS_Info->nSpursFound++; in MT2063_AvoidSpurs()
825 MT2063_AddExclZone(pAS_Info, zfIF1 - fm, zfIF1 + fp); in MT2063_AvoidSpurs()
831 pAS_Info->f_LO1 += (new_IF1 - zfIF1); in MT2063_AvoidSpurs()
832 pAS_Info->f_LO2 += (new_IF1 - zfIF1); in MT2063_AvoidSpurs()
834 pAS_Info->f_LO1 -= (zfIF1 - new_IF1); in MT2063_AvoidSpurs()
835 pAS_Info->f_LO2 -= (zfIF1 - new_IF1); in MT2063_AvoidSpurs()
839 if (zfIF1 > pAS_Info->f_if1_Center) in MT2063_AvoidSpurs()
840 delta_IF1 = zfIF1 - pAS_Info->f_if1_Center; in MT2063_AvoidSpurs()
842 delta_IF1 = pAS_Info->f_if1_Center - zfIF1; in MT2063_AvoidSpurs()
844 pAS_Info->bSpurPresent = IsSpurInBand(pAS_Info, &fm, &fp); in MT2063_AvoidSpurs()
849 } while ((2 * delta_IF1 + pAS_Info->f_out_bw <= pAS_Info->f_if1_bw) && pAS_Info->bSpurPresent); in MT2063_AvoidSpurs()
852 * Use the LO-spur free values found. If the search went all in MT2063_AvoidSpurs()
856 if (pAS_Info->bSpurPresent == 1) { in MT2063_AvoidSpurs()
858 pAS_Info->f_LO1 = zfLO1; in MT2063_AvoidSpurs()
859 pAS_Info->f_LO2 = zfLO2; in MT2063_AvoidSpurs()
861 pAS_Info->bSpurAvoided = 1; in MT2063_AvoidSpurs()
865 ((pAS_Info-> in MT2063_AvoidSpurs()
874 #define MT2063_REF_FREQ (16000000UL) /* Reference oscillator Frequency (in Hz) */
875 #define MT2063_IF1_BW (22000000UL) /* The IF1 filter bandwidth (in Hz) */
877 #define MT2063_SPUR_STEP_HZ (250000UL) /* Step size (in Hz) to move IF1 when avoiding spurs …
878 #define MT2063_ZIF_BW (2000000UL) /* Zero-IF spur-free bandwidth (in Hz) */
879 #define MT2063_MAX_HARMONICS_1 (15UL) /* Highest intra-tuner LO Spur Harmonic to be avoided…
880 #define MT2063_MAX_HARMONICS_2 (5UL) /* Highest inter-tuner LO Spur Harmonic to be avoided…
881 #define MT2063_MIN_LO_SEP (1000000UL) /* Minimum inter-tuner LO frequency separation */
882 #define MT2063_LO1_FRACN_AVOID (0UL) /* LO1 FracN numerator avoid region (in Hz) */
883 #define MT2063_LO2_FRACN_AVOID (199999UL) /* LO2 FracN numerator avoid region (in Hz) */
884 #define MT2063_MIN_FIN_FREQ (44000000UL) /* Minimum input frequency (in Hz) */
885 #define MT2063_MAX_FIN_FREQ (1100000000UL) /* Maximum input frequency (in Hz) */
886 #define MT2063_MIN_FOUT_FREQ (36000000UL) /* Minimum output frequency (in Hz) */
887 #define MT2063_MAX_FOUT_FREQ (57000000UL) /* Maximum output frequency (in Hz) */
888 #define MT2063_MIN_DNC_FREQ (1293000000UL) /* Minimum LO2 frequency (in Hz) */
889 #define MT2063_MAX_DNC_FREQ (1614000000UL) /* Maximum LO2 frequency (in Hz) */
890 #define MT2063_MIN_UPC_FREQ (1396000000UL) /* Minimum LO1 frequency (in Hz) */
891 #define MT2063_MAX_UPC_FREQ (2750000000UL) /* Maximum LO1 frequency (in Hz) */
902 * mt2063_lockStatus - Checks to see if LO1 and LO2 are locked
921 if (state->tuner_id == MT2063_B0) in mt2063_lockStatus()
926 &state->reg[MT2063_REG_LO_STATUS], 1); in mt2063_lockStatus()
931 if ((state->reg[MT2063_REG_LO_STATUS] & (LO1LK | LO2LK)) == in mt2063_lockStatus()
951 * -------------+----------------------------------------------
958 * --------------+----------------------------------------------
960 * |<---------- Mode -------------->|
962 * ------------+-----+-----+-----+-----+-----+-----+
1022 if ((state->reg[MT2063_REG_DNC_GAIN] & 0x03) == 0x03) { /* if DNC1 is off */ in mt2063_get_dnc_output_enable()
1023 if ((state->reg[MT2063_REG_VGA_GAIN] & 0x03) == 0x03) /* if DNC2 is off */ in mt2063_get_dnc_output_enable()
1028 if ((state->reg[MT2063_REG_VGA_GAIN] & 0x03) == 0x03) /* if DNC2 is off */ in mt2063_get_dnc_output_enable()
1048 switch (nValue) { in mt2063_set_dnc_output_enable()
1050 val = (state->reg[MT2063_REG_DNC_GAIN] & 0xFC) | 0x03; /* Set DNC1GC=3 */ in mt2063_set_dnc_output_enable()
1051 if (state->reg[MT2063_REG_DNC_GAIN] != in mt2063_set_dnc_output_enable()
1058 val = (state->reg[MT2063_REG_VGA_GAIN] & 0xFC) | 0x03; /* Set DNC2GC=3 */ in mt2063_set_dnc_output_enable()
1059 if (state->reg[MT2063_REG_VGA_GAIN] != in mt2063_set_dnc_output_enable()
1066 val = (state->reg[MT2063_REG_RSVD_20] & ~0x40); /* Set PD2MUX=0 */ in mt2063_set_dnc_output_enable()
1067 if (state->reg[MT2063_REG_RSVD_20] != in mt2063_set_dnc_output_enable()
1076 …val = (state->reg[MT2063_REG_DNC_GAIN] & 0xFC) | (DNC1GC[state->rcvr_mode] & 0x03); /* Set DNC1GC=… in mt2063_set_dnc_output_enable()
1077 if (state->reg[MT2063_REG_DNC_GAIN] != in mt2063_set_dnc_output_enable()
1084 val = (state->reg[MT2063_REG_VGA_GAIN] & 0xFC) | 0x03; /* Set DNC2GC=3 */ in mt2063_set_dnc_output_enable()
1085 if (state->reg[MT2063_REG_VGA_GAIN] != in mt2063_set_dnc_output_enable()
1092 val = (state->reg[MT2063_REG_RSVD_20] & ~0x40); /* Set PD2MUX=0 */ in mt2063_set_dnc_output_enable()
1093 if (state->reg[MT2063_REG_RSVD_20] != in mt2063_set_dnc_output_enable()
1102 val = (state->reg[MT2063_REG_DNC_GAIN] & 0xFC) | 0x03; /* Set DNC1GC=3 */ in mt2063_set_dnc_output_enable()
1103 if (state->reg[MT2063_REG_DNC_GAIN] != in mt2063_set_dnc_output_enable()
1110 …val = (state->reg[MT2063_REG_VGA_GAIN] & 0xFC) | (DNC2GC[state->rcvr_mode] & 0x03); /* Set DNC2GC=… in mt2063_set_dnc_output_enable()
1111 if (state->reg[MT2063_REG_VGA_GAIN] != in mt2063_set_dnc_output_enable()
1118 val = (state->reg[MT2063_REG_RSVD_20] | 0x40); /* Set PD2MUX=1 */ in mt2063_set_dnc_output_enable()
1119 if (state->reg[MT2063_REG_RSVD_20] != in mt2063_set_dnc_output_enable()
1128 …val = (state->reg[MT2063_REG_DNC_GAIN] & 0xFC) | (DNC1GC[state->rcvr_mode] & 0x03); /* Set DNC1GC=… in mt2063_set_dnc_output_enable()
1129 if (state->reg[MT2063_REG_DNC_GAIN] != in mt2063_set_dnc_output_enable()
1136 …val = (state->reg[MT2063_REG_VGA_GAIN] & 0xFC) | (DNC2GC[state->rcvr_mode] & 0x03); /* Set DNC2GC=… in mt2063_set_dnc_output_enable()
1137 if (state->reg[MT2063_REG_VGA_GAIN] != in mt2063_set_dnc_output_enable()
1144 val = (state->reg[MT2063_REG_RSVD_20] | 0x40); /* Set PD2MUX=1 */ in mt2063_set_dnc_output_enable()
1145 if (state->reg[MT2063_REG_RSVD_20] != in mt2063_set_dnc_output_enable()
1161 * MT2063_SetReceiverMode() - Set the MT2063 receiver mode, according with
1183 status = -ERANGE; in MT2063_SetReceiverMode()
1188 (state-> in MT2063_SetReceiverMode()
1192 if (state->reg[MT2063_REG_PD1_TGT] != val) in MT2063_SetReceiverMode()
1198 u8 val = (state->reg[MT2063_REG_CTRL_2C] & ~0x03) | in MT2063_SetReceiverMode()
1200 if (state->reg[MT2063_REG_CTRL_2C] != val) in MT2063_SetReceiverMode()
1207 (state-> in MT2063_SetReceiverMode()
1210 if (state->reg[MT2063_REG_FIFF_CTRL2] != val) { in MT2063_SetReceiverMode()
1215 (state->reg[MT2063_REG_FIFF_CTRL] | 0x01); in MT2063_SetReceiverMode()
1219 (state-> in MT2063_SetReceiverMode()
1232 u8 val = (state->reg[MT2063_REG_LNA_OV] & ~0x1F) | in MT2063_SetReceiverMode()
1234 if (state->reg[MT2063_REG_LNA_OV] != val) in MT2063_SetReceiverMode()
1240 u8 val = (state->reg[MT2063_REG_LNA_TGT] & ~0x3F) | in MT2063_SetReceiverMode()
1242 if (state->reg[MT2063_REG_LNA_TGT] != val) in MT2063_SetReceiverMode()
1248 u8 val = (state->reg[MT2063_REG_RF_OV] & ~0x1F) | in MT2063_SetReceiverMode()
1250 if (state->reg[MT2063_REG_RF_OV] != val) in MT2063_SetReceiverMode()
1256 u8 val = (state->reg[MT2063_REG_PD1_TGT] & ~0x3F) | in MT2063_SetReceiverMode()
1258 if (state->reg[MT2063_REG_PD1_TGT] != val) in MT2063_SetReceiverMode()
1265 if (state->reg[MT2063_REG_PART_REV] != MT2063_B3 && val > 5) in MT2063_SetReceiverMode()
1267 val = (state->reg[MT2063_REG_FIF_OV] & ~0x1F) | in MT2063_SetReceiverMode()
1269 if (state->reg[MT2063_REG_FIF_OV] != val) in MT2063_SetReceiverMode()
1275 u8 val = (state->reg[MT2063_REG_PD2_TGT] & ~0x3F) | in MT2063_SetReceiverMode()
1277 if (state->reg[MT2063_REG_PD2_TGT] != val) in MT2063_SetReceiverMode()
1283 val = (state->reg[MT2063_REG_LNA_TGT] & ~0x80) | in MT2063_SetReceiverMode()
1285 if (state->reg[MT2063_REG_LNA_TGT] != val) in MT2063_SetReceiverMode()
1291 val = (state->reg[MT2063_REG_PD1_TGT] & ~0x80) | in MT2063_SetReceiverMode()
1293 if (state->reg[MT2063_REG_PD1_TGT] != val) in MT2063_SetReceiverMode()
1298 state->rcvr_mode = Mode; in MT2063_SetReceiverMode()
1300 mt2063_mode_name[state->rcvr_mode]); in MT2063_SetReceiverMode()
1307 * MT2063_ClearPowerMaskBits () - Clears the power-down mask bits for various
1323 state->reg[MT2063_REG_PWR_2] &= ~(u8) (Bits >> 8); in MT2063_ClearPowerMaskBits()
1327 &state->reg[MT2063_REG_PWR_2], 1); in MT2063_ClearPowerMaskBits()
1330 state->reg[MT2063_REG_PWR_1] &= ~(u8) (Bits & 0xFF); in MT2063_ClearPowerMaskBits()
1334 &state->reg[MT2063_REG_PWR_1], 1); in MT2063_ClearPowerMaskBits()
1341 * MT2063_SoftwareShutdown() - Enables or disables software shutdown function.
1351 state->reg[MT2063_REG_PWR_1] |= 0x04; in MT2063_SoftwareShutdown()
1353 state->reg[MT2063_REG_PWR_1] &= ~0x04; in MT2063_SoftwareShutdown()
1357 &state->reg[MT2063_REG_PWR_1], 1); in MT2063_SoftwareShutdown()
1360 state->reg[MT2063_REG_BYP_CTRL] = in MT2063_SoftwareShutdown()
1361 (state->reg[MT2063_REG_BYP_CTRL] & 0x9F) | 0x40; in MT2063_SoftwareShutdown()
1365 &state->reg[MT2063_REG_BYP_CTRL], in MT2063_SoftwareShutdown()
1367 state->reg[MT2063_REG_BYP_CTRL] = in MT2063_SoftwareShutdown()
1368 (state->reg[MT2063_REG_BYP_CTRL] & 0x9F); in MT2063_SoftwareShutdown()
1372 &state->reg[MT2063_REG_BYP_CTRL], in MT2063_SoftwareShutdown()
1386 * fLO_FractionalTerm() - Calculates the portion contributed by FracN / denom.
1389 * f_ref * num / denom to within 1 HZ with fixed math.
1391 * @f_ref: SRO frequency.
1395 * This calculation handles f_ref as two separate 14-bit fields.
1396 * Therefore, a maximum value of 2^28-1 may safely be used for f_ref.
1414 * CalcLO1Mult()- Calculates Integer divider value and the numerator
1422 * @f_LO: desired LO frequency.
1423 * @f_LO_Step: Minimum step size for the LO (in Hz).
1424 * @f_Ref: SRO frequency.
1426 * of f_Ref (in Hz).
1428 * Returns: Recalculated LO frequency.
1447 * CalcLO2Mult() - Calculates Integer divider value and the numerator
1455 * @f_LO: desired LO frequency.
1456 * @f_LO_Step: Minimum step size for the LO (in Hz).
1457 * @f_Ref: SRO frequency.
1459 * Returns: Recalculated LO frequency.
1479 * FindClearTuneFilter() - Calculate the corrrect ClearTune filter to be
1480 * used for a given input frequency.
1483 * @f_in: RF input center frequency (in Hz).
1485 * Returns: ClearTune filter number (0-31)
1497 if (state->CTFiltMax[idx] >= f_in) { in FindClearTuneFilter()
1506 * MT2063_Tune() - Change the tuner's tuned frequency to RFin.
1509 { /* RF input center frequency */ in MT2063_Tune()
1526 /* Check the input and output frequency ranges */ in MT2063_Tune()
1528 return -EINVAL; in MT2063_Tune()
1530 if ((state->AS_Data.f_out < MT2063_MIN_FOUT_FREQ) in MT2063_Tune()
1531 || (state->AS_Data.f_out > MT2063_MAX_FOUT_FREQ)) in MT2063_Tune()
1532 return -EINVAL; in MT2063_Tune()
1537 ofLO1 = state->AS_Data.f_LO1; in MT2063_Tune()
1538 ofLO2 = state->AS_Data.f_LO2; in MT2063_Tune()
1543 if (state->ctfilt_sw == 1) { in MT2063_Tune()
1544 val = (state->reg[MT2063_REG_CTUNE_CTRL] | 0x08); in MT2063_Tune()
1545 if (state->reg[MT2063_REG_CTUNE_CTRL] != val) { in MT2063_Tune()
1549 val = state->reg[MT2063_REG_CTUNE_OV]; in MT2063_Tune()
1551 state->reg[MT2063_REG_CTUNE_OV] = in MT2063_Tune()
1552 (u8) ((state->reg[MT2063_REG_CTUNE_OV] & ~0x1F) in MT2063_Tune()
1554 if (state->reg[MT2063_REG_CTUNE_OV] != val) { in MT2063_Tune()
1561 * Read the FIFF Center Frequency from the tuner in MT2063_Tune()
1567 &state->reg[MT2063_REG_FIFFC], 1); in MT2063_Tune()
1568 fiffc = state->reg[MT2063_REG_FIFFC]; in MT2063_Tune()
1573 state->AS_Data.f_in = f_in; in MT2063_Tune()
1575 state->AS_Data.f_if1_Request = in MT2063_Tune()
1576 MT2063_Round_fLO(state->AS_Data.f_if1_Request + f_in, in MT2063_Tune()
1577 state->AS_Data.f_LO1_Step, in MT2063_Tune()
1578 state->AS_Data.f_ref) - f_in; in MT2063_Tune()
1581 * Calculate frequency settings. f_IF1_FREQ + f_in is the in MT2063_Tune()
1582 * desired LO1 frequency in MT2063_Tune()
1584 MT2063_ResetExclZones(&state->AS_Data); in MT2063_Tune()
1586 f_IF1 = MT2063_ChooseFirstIF(&state->AS_Data); in MT2063_Tune()
1588 state->AS_Data.f_LO1 = in MT2063_Tune()
1589 MT2063_Round_fLO(f_IF1 + f_in, state->AS_Data.f_LO1_Step, in MT2063_Tune()
1590 state->AS_Data.f_ref); in MT2063_Tune()
1592 state->AS_Data.f_LO2 = in MT2063_Tune()
1593 MT2063_Round_fLO(state->AS_Data.f_LO1 - state->AS_Data.f_out - f_in, in MT2063_Tune()
1594 state->AS_Data.f_LO2_Step, state->AS_Data.f_ref); in MT2063_Tune()
1600 status |= MT2063_AvoidSpurs(&state->AS_Data); in MT2063_Tune()
1606 state->AS_Data.f_LO1 = in MT2063_Tune()
1607 MT2063_CalcLO1Mult(&LO1, &Num1, state->AS_Data.f_LO1, in MT2063_Tune()
1608 state->AS_Data.f_LO1_Step, state->AS_Data.f_ref); in MT2063_Tune()
1609 state->AS_Data.f_LO2 = in MT2063_Tune()
1610 MT2063_Round_fLO(state->AS_Data.f_LO1 - state->AS_Data.f_out - f_in, in MT2063_Tune()
1611 state->AS_Data.f_LO2_Step, state->AS_Data.f_ref); in MT2063_Tune()
1612 state->AS_Data.f_LO2 = in MT2063_Tune()
1613 MT2063_CalcLO2Mult(&LO2, &Num2, state->AS_Data.f_LO2, in MT2063_Tune()
1614 state->AS_Data.f_LO2_Step, state->AS_Data.f_ref); in MT2063_Tune()
1617 * Check the upconverter and downconverter frequency ranges in MT2063_Tune()
1619 if ((state->AS_Data.f_LO1 < MT2063_MIN_UPC_FREQ) in MT2063_Tune()
1620 || (state->AS_Data.f_LO1 > MT2063_MAX_UPC_FREQ)) in MT2063_Tune()
1622 if ((state->AS_Data.f_LO2 < MT2063_MIN_DNC_FREQ) in MT2063_Tune()
1623 || (state->AS_Data.f_LO2 > MT2063_MAX_DNC_FREQ)) in MT2063_Tune()
1626 if (state->tuner_id == MT2063_B0) in MT2063_Tune()
1631 * then skip re-programming the LO registers. in MT2063_Tune()
1633 if ((ofLO1 != state->AS_Data.f_LO1) in MT2063_Tune()
1634 || (ofLO2 != state->AS_Data.f_LO2) in MT2063_Tune()
1635 || ((state->reg[MT2063_REG_LO_STATUS] & (LO1LK | LO2LK)) != in MT2063_Tune()
1641 * FIFFOF = ------------ - 8 * FIFFC - 4992 in MT2063_Tune()
1645 (state->AS_Data.f_LO1 - in MT2063_Tune()
1646 f_in) / (state->AS_Data.f_ref / 64) - 8 * (u32) fiffc - in MT2063_Tune()
1656 state->reg[MT2063_REG_LO1CQ_1] = (u8) (LO1 & 0xFF); /* DIV1q */ in MT2063_Tune()
1657 state->reg[MT2063_REG_LO1CQ_2] = (u8) (Num1 & 0x3F); /* NUM1q */ in MT2063_Tune()
1658 state->reg[MT2063_REG_LO2CQ_1] = (u8) (((LO2 & 0x7F) << 1) /* DIV2q */ in MT2063_Tune()
1660 state->reg[MT2063_REG_LO2CQ_2] = (u8) ((Num2 & 0x0FF0) >> 4); /* NUM2q (mid) */ in MT2063_Tune()
1661 state->reg[MT2063_REG_LO2CQ_3] = (u8) (0xE0 | (Num2 & 0x000F)); /* NUM2q (lo) */ in MT2063_Tune()
1668 …status |= mt2063_write(state, MT2063_REG_LO1CQ_1, &state->reg[MT2063_REG_LO1CQ_1], 5); /* 0x01 - 0… in MT2063_Tune()
1669 if (state->tuner_id == MT2063_B0) { in MT2063_Tune()
1670 /* Re-write the one-shot bits to trigger the tune operation */ in MT2063_Tune()
1671 … status |= mt2063_write(state, MT2063_REG_LO2CQ_3, &state->reg[MT2063_REG_LO2CQ_3], 1); /* 0x05 */ in MT2063_Tune()
1674 if (state->reg[MT2063_REG_FIFF_OFFSET] != in MT2063_Tune()
1676 state->reg[MT2063_REG_FIFF_OFFSET] = in MT2063_Tune()
1681 &state-> in MT2063_Tune()
1698 return -EINVAL; /* Couldn't lock */ in MT2063_Tune()
1703 state->f_IF1_actual = state->AS_Data.f_LO1 - f_in; in MT2063_Tune()
1733 /* writing 0x05 0xf0 sw-resets all registers, so we write only needed changes */
1746 0x22, 0x21, /* New - ver 1.03 */
1747 0x23, 0x3C, /* New - ver 1.10 */
1748 0x24, 0x20, /* New - ver 1.03 */
1752 0x30, 0x0C, /* New - ver 1.11 */
1753 0x31, 0x1B, /* New - ver 1.11 */
1760 /* writing 0x05 0xf0 sw-resets all registers, so we write only needed changes */
1775 struct mt2063_state *state = fe->tuner_priv; in mt2063_init()
1786 state->rcvr_mode = MT2063_CABLE_QAM; in mt2063_init()
1790 &state->reg[MT2063_REG_PART_REV], 1); in mt2063_init()
1797 switch (state->reg[MT2063_REG_PART_REV]) { in mt2063_init()
1812 state->reg[MT2063_REG_PART_REV]); in mt2063_init()
1813 return -ENODEV; /* Wrong tuner Part/Rev code */ in mt2063_init()
1818 &state->reg[MT2063_REG_RSVD_3B], 1); in mt2063_init()
1821 if (status < 0 || ((state->reg[MT2063_REG_RSVD_3B] & 0x80) != 0x00)) { in mt2063_init()
1823 state->reg[MT2063_REG_PART_REV], in mt2063_init()
1824 state->reg[MT2063_REG_RSVD_3B]); in mt2063_init()
1825 return -ENODEV; /* Wrong tuner Part/Rev code */ in mt2063_init()
1836 /* def = (state->reg[PART_REV] == MT2063_B0) ? MT2063B0_defaults : MT2063B1_defaults; */ in mt2063_init()
1837 switch (state->reg[MT2063_REG_PART_REV]) { in mt2063_init()
1851 return -ENODEV; in mt2063_init()
1866 while (status >= 0 && (FCRUN != 0) && (maxReads-- > 0)) { in mt2063_init()
1870 &state-> in mt2063_init()
1872 FCRUN = (state->reg[MT2063_REG_XO_STATUS] & 0x40) >> 6; in mt2063_init()
1876 return -ENODEV; in mt2063_init()
1880 &state->reg[MT2063_REG_FIFFC], 1); in mt2063_init()
1887 state->reg, MT2063_REG_END_REGS); in mt2063_init()
1892 state->tuner_id = state->reg[MT2063_REG_PART_REV]; in mt2063_init()
1893 state->AS_Data.f_ref = MT2063_REF_FREQ; in mt2063_init()
1894 state->AS_Data.f_if1_Center = (state->AS_Data.f_ref / 8) * in mt2063_init()
1895 ((u32) state->reg[MT2063_REG_FIFFC] + 640); in mt2063_init()
1896 state->AS_Data.f_if1_bw = MT2063_IF1_BW; in mt2063_init()
1897 state->AS_Data.f_out = 43750000UL; in mt2063_init()
1898 state->AS_Data.f_out_bw = 6750000UL; in mt2063_init()
1899 state->AS_Data.f_zif_bw = MT2063_ZIF_BW; in mt2063_init()
1900 state->AS_Data.f_LO1_Step = state->AS_Data.f_ref / 64; in mt2063_init()
1901 state->AS_Data.f_LO2_Step = MT2063_TUNE_STEP_SIZE; in mt2063_init()
1902 state->AS_Data.maxH1 = MT2063_MAX_HARMONICS_1; in mt2063_init()
1903 state->AS_Data.maxH2 = MT2063_MAX_HARMONICS_2; in mt2063_init()
1904 state->AS_Data.f_min_LO_Separation = MT2063_MIN_LO_SEP; in mt2063_init()
1905 state->AS_Data.f_if1_Request = state->AS_Data.f_if1_Center; in mt2063_init()
1906 state->AS_Data.f_LO1 = 2181000000UL; in mt2063_init()
1907 state->AS_Data.f_LO2 = 1486249786UL; in mt2063_init()
1908 state->f_IF1_actual = state->AS_Data.f_if1_Center; in mt2063_init()
1909 state->AS_Data.f_in = state->AS_Data.f_LO1 - state->f_IF1_actual; in mt2063_init()
1910 state->AS_Data.f_LO1_FracN_Avoid = MT2063_LO1_FRACN_AVOID; in mt2063_init()
1911 state->AS_Data.f_LO2_FracN_Avoid = MT2063_LO2_FRACN_AVOID; in mt2063_init()
1912 state->num_regs = MT2063_REG_END_REGS; in mt2063_init()
1913 state->AS_Data.avoidDECT = MT2063_AVOID_BOTH; in mt2063_init()
1914 state->ctfilt_sw = 0; in mt2063_init()
1916 state->CTFiltMax[0] = 69230000; in mt2063_init()
1917 state->CTFiltMax[1] = 105770000; in mt2063_init()
1918 state->CTFiltMax[2] = 140350000; in mt2063_init()
1919 state->CTFiltMax[3] = 177110000; in mt2063_init()
1920 state->CTFiltMax[4] = 212860000; in mt2063_init()
1921 state->CTFiltMax[5] = 241130000; in mt2063_init()
1922 state->CTFiltMax[6] = 274370000; in mt2063_init()
1923 state->CTFiltMax[7] = 309820000; in mt2063_init()
1924 state->CTFiltMax[8] = 342450000; in mt2063_init()
1925 state->CTFiltMax[9] = 378870000; in mt2063_init()
1926 state->CTFiltMax[10] = 416210000; in mt2063_init()
1927 state->CTFiltMax[11] = 456500000; in mt2063_init()
1928 state->CTFiltMax[12] = 495790000; in mt2063_init()
1929 state->CTFiltMax[13] = 534530000; in mt2063_init()
1930 state->CTFiltMax[14] = 572610000; in mt2063_init()
1931 state->CTFiltMax[15] = 598970000; in mt2063_init()
1932 state->CTFiltMax[16] = 635910000; in mt2063_init()
1933 state->CTFiltMax[17] = 672130000; in mt2063_init()
1934 state->CTFiltMax[18] = 714840000; in mt2063_init()
1935 state->CTFiltMax[19] = 739660000; in mt2063_init()
1936 state->CTFiltMax[20] = 770410000; in mt2063_init()
1937 state->CTFiltMax[21] = 814660000; in mt2063_init()
1938 state->CTFiltMax[22] = 846950000; in mt2063_init()
1939 state->CTFiltMax[23] = 867820000; in mt2063_init()
1940 state->CTFiltMax[24] = 915980000; in mt2063_init()
1941 state->CTFiltMax[25] = 947450000; in mt2063_init()
1942 state->CTFiltMax[26] = 983110000; in mt2063_init()
1943 state->CTFiltMax[27] = 1021630000; in mt2063_init()
1944 state->CTFiltMax[28] = 1061870000; in mt2063_init()
1945 state->CTFiltMax[29] = 1098330000; in mt2063_init()
1946 state->CTFiltMax[30] = 1138990000; in mt2063_init()
1953 state->reg[MT2063_REG_CTUNE_CTRL] = 0x0A; in mt2063_init()
1955 &state->reg[MT2063_REG_CTUNE_CTRL], 1); in mt2063_init()
1961 &state->reg[MT2063_REG_FIFFC], 1); in mt2063_init()
1965 fcu_osc = state->reg[MT2063_REG_FIFFC]; in mt2063_init()
1967 state->reg[MT2063_REG_CTUNE_CTRL] = 0x00; in mt2063_init()
1969 &state->reg[MT2063_REG_CTUNE_CTRL], 1); in mt2063_init()
1973 /* Adjust each of the values in the ClearTune filter cross-over table */ in mt2063_init()
1975 state->CTFiltMax[i] = (state->CTFiltMax[i] / 768) * (fcu_osc + 640); in mt2063_init()
1984 state->init = true; in mt2063_init()
1991 struct mt2063_state *state = fe->tuner_priv; in mt2063_get_status()
1996 if (!state->init) in mt2063_get_status()
1997 return -ENODEV; in mt2063_get_status()
2013 struct mt2063_state *state = fe->tuner_priv; in mt2063_release()
2017 fe->tuner_priv = NULL; in mt2063_release()
2024 struct mt2063_state *state = fe->tuner_priv; in mt2063_set_analog_params()
2034 if (!state->init) { in mt2063_set_analog_params()
2040 switch (params->mode) { in mt2063_set_analog_params()
2044 pict2chanb_vsb = -(ch_bw / 2); in mt2063_set_analog_params()
2049 if (params->std & ~V4L2_STD_MN) { in mt2063_set_analog_params()
2052 pict2chanb_vsb = -1250000; in mt2063_set_analog_params()
2053 } else if (params->std & V4L2_STD_PAL_G) { in mt2063_set_analog_params()
2056 pict2chanb_vsb = -1250000; in mt2063_set_analog_params()
2060 pict2chanb_vsb = -1250000; in mt2063_set_analog_params()
2064 return -EINVAL; in mt2063_set_analog_params()
2066 if_mid = pict_car - (pict2chanb_vsb + (ch_bw / 2)); in mt2063_set_analog_params()
2068 state->AS_Data.f_LO2_Step = 125000; /* FIXME: probably 5000 for FM */ in mt2063_set_analog_params()
2069 state->AS_Data.f_out = if_mid; in mt2063_set_analog_params()
2070 state->AS_Data.f_out_bw = ch_bw + 750000; in mt2063_set_analog_params()
2075 dprintk(1, "Tuning to frequency: %d, bandwidth %d, foffset %d\n", in mt2063_set_analog_params()
2076 params->frequency, ch_bw, pict2chanb_vsb); in mt2063_set_analog_params()
2078 status = MT2063_Tune(state, (params->frequency + (pict2chanb_vsb + (ch_bw / 2)))); in mt2063_set_analog_params()
2082 state->frequency = params->frequency; in mt2063_set_analog_params()
2087 * As defined on EN 300 429, the DVB-C roll-off factor is 0.15.
2097 struct dtv_frontend_properties *c = &fe->dtv_property_cache; in mt2063_set_params()
2098 struct mt2063_state *state = fe->tuner_priv; in mt2063_set_params()
2106 if (!state->init) { in mt2063_set_params()
2114 if (c->bandwidth_hz == 0) in mt2063_set_params()
2115 return -EINVAL; in mt2063_set_params()
2116 if (c->bandwidth_hz <= 6000000) in mt2063_set_params()
2118 else if (c->bandwidth_hz <= 7000000) in mt2063_set_params()
2123 switch (c->delivery_system) { in mt2063_set_params()
2127 pict2chanb_vsb = -(ch_bw / 2); in mt2063_set_params()
2133 pict2chanb_vsb = -(ch_bw / 2); in mt2063_set_params()
2136 return -EINVAL; in mt2063_set_params()
2138 if_mid = pict_car - (pict2chanb_vsb + (ch_bw / 2)); in mt2063_set_params()
2140 state->AS_Data.f_LO2_Step = 125000; /* FIXME: probably 5000 for FM */ in mt2063_set_params()
2141 state->AS_Data.f_out = if_mid; in mt2063_set_params()
2142 state->AS_Data.f_out_bw = ch_bw + 750000; in mt2063_set_params()
2147 dprintk(1, "Tuning to frequency: %d, bandwidth %d, foffset %d\n", in mt2063_set_params()
2148 c->frequency, ch_bw, pict2chanb_vsb); in mt2063_set_params()
2150 status = MT2063_Tune(state, (c->frequency + (pict2chanb_vsb + (ch_bw / 2)))); in mt2063_set_params()
2155 state->frequency = c->frequency; in mt2063_set_params()
2161 struct mt2063_state *state = fe->tuner_priv; in mt2063_get_if_frequency()
2165 if (!state->init) in mt2063_get_if_frequency()
2166 return -ENODEV; in mt2063_get_if_frequency()
2168 *freq = state->AS_Data.f_out; in mt2063_get_if_frequency()
2170 dprintk(1, "IF frequency: %d\n", *freq); in mt2063_get_if_frequency()
2177 struct mt2063_state *state = fe->tuner_priv; in mt2063_get_bandwidth()
2181 if (!state->init) in mt2063_get_bandwidth()
2182 return -ENODEV; in mt2063_get_bandwidth()
2184 *bw = state->AS_Data.f_out_bw - 750000; in mt2063_get_bandwidth()
2220 state->config = config; in mt2063_attach()
2221 state->i2c = i2c; in mt2063_attach()
2222 state->frontend = fe; in mt2063_attach()
2223 state->reference = config->refclock / 1000; /* kHz */ in mt2063_attach()
2224 fe->tuner_priv = state; in mt2063_attach()
2225 fe->ops.tuner_ops = mt2063_ops; in mt2063_attach()
2239 struct mt2063_state *state = fe->tuner_priv;
2253 struct mt2063_state *state = fe->tuner_priv;