Home
last modified time | relevance | path

Searched +full:5 +full:- +full:bit (Results 1 – 25 of 1093) sorted by relevance

12345678910>>...44

/Linux-v5.10/include/linux/mfd/da9062/
Dregisters.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright (C) 2015-2017 Dialog Semiconductor
151 * Bit fields
158 #define DA9062AA_WRITE_MODE_MASK BIT(6)
160 #define DA9062AA_REVERT_MASK BIT(7)
166 #define DA9062AA_DVC_BUSY_MASK BIT(2)
172 #define DA9062AA_GPI1_MASK BIT(1)
174 #define DA9062AA_GPI2_MASK BIT(2)
176 #define DA9062AA_GPI3_MASK BIT(3)
178 #define DA9062AA_GPI4_MASK BIT(4)
[all …]
/Linux-v5.10/drivers/usb/typec/tcpm/
Dfusb302_reg.h1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright 2016-2017 Google, Inc
5 * Fairchild FUSB302 Type-C Chip Driver
13 #define FUSB_REG_SWITCHES0_CC2_PU_EN BIT(7)
14 #define FUSB_REG_SWITCHES0_CC1_PU_EN BIT(6)
15 #define FUSB_REG_SWITCHES0_VCONN_CC2 BIT(5)
16 #define FUSB_REG_SWITCHES0_VCONN_CC1 BIT(4)
17 #define FUSB_REG_SWITCHES0_MEAS_CC2 BIT(3)
18 #define FUSB_REG_SWITCHES0_MEAS_CC1 BIT(2)
19 #define FUSB_REG_SWITCHES0_CC2_PD_EN BIT(1)
[all …]
/Linux-v5.10/drivers/net/dsa/microchip/
Dksz8795_reg.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
34 #define SW_NEW_BACKOFF BIT(7)
35 #define SW_GLOBAL_RESET BIT(6)
36 #define SW_FLUSH_DYN_MAC_TABLE BIT(5)
37 #define SW_FLUSH_STA_MAC_TABLE BIT(4)
38 #define SW_LINK_AUTO_AGING BIT(0)
42 #define SW_HUGE_PACKET BIT(6)
43 #define SW_TX_FLOW_CTRL_DISABLE BIT(5)
44 #define SW_RX_FLOW_CTRL_DISABLE BIT(4)
45 #define SW_CHECK_LENGTH BIT(3)
[all …]
Dksz9477_reg.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 * Copyright (C) 2017-2018 Microchip Technology Inc.
14 /* 0 - Operation */
44 #define PME_ENABLE BIT(1)
45 #define PME_POLARITY BIT(0)
49 #define SW_GIGABIT_ABLE BIT(6)
50 #define SW_REDUNDANCY_ABLE BIT(5)
51 #define SW_AVB_ABLE BIT(4)
69 #define SW_QW_ABLE BIT(5)
75 #define LUE_INT BIT(31)
[all …]
/Linux-v5.10/Documentation/input/devices/
Delantech.rst4 Copyright (C) 2007-2008 Arjan Opmeer <arjan@opmeer.net>
22 5. Hardware version 2
25 5.2.1 Parity checking and packet re-synchronization
58 4 allows tracking up to 5 fingers.
114 non-zero value will turn it ON. For hardware version 1 the default is ON.
118 calculating a parity bit for the last 3 bytes of each packet. The driver
145 4 bytes version: (after the arrow is the name given in the Dell-provided driver)
173 ---------
179 echo -n 0x16 > reg_10
183 bit 7 6 5 4 3 2 1 0
[all …]
/Linux-v5.10/sound/soc/codecs/
Drk3328_codec.h1 /* SPDX-License-Identifier: GPL-2.0 */
37 #define PIN_DIRECTION_MASK BIT(5)
38 #define PIN_DIRECTION_IN (0x0 << 5)
39 #define PIN_DIRECTION_OUT (0x1 << 5)
40 #define DAC_I2S_MODE_MASK BIT(4)
45 #define DAC_I2S_LRP_MASK BIT(7)
48 #define DAC_VDL_MASK GENMASK(6, 5)
49 #define DAC_VDL_16BITS (0x0 << 5)
50 #define DAC_VDL_20BITS (0x1 << 5)
51 #define DAC_VDL_24BITS (0x2 << 5)
[all …]
/Linux-v5.10/drivers/gpu/drm/bridge/analogix/
Danalogix-i2c-txcommon.h1 /* SPDX-License-Identifier: GPL-2.0-only */
27 #define SP_REGISTER_PD BIT(7)
28 #define SP_HDCP_PD BIT(5)
29 #define SP_AUDIO_PD BIT(4)
30 #define SP_VIDEO_PD BIT(3)
31 #define SP_LINK_PD BIT(2)
32 #define SP_TOTAL_PD BIT(1)
36 #define SP_MISC_RST BIT(7)
37 #define SP_VIDCAP_RST BIT(6)
38 #define SP_VIDFIF_RST BIT(5)
[all …]
/Linux-v5.10/drivers/gpu/drm/mcde/
Dmcde_dsi_regs.h1 /* SPDX-License-Identifier: GPL-2.0 */
8 #define DSI_MCTL_MAIN_DATA_CTL_LINK_EN BIT(0)
9 #define DSI_MCTL_MAIN_DATA_CTL_IF1_MODE BIT(1)
10 #define DSI_MCTL_MAIN_DATA_CTL_VID_EN BIT(2)
11 #define DSI_MCTL_MAIN_DATA_CTL_TVG_SEL BIT(3)
12 #define DSI_MCTL_MAIN_DATA_CTL_TBG_SEL BIT(4)
13 #define DSI_MCTL_MAIN_DATA_CTL_IF1_TE_EN BIT(5)
14 #define DSI_MCTL_MAIN_DATA_CTL_IF2_TE_EN BIT(6)
15 #define DSI_MCTL_MAIN_DATA_CTL_REG_TE_EN BIT(7)
16 #define DSI_MCTL_MAIN_DATA_CTL_READ_EN BIT(8)
[all …]
/Linux-v5.10/include/linux/mfd/da9150/
Dregisters.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * DA9150 MFD Driver - Registers
160 #define DA9150_WRITE_MODE_MASK BIT(6)
162 #define DA9150_REVERT_MASK BIT(7)
172 #define DA9150_VFAULT_STAT_MASK BIT(0)
174 #define DA9150_TFAULT_STAT_MASK BIT(1)
178 #define DA9150_VDD33_STAT_MASK BIT(0)
180 #define DA9150_VDD33_SLEEP_MASK BIT(1)
182 #define DA9150_LFOSC_STAT_MASK BIT(7)
186 #define DA9150_GPIOA_STAT_MASK BIT(0)
[all …]
/Linux-v5.10/drivers/net/ethernet/freescale/dpaa2/
Ddpkg.h1 /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
2 /* Copyright 2013-2015 Freescale Semiconductor Inc.
25 * enum dpkg_extract_from_hdr_type - Selecting extraction by header types
37 * enum dpkg_extract_type - Enumeration for selecting extraction type
40 * @DPKG_EXTRACT_FROM_PARSE: Extract from parser-result;
51 * struct dpkg_mask - A structure for defining a single extraction mask
63 #define NH_FLD_ETH_DA BIT(0)
64 #define NH_FLD_ETH_SA BIT(1)
65 #define NH_FLD_ETH_LENGTH BIT(2)
66 #define NH_FLD_ETH_TYPE BIT(3)
[all …]
/Linux-v5.10/Documentation/devicetree/bindings/
Dtrivial-devices.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/trivial-devices.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
28 - enum:
29 … # SMBus/I2C Digital Temperature Sensor in 6-Pin SOT with SMBus Alert and Over Temperature Pin
30 - ad,ad7414
31 # ADM9240: Complete System Hardware Monitor for uProcessor-Based Systems
32 - ad,adm9240
[all …]
/Linux-v5.10/include/soc/mscc/
Docelot_hsio.h1 /* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
85 #define HSIO_PLL5G_CFG0_ENA_ROT BIT(31)
86 #define HSIO_PLL5G_CFG0_ENA_LANE BIT(30)
87 #define HSIO_PLL5G_CFG0_ENA_CLKTREE BIT(29)
88 #define HSIO_PLL5G_CFG0_DIV4 BIT(28)
89 #define HSIO_PLL5G_CFG0_ENA_LOCK_FINE BIT(27)
99 #define HSIO_PLL5G_CFG0_ENA_VCO_CONTRH BIT(15)
100 #define HSIO_PLL5G_CFG0_ENA_CP1 BIT(14)
101 #define HSIO_PLL5G_CFG0_ENA_VCO_BUF BIT(13)
102 #define HSIO_PLL5G_CFG0_ENA_BIAS BIT(12)
[all …]
/Linux-v5.10/drivers/gpu/drm/vc4/
Dvc4_packet.h34 VC4_PACKET_FLUSH_ALL = 5,
78 /* Not an actual hardware packet -- this is what we use to put
93 #define VC4_PACKET_BRANCH_SIZE 5
94 #define VC4_PACKET_BRANCH_TO_SUB_LIST_SIZE 5
97 #define VC4_PACKET_STORE_FULL_RES_TILE_BUFFER_SIZE 5
98 #define VC4_PACKET_LOAD_FULL_RES_TILE_BUFFER_SIZE 5
106 #define VC4_PACKET_GL_SHADER_STATE_SIZE 5
107 #define VC4_PACKET_NV_SHADER_STATE_SIZE 5
108 #define VC4_PACKET_VG_SHADER_STATE_SIZE 5
110 #define VC4_PACKET_FLAT_SHADE_FLAGS_SIZE 5
[all …]
/Linux-v5.10/drivers/media/i2c/
Dmax9271.h1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2017-2020 Jacopo Mondi
4 * Copyright (C) 2017-2020 Kieran Bingham
5 * Copyright (C) 2017-2020 Laurent Pinchart
6 * Copyright (C) 2017-2020 Niklas Söderlund
16 #define MAX9271_SPREAD_SPECT_0 (0 << 5)
17 #define MAX9271_SPREAD_SPECT_05 (1 << 5)
18 #define MAX9271_SPREAD_SPECT_15 (2 << 5)
19 #define MAX9271_SPREAD_SPECT_1 (5 << 5)
20 #define MAX9271_SPREAD_SPECT_2 (3 << 5)
[all …]
Dtda1997x_regs.h1 /* SPDX-License-Identifier: GPL-2.0 */
6 /* Page 0x00 - General Control */
125 #define DETECT_UTIL BIT(7) /* utility of HDMI level */
126 #define DETECT_HPD BIT(6) /* HPD of HDMI level */
127 #define DETECT_5V_SEL BIT(2) /* 5V present on selected input */
128 #define DETECT_5V_B BIT(1) /* 5V present on input B */
129 #define DETECT_5V_A BIT(0) /* 5V present on input A */
132 #define INPUT_SEL_RST_FMT BIT(7) /* 1=reset format measurement */
133 #define INPUT_SEL_RST_VDP BIT(2) /* 1=reset video data path */
134 #define INPUT_SEL_OUT_MODE BIT(1) /* 0=loop 1=bypass */
[all …]
/Linux-v5.10/include/linux/mfd/
Dtps65218.h6 * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com/
71 #define TPS65218_INT1_VPRG BIT(5)
72 #define TPS65218_INT1_AC BIT(4)
73 #define TPS65218_INT1_PB BIT(3)
74 #define TPS65218_INT1_HOT BIT(2)
75 #define TPS65218_INT1_CC_AQC BIT(1)
76 #define TPS65218_INT1_PRGC BIT(0)
78 #define TPS65218_INT2_LS3_F BIT(5)
79 #define TPS65218_INT2_LS2_F BIT(4)
80 #define TPS65218_INT2_LS1_F BIT(3)
[all …]
/Linux-v5.10/drivers/staging/vt6656/
Dmac.h1 /* SPDX-License-Identifier: GPL-2.0+ */
15 * 07-01-2003 Bryan YC Fan: Re-write codes to support VT3253 spec.
16 * 08-25-2003 Kyle Hsu: Porting MAC functions from sim53.
17 * 09-03-2003 Bryan YC Fan: Add MACvDisableProtectMD & MACvEnableProtectMD
146 #define I2MCFG_BOUNDCTL BIT(7)
147 #define I2MCFG_WAITCTL BIT(5)
148 #define I2MCFG_SCLOECTL BIT(4)
149 #define I2MCFG_WBUSYCTL BIT(3)
150 #define I2MCFG_NORETRY BIT(2)
151 #define I2MCFG_I2MLDSEQ BIT(1)
[all …]
/Linux-v5.10/drivers/gpu/drm/bridge/
Dsil-sii8620.h1 /* SPDX-License-Identifier: GPL-2.0-only */
9 * Copyright (C) 2013-2014 Silicon Image, Inc.
35 #define BIT_SYS_CTRL1_OTPVMUTEOVR_SET BIT(7)
36 #define BIT_SYS_CTRL1_VSYNCPIN BIT(6)
37 #define BIT_SYS_CTRL1_OTPADROPOVR_SET BIT(5)
38 #define BIT_SYS_CTRL1_BLOCK_DDC_BY_HPD BIT(4)
39 #define BIT_SYS_CTRL1_OTP2XVOVR_EN BIT(3)
40 #define BIT_SYS_CTRL1_OTP2XAOVR_EN BIT(2)
41 #define BIT_SYS_CTRL1_TX_CTRL_HDMI BIT(1)
42 #define BIT_SYS_CTRL1_OTPAMUTEOVR_SET BIT(0)
[all …]
/Linux-v5.10/drivers/gpu/drm/rockchip/
Drockchip_lvds.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Sandy Huang <hjc@rock-chips.com>
6 * Mark Yao <mark.yao@rock-chips.com>
13 #define RK3288_LVDS_CH0_REG0_LVDS_EN BIT(7)
14 #define RK3288_LVDS_CH0_REG0_TTL_EN BIT(6)
15 #define RK3288_LVDS_CH0_REG0_LANECK_EN BIT(5)
16 #define RK3288_LVDS_CH0_REG0_LANE4_EN BIT(4)
17 #define RK3288_LVDS_CH0_REG0_LANE3_EN BIT(3)
18 #define RK3288_LVDS_CH0_REG0_LANE2_EN BIT(2)
19 #define RK3288_LVDS_CH0_REG0_LANE1_EN BIT(1)
[all …]
/Linux-v5.10/include/linux/soundwire/
Dsdw_registers.h1 /* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */
2 /* Copyright(c) 2015-17 Intel Corporation. */
36 #define SDW_DP0_INT_TEST_FAIL BIT(0)
37 #define SDW_DP0_INT_PORT_READY BIT(1)
38 #define SDW_DP0_INT_BRA_FAILURE BIT(2)
39 #define SDW_DP0_SDCA_CASCADE BIT(3)
40 /* BIT(4) not allocated in SoundWire specification 1.2 */
41 #define SDW_DP0_INT_IMPDEF1 BIT(5)
42 #define SDW_DP0_INT_IMPDEF2 BIT(6)
43 #define SDW_DP0_INT_IMPDEF3 BIT(7)
[all …]
/Linux-v5.10/drivers/net/ieee802154/
Dmcr20a.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Driver for NXP MCR20A 802.15.4 Wireless-PAN Networking controller
50 /*------------------ 0x27 */
69 /*----------------------- 0x3A */
118 /*-------------------- 0x29 */
124 /*------------------ 0x2F */
128 /*------------------- 0x33 */
147 /*-------------------- 0x46 */
163 /*------------------- 0x56 */
164 /*------------------- 0x57 */
[all …]
/Linux-v5.10/drivers/power/supply/
Dbd99954-charger.h1 /* SPDX-License-Identifier: GPL-2.0-only */
494 [F_IBUS_LIM_SET] = REG_FIELD(IBUS_LIM_SET, 5, 13),
495 [F_ICC_LIM_SET] = REG_FIELD(ICC_LIM_SET, 5, 13),
496 [F_IOTG_LIM_SET] = REG_FIELD(IOTG_LIM_SET, 5, 13),
503 [F_VCC_EN] = REG_FIELD(VIN_CTRL_SET, 5, 5),
515 [F_AUTO_FST] = REG_FIELD(CHGOP_SET1, 5, 5),
523 [F_CHOP_SS_INIT] = REG_FIELD(CHGOP_SET2, 5, 5),
561 [F_IOUT_GAIN_SET] = REG_FIELD(PMON_IOUT_CTRL_SET, 4, 5),
570 [F_VCC_ENUMRDY] = REG_FIELD(VCC_UCD_SET, 5, 5),
582 [F_VCC_EXTID] = REG_FIELD(VCC_IDD_STATUS, 5, 5),
[all …]
/Linux-v5.10/arch/mips/include/asm/mach-ath79/
Dar71xx_regs.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2010-2011 Jaiganesh Narayanan <jnarayanan@atheros.com>
6 * Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
171 #define QCA956X_MAC_CFG1_SOFT_RST BIT(31)
172 #define QCA956X_MAC_CFG1_RX_RST BIT(19)
173 #define QCA956X_MAC_CFG1_TX_RST BIT(18)
174 #define QCA956X_MAC_CFG1_LOOPBACK BIT(8)
175 #define QCA956X_MAC_CFG1_RX_EN BIT(2)
176 #define QCA956X_MAC_CFG1_TX_EN BIT(0)
179 #define QCA956X_MAC_CFG2_IF_1000 BIT(9)
[all …]
/Linux-v5.10/include/linux/mfd/abx500/
Dab8500-sysctrl.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) ST-Ericsson SA 2010
83 #define AB8500_TURNONSTATUS_PORNVBAT BIT(0)
84 #define AB8500_TURNONSTATUS_PONKEY1DBF BIT(1)
85 #define AB8500_TURNONSTATUS_PONKEY2DBF BIT(2)
86 #define AB8500_TURNONSTATUS_RTCALARM BIT(3)
87 #define AB8500_TURNONSTATUS_MAINCHDET BIT(4)
88 #define AB8500_TURNONSTATUS_VBUSDET BIT(5)
89 #define AB8500_TURNONSTATUS_USBIDDETECT BIT(6)
91 #define AB8500_RESETSTATUS_RESETN4500NSTATUS BIT(0)
[all …]
/Linux-v5.10/drivers/iio/imu/inv_icm42600/
Dinv_icm42600.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
67 /* ODR suffixed by LN or LP are Low-Noise or Low-Power mode only */
86 /* Low-Noise mode sensor data filter (3rd order filter by default) */
89 /* Low-Power mode sensor data filter (averaging) */
100 #define INV_ICM42600_SENSOR_CONF_INIT {-1, -1, -1, -1}
115 * struct inv_icm42600_state - driver state variables
159 #define INV_ICM42600_DEVICE_CONFIG_SOFT_RESET BIT(0)
162 #define INV_ICM42600_DRIVE_CONFIG_I2C_MASK GENMASK(5, 3)
170 #define INV_ICM42600_INT_CONFIG_INT2_LATCHED BIT(5)
171 #define INV_ICM42600_INT_CONFIG_INT2_PUSH_PULL BIT(4)
[all …]

12345678910>>...44