1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc. 4 * All rights reserved. 5 * 6 * File: mac.h 7 * 8 * Purpose: MAC routines 9 * 10 * Author: Tevin Chen 11 * 12 * Date: May 21, 1996 13 * 14 * Revision History: 15 * 07-01-2003 Bryan YC Fan: Re-write codes to support VT3253 spec. 16 * 08-25-2003 Kyle Hsu: Porting MAC functions from sim53. 17 * 09-03-2003 Bryan YC Fan: Add MACvDisableProtectMD & MACvEnableProtectMD 18 */ 19 20 #ifndef __MAC_H__ 21 #define __MAC_H__ 22 23 #include <linux/bits.h> 24 #include "device.h" 25 26 #define REV_ID_VT3253_A0 0x00 27 #define REV_ID_VT3253_A1 0x01 28 #define REV_ID_VT3253_B0 0x08 29 #define REV_ID_VT3253_B1 0x09 30 31 /* Registers in the MAC */ 32 #define MAC_REG_BISTCMD 0x04 33 #define MAC_REG_BISTSR0 0x05 34 #define MAC_REG_BISTSR1 0x06 35 #define MAC_REG_BISTSR2 0x07 36 #define MAC_REG_I2MCSR 0x08 37 #define MAC_REG_I2MTGID 0x09 38 #define MAC_REG_I2MTGAD 0x0a 39 #define MAC_REG_I2MCFG 0x0b 40 #define MAC_REG_I2MDIPT 0x0c 41 #define MAC_REG_I2MDOPT 0x0e 42 #define MAC_REG_USBSUS 0x0f 43 44 #define MAC_REG_LOCALID 0x14 45 #define MAC_REG_TESTCFG 0x15 46 #define MAC_REG_JUMPER0 0x16 47 #define MAC_REG_JUMPER1 0x17 48 #define MAC_REG_TMCTL 0x18 49 #define MAC_REG_TMDATA0 0x1c 50 #define MAC_REG_TMDATA1 0x1d 51 #define MAC_REG_TMDATA2 0x1e 52 #define MAC_REG_TMDATA3 0x1f 53 54 /* MAC Parameter related */ 55 #define MAC_REG_LRT 0x20 56 #define MAC_REG_SRT 0x21 57 #define MAC_REG_SIFS 0x22 58 #define MAC_REG_DIFS 0x23 59 #define MAC_REG_EIFS 0x24 60 #define MAC_REG_SLOT 0x25 61 #define MAC_REG_BI 0x26 62 #define MAC_REG_CWMAXMIN0 0x28 63 #define MAC_REG_LINKOFFTOTM 0x2a 64 #define MAC_REG_SWTMOT 0x2b 65 #define MAC_REG_RTSOKCNT 0x2c 66 #define MAC_REG_RTSFAILCNT 0x2d 67 #define MAC_REG_ACKFAILCNT 0x2e 68 #define MAC_REG_FCSERRCNT 0x2f 69 70 /* TSF Related */ 71 #define MAC_REG_TSFCNTR 0x30 72 #define MAC_REG_NEXTTBTT 0x38 73 #define MAC_REG_TSFOFST 0x40 74 #define MAC_REG_TFTCTL 0x48 75 76 /* WMAC Control/Status Related */ 77 #define MAC_REG_ENCFG0 0x4c 78 #define MAC_REG_ENCFG1 0x4d 79 #define MAC_REG_ENCFG2 0x4e 80 81 #define MAC_REG_CFG 0x50 82 #define MAC_REG_TEST 0x52 83 #define MAC_REG_HOSTCR 0x54 84 #define MAC_REG_MACCR 0x55 85 #define MAC_REG_RCR 0x56 86 #define MAC_REG_TCR 0x57 87 #define MAC_REG_IMR 0x58 88 #define MAC_REG_ISR 0x5c 89 #define MAC_REG_ISR1 0x5d 90 91 /* Power Saving Related */ 92 #define MAC_REG_PSCFG 0x60 93 #define MAC_REG_PSCTL 0x61 94 #define MAC_REG_PSPWRSIG 0x62 95 #define MAC_REG_BBCR13 0x63 96 #define MAC_REG_AIDATIM 0x64 97 #define MAC_REG_PWBT 0x66 98 #define MAC_REG_WAKEOKTMR 0x68 99 #define MAC_REG_CALTMR 0x69 100 #define MAC_REG_SYNSPACCNT 0x6a 101 #define MAC_REG_WAKSYNOPT 0x6b 102 103 /* Baseband/IF Control Group */ 104 #define MAC_REG_BBREGCTL 0x6c 105 #define MAC_REG_CHANNEL 0x6d 106 #define MAC_REG_BBREGADR 0x6e 107 #define MAC_REG_BBREGDATA 0x6f 108 #define MAC_REG_IFREGCTL 0x70 109 #define MAC_REG_IFDATA 0x71 110 #define MAC_REG_ITRTMSET 0x74 111 #define MAC_REG_PAPEDELAY 0x77 112 #define MAC_REG_SOFTPWRCTL 0x78 113 #define MAC_REG_SOFTPWRCTL2 0x79 114 #define MAC_REG_GPIOCTL0 0x7a 115 #define MAC_REG_GPIOCTL1 0x7b 116 117 /* MiscFF PIO related */ 118 #define MAC_REG_MISCFFNDEX 0xbc 119 #define MAC_REG_MISCFFCTL 0xbe 120 #define MAC_REG_MISCFFDATA 0xc0 121 122 /* MAC Configuration Group */ 123 #define MAC_REG_PAR0 0xc4 124 #define MAC_REG_PAR4 0xc8 125 #define MAC_REG_BSSID0 0xcc 126 #define MAC_REG_BSSID4 0xd0 127 #define MAC_REG_MAR0 0xd4 128 #define MAC_REG_MAR4 0xd8 129 130 /* MAC RSPPKT INFO Group */ 131 #define MAC_REG_RSPINF_B_1 0xdC 132 #define MAC_REG_RSPINF_B_2 0xe0 133 #define MAC_REG_RSPINF_B_5 0xe4 134 #define MAC_REG_RSPINF_B_11 0xe8 135 #define MAC_REG_RSPINF_A_6 0xec 136 #define MAC_REG_RSPINF_A_9 0xee 137 #define MAC_REG_RSPINF_A_12 0xf0 138 #define MAC_REG_RSPINF_A_18 0xf2 139 #define MAC_REG_RSPINF_A_24 0xf4 140 #define MAC_REG_RSPINF_A_36 0xf6 141 #define MAC_REG_RSPINF_A_48 0xf8 142 #define MAC_REG_RSPINF_A_54 0xfa 143 #define MAC_REG_RSPINF_A_72 0xfc 144 145 /* Bits in the I2MCFG EEPROM register */ 146 #define I2MCFG_BOUNDCTL BIT(7) 147 #define I2MCFG_WAITCTL BIT(5) 148 #define I2MCFG_SCLOECTL BIT(4) 149 #define I2MCFG_WBUSYCTL BIT(3) 150 #define I2MCFG_NORETRY BIT(2) 151 #define I2MCFG_I2MLDSEQ BIT(1) 152 #define I2MCFG_I2CMFAST BIT(0) 153 154 /* Bits in the I2MCSR EEPROM register */ 155 #define I2MCSR_EEMW BIT(7) 156 #define I2MCSR_EEMR BIT(6) 157 #define I2MCSR_AUTOLD BIT(3) 158 #define I2MCSR_NACK BIT(1) 159 #define I2MCSR_DONE BIT(0) 160 161 /* Bits in the TMCTL register */ 162 #define TMCTL_TSUSP BIT(2) 163 #define TMCTL_TMD BIT(1) 164 #define TMCTL_TE BIT(0) 165 166 /* Bits in the TFTCTL register */ 167 #define TFTCTL_HWUTSF BIT(7) 168 #define TFTCTL_TBTTSYNC BIT(6) 169 #define TFTCTL_HWUTSFEN BIT(5) 170 #define TFTCTL_TSFCNTRRD BIT(4) 171 #define TFTCTL_TBTTSYNCEN BIT(3) 172 #define TFTCTL_TSFSYNCEN BIT(2) 173 #define TFTCTL_TSFCNTRST BIT(1) 174 #define TFTCTL_TSFCNTREN BIT(0) 175 176 /* Bits in the EnhanceCFG_0 register */ 177 #define EnCFG_BBType_a 0x00 178 #define EnCFG_BBType_b BIT(0) 179 #define EnCFG_BBType_g BIT(1) 180 #define EnCFG_BBType_MASK (EnCFG_BBType_b | EnCFG_BBType_g) 181 #define EnCFG_ProtectMd BIT(5) 182 183 /* Bits in the EnhanceCFG_1 register */ 184 #define EnCFG_BcnSusInd BIT(0) 185 #define EnCFG_BcnSusClr BIT(1) 186 187 /* Bits in the EnhanceCFG_2 register */ 188 #define EnCFG_NXTBTTCFPSTR BIT(0) 189 #define EnCFG_BarkerPream BIT(1) 190 #define EnCFG_PktBurstMode BIT(2) 191 192 /* Bits in the CFG register */ 193 #define CFG_TKIPOPT BIT(7) 194 #define CFG_RXDMAOPT BIT(6) 195 #define CFG_TMOT_SW BIT(5) 196 #define CFG_TMOT_HWLONG BIT(4) 197 #define CFG_TMOT_HW 0x00 198 #define CFG_CFPENDOPT BIT(3) 199 #define CFG_BCNSUSEN BIT(2) 200 #define CFG_NOTXTIMEOUT BIT(1) 201 #define CFG_NOBUFOPT BIT(0) 202 203 /* Bits in the TEST register */ 204 #define TEST_LBEXT BIT(7) 205 #define TEST_LBINT BIT(6) 206 #define TEST_LBNONE 0x00 207 #define TEST_SOFTINT BIT(5) 208 #define TEST_CONTTX BIT(4) 209 #define TEST_TXPE BIT(3) 210 #define TEST_NAVDIS BIT(2) 211 #define TEST_NOCTS BIT(1) 212 #define TEST_NOACK BIT(0) 213 214 /* Bits in the HOSTCR register */ 215 #define HOSTCR_TXONST BIT(7) 216 #define HOSTCR_RXONST BIT(6) 217 #define HOSTCR_ADHOC BIT(5) 218 #define HOSTCR_AP BIT(4) 219 #define HOSTCR_TXON BIT(3) 220 #define HOSTCR_RXON BIT(2) 221 #define HOSTCR_MACEN BIT(1) 222 #define HOSTCR_SOFTRST BIT(0) 223 224 /* Bits in the MACCR register */ 225 #define MACCR_SYNCFLUSHOK BIT(2) 226 #define MACCR_SYNCFLUSH BIT(1) 227 #define MACCR_CLRNAV BIT(0) 228 229 /* Bits in the RCR register */ 230 #define RCR_SSID BIT(7) 231 #define RCR_RXALLTYPE BIT(6) 232 #define RCR_UNICAST BIT(5) 233 #define RCR_BROADCAST BIT(4) 234 #define RCR_MULTICAST BIT(3) 235 #define RCR_WPAERR BIT(2) 236 #define RCR_ERRCRC BIT(1) 237 #define RCR_BSSID BIT(0) 238 239 /* Bits in the TCR register */ 240 #define TCR_SYNCDCFOPT BIT(1) 241 #define TCR_AUTOBCNTX BIT(0) 242 243 /* ISR1 */ 244 #define ISR_GPIO3 BIT(6) 245 #define ISR_RXNOBUF BIT(3) 246 #define ISR_MIBNEARFULL BIT(2) 247 #define ISR_SOFTINT BIT(1) 248 #define ISR_FETALERR BIT(0) 249 250 #define LEDSTS_STS 0x06 251 #define LEDSTS_TMLEN 0x78 252 #define LEDSTS_OFF 0x00 253 #define LEDSTS_ON 0x02 254 #define LEDSTS_SLOW 0x04 255 #define LEDSTS_INTER 0x06 256 257 /* ISR0 */ 258 #define ISR_WATCHDOG BIT(7) 259 #define ISR_SOFTTIMER BIT(6) 260 #define ISR_GPIO0 BIT(5) 261 #define ISR_TBTT BIT(4) 262 #define ISR_RXDMA0 BIT(3) 263 #define ISR_BNTX BIT(2) 264 #define ISR_ACTX BIT(0) 265 266 /* Bits in the PSCFG register */ 267 #define PSCFG_PHILIPMD BIT(6) 268 #define PSCFG_WAKECALEN BIT(5) 269 #define PSCFG_WAKETMREN BIT(4) 270 #define PSCFG_BBPSPROG BIT(3) 271 #define PSCFG_WAKESYN BIT(2) 272 #define PSCFG_SLEEPSYN BIT(1) 273 #define PSCFG_AUTOSLEEP BIT(0) 274 275 /* Bits in the PSCTL register */ 276 #define PSCTL_WAKEDONE BIT(5) 277 #define PSCTL_PS BIT(4) 278 #define PSCTL_GO2DOZE BIT(3) 279 #define PSCTL_LNBCN BIT(2) 280 #define PSCTL_ALBCN BIT(1) 281 #define PSCTL_PSEN BIT(0) 282 283 /* Bits in the PSPWSIG register */ 284 #define PSSIG_WPE3 BIT(7) 285 #define PSSIG_WPE2 BIT(6) 286 #define PSSIG_WPE1 BIT(5) 287 #define PSSIG_WRADIOPE BIT(4) 288 #define PSSIG_SPE3 BIT(3) 289 #define PSSIG_SPE2 BIT(2) 290 #define PSSIG_SPE1 BIT(1) 291 #define PSSIG_SRADIOPE BIT(0) 292 293 /* Bits in the BBREGCTL register */ 294 #define BBREGCTL_DONE BIT(2) 295 #define BBREGCTL_REGR BIT(1) 296 #define BBREGCTL_REGW BIT(0) 297 298 /* Bits in the IFREGCTL register */ 299 #define IFREGCTL_DONE BIT(2) 300 #define IFREGCTL_IFRF BIT(1) 301 #define IFREGCTL_REGW BIT(0) 302 303 /* Bits in the SOFTPWRCTL register */ 304 #define SOFTPWRCTL_RFLEOPT BIT(3) 305 #define SOFTPWRCTL_TXPEINV BIT(1) 306 #define SOFTPWRCTL_SWPECTI BIT(0) 307 #define SOFTPWRCTL_SWPAPE BIT(5) 308 #define SOFTPWRCTL_SWCALEN BIT(4) 309 #define SOFTPWRCTL_SWRADIO_PE BIT(3) 310 #define SOFTPWRCTL_SWPE2 BIT(2) 311 #define SOFTPWRCTL_SWPE1 BIT(1) 312 #define SOFTPWRCTL_SWPE3 BIT(0) 313 314 /* Bits in the GPIOCTL1 register */ 315 #define GPIO3_MD BIT(5) 316 #define GPIO3_DATA BIT(6) 317 #define GPIO3_INTMD BIT(7) 318 319 /* Bits in the MISCFFCTL register */ 320 #define MISCFFCTL_WRITE BIT(0) 321 322 /* Loopback mode */ 323 #define MAC_LB_EXT BIT(1) 324 #define MAC_LB_INTERNAL BIT(0) 325 #define MAC_LB_NONE 0x00 326 327 /* Ethernet address filter type */ 328 #define PKT_TYPE_NONE 0x00 /* turn off receiver */ 329 #define PKT_TYPE_ALL_MULTICAST BIT(7) 330 #define PKT_TYPE_PROMISCUOUS BIT(6) 331 #define PKT_TYPE_DIRECTED BIT(5) /* obselete */ 332 #define PKT_TYPE_BROADCAST BIT(4) 333 #define PKT_TYPE_MULTICAST BIT(3) 334 #define PKT_TYPE_ERROR_WPA BIT(2) 335 #define PKT_TYPE_ERROR_CRC BIT(1) 336 #define PKT_TYPE_BSSID BIT(0) 337 338 #define Default_BI 0x200 339 340 /* MiscFIFO Offset */ 341 #define MISCFIFO_KEYETRY0 32 342 #define MISCFIFO_KEYENTRYSIZE 22 343 344 #define MAC_REVISION_A0 0x00 345 #define MAC_REVISION_A1 0x01 346 347 struct vnt_mac_set_key { 348 union { 349 struct { 350 u8 addr[ETH_ALEN]; 351 __le16 key_ctl; 352 } write __packed; 353 u32 swap[2]; 354 } u; 355 u8 key[WLAN_KEY_LEN_CCMP]; 356 } __packed; 357 358 int vnt_mac_set_filter(struct vnt_private *priv, u64 mc_filter); 359 int vnt_mac_shutdown(struct vnt_private *priv); 360 int vnt_mac_set_bb_type(struct vnt_private *priv, u8 type); 361 int vnt_mac_disable_keyentry(struct vnt_private *priv, u8 entry_idx); 362 int vnt_mac_set_keyentry(struct vnt_private *priv, u16 key_ctl, u32 entry_idx, 363 u32 key_idx, u8 *addr, u8 *key); 364 int vnt_mac_reg_bits_off(struct vnt_private *priv, u8 reg_ofs, u8 bits); 365 int vnt_mac_reg_bits_on(struct vnt_private *priv, u8 reg_ofs, u8 bits); 366 int vnt_mac_write_word(struct vnt_private *priv, u8 reg_ofs, u16 word); 367 int vnt_mac_set_bssid_addr(struct vnt_private *priv, u8 *addr); 368 int vnt_mac_enable_protect_mode(struct vnt_private *priv); 369 int vnt_mac_disable_protect_mode(struct vnt_private *priv); 370 int vnt_mac_enable_barker_preamble_mode(struct vnt_private *priv); 371 int vnt_mac_disable_barker_preamble_mode(struct vnt_private *priv); 372 int vnt_mac_set_beacon_interval(struct vnt_private *priv, u16 interval); 373 int vnt_mac_set_led(struct vnt_private *privpriv, u8 state, u8 led); 374 375 #endif /* __MAC_H__ */ 376
