Lines Matching +full:5 +full:- +full:bit
6 * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com/
71 #define TPS65218_INT1_VPRG BIT(5)
72 #define TPS65218_INT1_AC BIT(4)
73 #define TPS65218_INT1_PB BIT(3)
74 #define TPS65218_INT1_HOT BIT(2)
75 #define TPS65218_INT1_CC_AQC BIT(1)
76 #define TPS65218_INT1_PRGC BIT(0)
78 #define TPS65218_INT2_LS3_F BIT(5)
79 #define TPS65218_INT2_LS2_F BIT(4)
80 #define TPS65218_INT2_LS1_F BIT(3)
81 #define TPS65218_INT2_LS3_I BIT(2)
82 #define TPS65218_INT2_LS2_I BIT(1)
83 #define TPS65218_INT2_LS1_I BIT(0)
85 #define TPS65218_INT_MASK1_VPRG BIT(5)
86 #define TPS65218_INT_MASK1_AC BIT(4)
87 #define TPS65218_INT_MASK1_PB BIT(3)
88 #define TPS65218_INT_MASK1_HOT BIT(2)
89 #define TPS65218_INT_MASK1_CC_AQC BIT(1)
90 #define TPS65218_INT_MASK1_PRGC BIT(0)
92 #define TPS65218_INT_MASK2_LS3_F BIT(5)
93 #define TPS65218_INT_MASK2_LS2_F BIT(4)
94 #define TPS65218_INT_MASK2_LS1_F BIT(3)
95 #define TPS65218_INT_MASK2_LS3_I BIT(2)
96 #define TPS65218_INT_MASK2_LS2_I BIT(1)
97 #define TPS65218_INT_MASK2_LS1_I BIT(0)
99 #define TPS65218_STATUS_FSEAL BIT(7)
100 #define TPS65218_STATUS_EE BIT(6)
101 #define TPS65218_STATUS_AC_STATE BIT(5)
102 #define TPS65218_STATUS_PB_STATE BIT(4)
106 #define TPS65218_CONTROL_OFFNPFO BIT(1)
107 #define TPS65218_CONTROL_CC_AQ BIT(0)
109 #define TPS65218_FLAG_GPO3_FLG BIT(7)
110 #define TPS65218_FLAG_GPO2_FLG BIT(6)
111 #define TPS65218_FLAG_GPO1_FLG BIT(5)
112 #define TPS65218_FLAG_LDO1_FLG BIT(4)
113 #define TPS65218_FLAG_DC4_FLG BIT(3)
114 #define TPS65218_FLAG_DC3_FLG BIT(2)
115 #define TPS65218_FLAG_DC2_FLG BIT(1)
116 #define TPS65218_FLAG_DC1_FLG BIT(0)
118 #define TPS65218_ENABLE1_DC6_EN BIT(5)
119 #define TPS65218_ENABLE1_DC5_EN BIT(4)
120 #define TPS65218_ENABLE1_DC4_EN BIT(3)
121 #define TPS65218_ENABLE1_DC3_EN BIT(2)
122 #define TPS65218_ENABLE1_DC2_EN BIT(1)
123 #define TPS65218_ENABLE1_DC1_EN BIT(0)
125 #define TPS65218_ENABLE2_GPIO3 BIT(6)
126 #define TPS65218_ENABLE2_GPIO2 BIT(5)
127 #define TPS65218_ENABLE2_GPIO1 BIT(4)
128 #define TPS65218_ENABLE2_LS3_EN BIT(3)
129 #define TPS65218_ENABLE2_LS2_EN BIT(2)
130 #define TPS65218_ENABLE2_LS1_EN BIT(1)
131 #define TPS65218_ENABLE2_LDO1_EN BIT(0)
134 #define TPS65218_CONFIG1_TRST BIT(7)
135 #define TPS65218_CONFIG1_GPO2_BUF BIT(6)
136 #define TPS65218_CONFIG1_IO1_SEL BIT(5)
138 #define TPS65218_CONFIG1_STRICT BIT(2)
145 #define TPS65218_CONFIG2_DC12_RST BIT(7)
146 #define TPS65218_CONFIG2_UVLOHYS BIT(6)
150 #define TPS65218_CONFIG3_LS3NPFO BIT(5)
151 #define TPS65218_CONFIG3_LS2NPFO BIT(4)
152 #define TPS65218_CONFIG3_LS1NPFO BIT(3)
153 #define TPS65218_CONFIG3_LS3DCHRG BIT(2)
154 #define TPS65218_CONFIG3_LS2DCHRG BIT(1)
155 #define TPS65218_CONFIG3_LS1DCHRG BIT(0)
157 #define TPS65218_CONTROL_DCDC1_PFM BIT(7)
160 #define TPS65218_CONTROL_DCDC2_PFM BIT(7)
163 #define TPS65218_CONTROL_DCDC3_PFM BIT(7)
166 #define TPS65218_CONTROL_DCDC4_PFM BIT(7)
169 #define TPS65218_SLEW_RATE_GO BIT(7)
170 #define TPS65218_SLEW_RATE_GODSBL BIT(6)
175 #define TPS65218_SEQ1_DLY8 BIT(7)
176 #define TPS65218_SEQ1_DLY7 BIT(6)
177 #define TPS65218_SEQ1_DLY6 BIT(5)
178 #define TPS65218_SEQ1_DLY5 BIT(4)
179 #define TPS65218_SEQ1_DLY4 BIT(3)
180 #define TPS65218_SEQ1_DLY3 BIT(2)
181 #define TPS65218_SEQ1_DLY2 BIT(1)
182 #define TPS65218_SEQ1_DLY1 BIT(0)
184 #define TPS65218_SEQ2_DLYFCTR BIT(7)
185 #define TPS65218_SEQ2_DLY9 BIT(0)
221 /* Number of step-down converters available */
254 * struct tps65218 - tps65218 sub-driver chip access routines