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/Linux-v6.1/arch/arm/boot/dts/
Dqcom-ipq4019-ap.dk07.1.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include "qcom-ipq4019.dtsi"
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/gpio/gpio.h>
9 model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK07.1";
22 stdout-path = "serial0:115200n8";
25 soc {
27 serial_0_pins: serial0-pinmux {
30 bias-disable;
33 i2c_0_pins: i2c-0-pinmux {
[all …]
Dqcom-ipq4019-ap.dk04.1.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include "qcom-ipq4019.dtsi"
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/gpio/gpio.h>
9 model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK04.1";
17 stdout-path = "serial0:115200n8";
25 soc {
27 serial_0_pins: serial0-pinmux {
30 bias-disable;
33 serial_1_pins: serial1-pinmux {
[all …]
Dbcm2711.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/soc/bcm2835-pm.h>
10 #address-cells = <2>;
11 #size-cells = <1>;
13 interrupt-parent = <&gicv2>;
16 compatible = "brcm,bcm2711-vc5";
20 clk_27MHz: clk-27M {
21 #clock-cells = <0>;
22 compatible = "fixed-clock";
[all …]
Dkeystone-k2l.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Keystone 2 Lamarr SoC specific device tree
5 * Copyright (C) 2014-2017 Texas Instruments Incorporated - http://www.ti.com/
8 #include <dt-bindings/reset/ti-syscon.h>
12 model = "Texas Instruments Keystone 2 Lamarr SoC";
15 #address-cells = <1>;
16 #size-cells = <0>;
18 interrupt-parent = <&gic>;
21 compatible = "arm,cortex-a15";
27 compatible = "arm,cortex-a15";
[all …]
Dqcom-ipq8064.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/mfd/qcom-rpm.h>
6 #include <dt-bindings/clock/qcom,rpmcc.h>
7 #include <dt-bindings/clock/qcom,gcc-ipq806x.h>
8 #include <dt-bindings/clock/qcom,lcc-ipq806x.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/reset/qcom,gcc-ipq806x.h>
11 #include <dt-bindings/soc/qcom,gsbi.h>
[all …]
Dqcom-msm8974.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/interconnect/qcom,msm8974.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/clock/qcom,gcc-msm8974.h>
7 #include <dt-bindings/clock/qcom,mmcc-msm8974.h>
8 #include <dt-bindings/clock/qcom,rpmcc.h>
9 #include <dt-bindings/reset/qcom,gcc-msm8974.h>
10 #include <dt-bindings/gpio/gpio.h>
13 #address-cells = <1>;
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/pinctrl/
Dbitmain,bm1880-pinctrl.txt3 This binding describes the pin controller found in the BM1880 SoC.
7 - compatible: Should be "bitmain,bm1880-pinctrl"
8 - reg: Offset and length of pinctrl space in SCTRL.
10 Please refer to pinctrl-bindings.txt in this directory for details of the
16 pin, a group, or a list of pins or groups. This configuration for BM1880 SoC
17 includes pinmux and various pin configuration parameters, such as pull-up,
24 The following generic properties as defined in pinctrl-bindings.txt are valid
29 - pins: An array of strings, each string containing the name of a pin.
32 MIO0 - MIO111
34 - groups: An array of strings, each string containing the name of a pin
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/arm/tegra/
Dnvidia,tegra186-pmc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/arm/tegra/nvidia,tegra186-pmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
16 - nvidia,tegra186-pmc
17 - nvidia,tegra194-pmc
18 - nvidia,tegra234-pmc
24 reg-names:
[all …]
/Linux-v6.1/drivers/pinctrl/
Dpinctrl-lantiq.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * linux/drivers/pinctrl/pinctrl-lantiq.h
4 * based on linux/drivers/pinctrl/pinctrl-pxa3xx.h
101 /* soc specific callback used to apply muxing */
159 GPIO53, enumerator
Dpinctrl-thunderbay.c1 // SPDX-License-Identifier: GPL-2.0
3 * Intel Thunder Bay SOC pinctrl/GPIO driver
20 #include <linux/pinctrl/pinconf-generic.h>
30 #include "pinctrl-utils.h"
47 /* bit 16-19: Drive Strength for the Pad */
82 * struct thunderbay_pinctrl - Intel Thunderbay pinctrl structure
87 * @soc: Pin control configuration data based on SoC
96 const struct thunderbay_pin_soc *soc; member
420 THUNDERBAY_PIN_DESC(53, "GPIO53",
515 return readl(tpc->base0 + THB_GPIO_REG_OFFSET(pinnr)); in thb_gpio_read_reg()
[all …]
Dpinctrl-bm1880.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Bitmain BM1880 SoC Pinctrl driver
14 #include <linux/pinctrl/pinconf-generic.h>
18 #include "pinctrl-utils.h"
23 * struct bm1880_pinctrl - driver data
43 * struct bm1880_pctrl_group - pinctrl group
55 * struct bm1880_pinmux_function - a pinmux function
73 * struct bm1880_pinconf_data - pinconf data
486 BM1880_PINCTRL_GRP(gpio53),
774 BM1880_PINMUX_FUNCTION(gpio53, 0),
[all …]
Dpinctrl-keembay.c1 // SPDX-License-Identifier: GPL-2.0
12 #include <linux/pinctrl/pinconf-generic.h>
61 * struct keembay_mux_desc - Mux properties of each GPIO pin
83 * struct keembay_gpio_irq - Config of each GPIO Interrupt sources
84 * @source: Interrupt source number (0 - 7)
99 * struct keembay_pinctrl - Intel Keembay pinctrl structure
105 * @soc: Pin control configuration data based on SoC
120 const struct keembay_pin_soc *soc; member
131 * struct keembay_pin_soc - Pin control config data based on SoC
616 KEEMBAY_PIN_DESC(53, "GPIO53",
[all …]
/Linux-v6.1/arch/arm/mach-pxa/
Dmfp-pxa2xx.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 #include <linux/soc/pxa/mfp.h>
8 * the following MFP_xxx bit definitions in mfp.h are re-used for pxa2xx:
19 * bit 23 - Input/Output (PXA2xx specific)
20 * bit 24 - Wakeup Enable(PXA2xx specific)
21 * bit 25 - Keep Output (PXA2xx specific)
107 #define GPIO53_GPIO MFP_CFG_IN(GPIO53, AF0)
Dmfp-pxa3xx.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 #include <linux/soc/pxa/mfp.h>
9 /* PXA3xx common MFP configurations - processor specific ones defined
10 * in mfp-pxa300.h and mfp-pxa320.h
62 #define GPIO53_GPIO MFP_CFG(GPIO53, AF0)
Dpxa930.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/arch/arm/mach-pxa/pxa930.c
7 * Copyright (C) 2007-2008 Marvell Internation Ltd.
12 #include <linux/dma-mapping.h>
14 #include <linux/gpio-pxa.h>
16 #include <linux/soc/pxa/cpu.h>
77 MFP_ADDR(GPIO53, 0x02d0),
/Linux-v6.1/drivers/pinctrl/nomadik/
Dpinctrl-ab8505.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) ST-Ericsson SA 2012
5 * Author: Patrice Chotard <patrice.chotard@stericsson.com> for ST-Ericsson.
12 #include "pinctrl-abx500.h"
249 * ALTERNATFUNC register. We need to specifies these values as SOC
337 ALTERNATE_FUNCTIONS(53, 4, UNUSED, UNUSED, 0, 0, 0), /* GPIO53, altA controlled by bit 4 */
348 * GPIO52 to GPIO53
376 abx500_pinctrl_ab8505_init(struct abx500_pinctrl_soc_data **soc) in abx500_pinctrl_ab8505_init() argument
378 *soc = &ab8505_soc; in abx500_pinctrl_ab8505_init()
/Linux-v6.1/arch/arm64/boot/dts/bitmain/
Dbm1880-sophon-edge.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
19 * Line names are taken from the schematic "sophon-edge-schematics"
29 * lines i.e. "[FOO]", the GPIO named lines "GPIO-A" thru "GPIO-L"
34 compatible = "bitmain,sophon-edge", "bitmain,bm1880";
44 stdout-path = "serial0:115200n8";
52 soc {
54 porta: gpio-controller@0 {
55 gpio-line-names =
56 "GPIO-A", /* GPIO0, LSEC pin 23 */
[all …]
/Linux-v6.1/arch/arm64/boot/dts/qcom/
Dmsm8994.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
2 /* Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/clock/qcom,gcc-msm8994.h>
7 #include <dt-bindings/clock/qcom,mmcc-msm8994.h>
8 #include <dt-bindings/clock/qcom,rpmcc.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/power/qcom-rpmpd.h>
13 interrupt-parent = <&intc>;
15 #address-cells = <2>;
[all …]
Dsc7180.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
3 * SC7180 SoC device tree source
5 * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
8 #include <dt-bindings/clock/qcom,dispcc-sc7180.h>
9 #include <dt-bindings/clock/qcom,gcc-sc7180.h>
10 #include <dt-bindings/clock/qcom,gpucc-sc7180.h>
11 #include <dt-bindings/clock/qcom,lpasscorecc-sc7180.h>
12 #include <dt-bindings/clock/qcom,rpmh.h>
13 #include <dt-bindings/clock/qcom,videocc-sc7180.h>
14 #include <dt-bindings/interconnect/qcom,osm-l3.h>
[all …]
Dsc7180-trogdor.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/gpio-keys.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
13 #include <dt-bindings/sound/sc7180-lpass.h>
21 thermal-zones {
22 charger_thermal: charger-thermal {
23 polling-delay-passive = <0>;
[all …]
Dsdm845-cheza.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
12 /* PMICs depend on spmi_bus label and so must come after SoC */
25 stdout-path = "serial0:115200n8";
29 compatible = "pwm-backlight";
31 enable-gpios = <&tlmm 37 GPIO_ACTIVE_HIGH>;
32 power-supply = <&ppvar_sys>;
33 pinctrl-names = "default";
34 pinctrl-0 = <&ap_edp_bklten>;
[all …]
Dsm8250.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/qcom,dispcc-sm8250.h>
8 #include <dt-bindings/clock/qcom,gcc-sm8250.h>
9 #include <dt-bindings/clock/qcom,gpucc-sm8250.h>
10 #include <dt-bindings/clock/qcom,rpmh.h>
11 #include <dt-bindings/clock/qcom,sm8250-lpass-aoncc.h>
12 #include <dt-bindings/clock/qcom,sm8250-lpass-audiocc.h>
13 #include <dt-bindings/dma/qcom-gpi.h>
14 #include <dt-bindings/gpio/gpio.h>
[all …]
Dsc7280.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
3 * sc7280 SoC device tree source
5 * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
7 #include <dt-bindings/clock/qcom,camcc-sc7280.h>
8 #include <dt-bindings/clock/qcom,dispcc-sc7280.h>
9 #include <dt-bindings/clock/qcom,gcc-sc7280.h>
10 #include <dt-bindings/clock/qcom,gpucc-sc7280.h>
11 #include <dt-bindings/clock/qcom,lpassaudiocc-sc7280.h>
12 #include <dt-bindings/clock/qcom,lpasscorecc-sc7280.h>
13 #include <dt-bindings/clock/qcom,rpmh.h>
[all …]
/Linux-v6.1/drivers/pinctrl/berlin/
Dpinctrl-as370.c1 // SPDX-License-Identifier: GPL-2.0
275 BERLIN_PINCTRL_FUNCTION(0x0, "gpio"), /* GPIO53 */
325 .compatible = "syna,as370-soc-pinctrl",
334 of_match_device(as370_pinctrl_match, &pdev->dev); in as370_pinctrl_probe()
340 rmconfig = devm_kzalloc(&pdev->dev, sizeof(*rmconfig), GFP_KERNEL); in as370_pinctrl_probe()
342 return -ENOMEM; in as370_pinctrl_probe()
345 base = devm_ioremap_resource(&pdev->dev, res); in as370_pinctrl_probe()
349 rmconfig->reg_bits = 32, in as370_pinctrl_probe()
350 rmconfig->val_bits = 32, in as370_pinctrl_probe()
351 rmconfig->reg_stride = 4, in as370_pinctrl_probe()
[all …]
/Linux-v6.1/drivers/soc/tegra/
Dpmc.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * drivers/soc/tegra/pmc.c
6 * Copyright (c) 2018-2022, NVIDIA CORPORATION. All rights reserved.
12 #define pr_fmt(fmt) "tegra-pmc: " fmt
14 #include <linux/arm-smccc.h>
16 #include <linux/clk-provider.h>
18 #include <linux/clk/clk-conf.h>
36 #include <linux/pinctrl/pinconf-generic.h>
50 #include <soc/tegra/common.h>
51 #include <soc/tegra/fuse.h>
[all …]

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