Lines Matching +full:soc +full:- +full:gpio53
1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/interconnect/qcom,msm8974.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/clock/qcom,gcc-msm8974.h>
7 #include <dt-bindings/clock/qcom,mmcc-msm8974.h>
8 #include <dt-bindings/clock/qcom,rpmcc.h>
9 #include <dt-bindings/reset/qcom,gcc-msm8974.h>
10 #include <dt-bindings/gpio/gpio.h>
13 #address-cells = <1>;
14 #size-cells = <1>;
15 interrupt-parent = <&intc>;
19 compatible = "fixed-clock";
20 #clock-cells = <0>;
21 clock-frequency = <19200000>;
25 compatible = "fixed-clock";
26 #clock-cells = <0>;
27 clock-frequency = <32768>;
32 #address-cells = <1>;
33 #size-cells = <0>;
38 enable-method = "qcom,kpss-acc-v2";
41 next-level-cache = <&L2>;
44 cpu-idle-states = <&CPU_SPC>;
49 enable-method = "qcom,kpss-acc-v2";
52 next-level-cache = <&L2>;
55 cpu-idle-states = <&CPU_SPC>;
60 enable-method = "qcom,kpss-acc-v2";
63 next-level-cache = <&L2>;
66 cpu-idle-states = <&CPU_SPC>;
71 enable-method = "qcom,kpss-acc-v2";
74 next-level-cache = <&L2>;
77 cpu-idle-states = <&CPU_SPC>;
80 L2: l2-cache {
82 cache-level = <2>;
86 idle-states {
88 compatible = "qcom,idle-state-spc",
89 "arm,idle-state";
90 entry-latency-us = <150>;
91 exit-latency-us = <200>;
92 min-residency-us = <2000>;
99 compatible = "qcom,scm-msm8974", "qcom,scm";
101 clock-names = "core", "bus", "iface";
111 compatible = "qcom,krait-pmu";
115 reserved-memory {
116 #address-cells = <1>;
117 #size-cells = <1>;
122 no-map;
127 no-map;
132 no-map;
137 no-map;
142 no-map;
147 no-map;
152 no-map;
157 no-map;
161 compatible = "qcom,rmtfs-mem";
163 no-map;
165 qcom,client-id = <1>;
172 memory-region = <&smem_region>;
173 qcom,rpm-msg-ram = <&rpm_msg_ram>;
178 smp2p-adsp {
182 interrupt-parent = <&intc>;
187 qcom,local-pid = <0>;
188 qcom,remote-pid = <2>;
190 adsp_smp2p_out: master-kernel {
191 qcom,entry-name = "master-kernel";
192 #qcom,smem-state-cells = <1>;
195 adsp_smp2p_in: slave-kernel {
196 qcom,entry-name = "slave-kernel";
198 interrupt-controller;
199 #interrupt-cells = <2>;
203 smp2p-modem {
207 interrupt-parent = <&intc>;
212 qcom,local-pid = <0>;
213 qcom,remote-pid = <1>;
215 modem_smp2p_out: master-kernel {
216 qcom,entry-name = "master-kernel";
217 #qcom,smem-state-cells = <1>;
220 modem_smp2p_in: slave-kernel {
221 qcom,entry-name = "slave-kernel";
223 interrupt-controller;
224 #interrupt-cells = <2>;
228 smp2p-wcnss {
232 interrupt-parent = <&intc>;
237 qcom,local-pid = <0>;
238 qcom,remote-pid = <4>;
240 wcnss_smp2p_out: master-kernel {
241 qcom,entry-name = "master-kernel";
243 #qcom,smem-state-cells = <1>;
246 wcnss_smp2p_in: slave-kernel {
247 qcom,entry-name = "slave-kernel";
249 interrupt-controller;
250 #interrupt-cells = <2>;
257 #address-cells = <1>;
258 #size-cells = <0>;
260 qcom,ipc-1 = <&apcs 8 13>;
261 qcom,ipc-2 = <&apcs 8 9>;
262 qcom,ipc-3 = <&apcs 8 19>;
267 #qcom,smem-state-cells = <1>;
274 interrupt-controller;
275 #interrupt-cells = <2>;
282 interrupt-controller;
283 #interrupt-cells = <2>;
290 interrupt-controller;
291 #interrupt-cells = <2>;
301 qcom,smd-edge = <15>;
304 compatible = "qcom,rpm-msm8974";
305 qcom,smd-channels = "rpm_requests";
307 rpmcc: clock-controller {
308 compatible = "qcom,rpmcc-msm8974", "qcom,rpmcc";
309 #clock-cells = <1>;
315 soc: soc { label
316 #address-cells = <1>;
317 #size-cells = <1>;
319 compatible = "simple-bus";
321 intc: interrupt-controller@f9000000 {
322 compatible = "qcom,msm-qgic2";
323 interrupt-controller;
324 #interrupt-cells = <3>;
335 #address-cells = <1>;
336 #size-cells = <1>;
338 compatible = "arm,armv7-timer-mem";
340 clock-frequency = <19200000>;
343 frame-number = <0>;
351 frame-number = <1>;
358 frame-number = <2>;
365 frame-number = <3>;
372 frame-number = <4>;
379 frame-number = <5>;
386 frame-number = <6>;
393 saw0: power-controller@f9089000 {
394 compatible = "qcom,msm8974-saw2-v2.1-cpu", "qcom,saw2";
398 saw1: power-controller@f9099000 {
399 compatible = "qcom,msm8974-saw2-v2.1-cpu", "qcom,saw2";
403 saw2: power-controller@f90a9000 {
404 compatible = "qcom,msm8974-saw2-v2.1-cpu", "qcom,saw2";
408 saw3: power-controller@f90b9000 {
409 compatible = "qcom,msm8974-saw2-v2.1-cpu", "qcom,saw2";
413 saw_l2: power-controller@f9012000 {
419 acc0: clock-controller@f9088000 {
420 compatible = "qcom,kpss-acc-v2";
424 acc1: clock-controller@f9098000 {
425 compatible = "qcom,kpss-acc-v2";
429 acc2: clock-controller@f90a8000 {
430 compatible = "qcom,kpss-acc-v2";
434 acc3: clock-controller@f90b8000 {
435 compatible = "qcom,kpss-acc-v2";
440 compatible = "qcom,msm8974-sdhci", "qcom,sdhci-msm-v4";
442 reg-names = "hc", "core";
445 interrupt-names = "hc_irq", "pwr_irq";
449 clock-names = "iface", "core", "xo";
450 bus-width = <8>;
451 non-removable;
457 compatible = "qcom,msm8974-sdhci", "qcom,sdhci-msm-v4";
459 reg-names = "hc", "core";
462 interrupt-names = "hc_irq", "pwr_irq";
466 clock-names = "iface", "core", "xo";
467 bus-width = <4>;
469 #address-cells = <1>;
470 #size-cells = <0>;
476 compatible = "qcom,msm8974-sdhci", "qcom,sdhci-msm-v4";
478 reg-names = "hc", "core";
481 interrupt-names = "hc_irq", "pwr_irq";
485 clock-names = "iface", "core", "xo";
486 bus-width = <4>;
488 #address-cells = <1>;
489 #size-cells = <0>;
495 compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
499 clock-names = "core", "iface";
504 compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
508 clock-names = "core", "iface";
509 pinctrl-names = "default";
510 pinctrl-0 = <&blsp1_uart2_default>;
516 compatible = "qcom,i2c-qup-v2.1.1";
520 clock-names = "core", "iface";
521 pinctrl-names = "default", "sleep";
522 pinctrl-0 = <&blsp1_i2c1_default>;
523 pinctrl-1 = <&blsp1_i2c1_sleep>;
524 #address-cells = <1>;
525 #size-cells = <0>;
530 compatible = "qcom,i2c-qup-v2.1.1";
534 clock-names = "core", "iface";
535 pinctrl-names = "default", "sleep";
536 pinctrl-0 = <&blsp1_i2c2_default>;
537 pinctrl-1 = <&blsp1_i2c2_sleep>;
538 #address-cells = <1>;
539 #size-cells = <0>;
544 compatible = "qcom,i2c-qup-v2.1.1";
548 clock-names = "core", "iface";
549 pinctrl-names = "default", "sleep";
550 pinctrl-0 = <&blsp1_i2c3_default>;
551 pinctrl-1 = <&blsp1_i2c3_sleep>;
552 #address-cells = <1>;
553 #size-cells = <0>;
558 compatible = "qcom,i2c-qup-v2.1.1";
562 clock-names = "core", "iface";
563 pinctrl-names = "default", "sleep";
564 pinctrl-0 = <&blsp1_i2c6_default>;
565 pinctrl-1 = <&blsp1_i2c6_sleep>;
566 #address-cells = <1>;
567 #size-cells = <0>;
570 blsp2_dma: dma-controller@f9944000 {
571 compatible = "qcom,bam-v1.4.0";
575 clock-names = "bam_clk";
576 #dma-cells = <1>;
581 compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
585 clock-names = "core", "iface";
586 pinctrl-names = "default", "sleep";
587 pinctrl-0 = <&blsp2_uart1_default>;
588 pinctrl-1 = <&blsp2_uart1_sleep>;
593 compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
597 clock-names = "core", "iface";
602 compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
606 clock-names = "core", "iface";
607 pinctrl-names = "default";
608 pinctrl-0 = <&blsp2_uart4_default>;
614 compatible = "qcom,i2c-qup-v2.1.1";
618 clock-names = "core", "iface";
619 pinctrl-names = "default", "sleep";
620 pinctrl-0 = <&blsp2_i2c2_default>;
621 pinctrl-1 = <&blsp2_i2c2_sleep>;
622 #address-cells = <1>;
623 #size-cells = <0>;
628 compatible = "qcom,i2c-qup-v2.1.1";
632 clock-names = "core", "iface";
634 dma-names = "tx", "rx";
635 pinctrl-names = "default", "sleep";
636 pinctrl-0 = <&blsp2_i2c5_default>;
637 pinctrl-1 = <&blsp2_i2c5_sleep>;
638 #address-cells = <1>;
639 #size-cells = <0>;
644 compatible = "qcom,i2c-qup-v2.1.1";
648 clock-names = "core", "iface";
649 pinctrl-names = "default", "sleep";
650 pinctrl-0 = <&blsp2_i2c6_default>;
651 pinctrl-1 = <&blsp2_i2c6_sleep>;
652 #address-cells = <1>;
653 #size-cells = <0>;
657 compatible = "qcom,ci-hdrc";
663 clock-names = "iface", "core";
664 assigned-clocks = <&gcc GCC_USB_HS_SYSTEM_CLK>;
665 assigned-clock-rates = <75000000>;
667 reset-names = "core";
670 ahb-burst-config = <0>;
671 phy-names = "usb-phy";
673 #reset-cells = <1>;
677 compatible = "qcom,usb-hs-phy-msm8974",
678 "qcom,usb-hs-phy";
679 #phy-cells = <0>;
681 clock-names = "ref", "sleep";
683 reset-names = "phy", "por";
688 compatible = "qcom,usb-hs-phy-msm8974",
689 "qcom,usb-hs-phy";
690 #phy-cells = <0>;
692 clock-names = "ref", "sleep";
694 reset-names = "phy", "por";
704 clock-names = "core";
708 compatible = "qcom,pronto-v2-pil", "qcom,pronto";
710 reg-names = "ccu", "dxe", "pmu";
712 memory-region = <&wcnss_region>;
714 interrupts-extended = <&intc GIC_SPI 149 IRQ_TYPE_EDGE_RISING>,
719 interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack";
721 qcom,smem-states = <&wcnss_smp2p_out 0>;
722 qcom,smem-state-names = "stop";
730 clock-names = "xo";
733 smd-edge {
737 qcom,smd-edge = <6>;
741 qcom,smd-channels = "WCNSS_CTRL";
747 compatible = "qcom,wcnss-bt";
751 compatible = "qcom,wcnss-wlan";
755 interrupt-names = "tx", "rx";
757 qcom,smem-states = <&apps_smsm 10>, <&apps_smsm 9>;
758 qcom,smem-state-names = "tx-enable",
759 "tx-rings-empty";
766 compatible = "qcom,msm8974-rpm-stats";
771 compatible = "arm,coresight-tmc", "arm,primecell";
775 clock-names = "apb_pclk", "atclk";
777 out-ports {
780 remote-endpoint = <&replicator_in>;
785 in-ports {
788 remote-endpoint = <&merger_out>;
795 compatible = "arm,coresight-tpiu", "arm,primecell";
799 clock-names = "apb_pclk", "atclk";
801 in-ports {
804 remote-endpoint = <&replicator_out1>;
811 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
815 clock-names = "apb_pclk", "atclk";
817 in-ports {
818 #address-cells = <1>;
819 #size-cells = <0>;
823 * 0 - not-connected
824 * 1 - connected trought funnel to Multimedia CPU
825 * 2 - connected to Wireless CPU
826 * 3 - not-connected
827 * 4 - not-connected
828 * 6 - not-connected
829 * 7 - connected to STM
834 remote-endpoint = <&kpss_out>;
839 out-ports {
842 remote-endpoint = <&merger_in1>;
849 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
853 clock-names = "apb_pclk", "atclk";
855 in-ports {
856 #address-cells = <1>;
857 #size-cells = <0>;
861 * 0 - connected trought funnel to Audio, Modem and
863 * 2...7 - not-connected
868 remote-endpoint = <&funnel1_out>;
873 out-ports {
876 remote-endpoint = <&etf_in>;
883 compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
887 clock-names = "apb_pclk", "atclk";
889 out-ports {
890 #address-cells = <1>;
891 #size-cells = <0>;
896 remote-endpoint = <&etr_in>;
902 remote-endpoint = <&tpiu_in>;
907 in-ports {
910 remote-endpoint = <&etf_out>;
917 compatible = "arm,coresight-tmc", "arm,primecell";
921 clock-names = "apb_pclk", "atclk";
923 in-ports {
926 remote-endpoint = <&replicator_out0>;
933 compatible = "arm,coresight-etm4x", "arm,primecell";
937 clock-names = "apb_pclk", "atclk";
941 out-ports {
944 remote-endpoint = <&kpss_in0>;
951 compatible = "arm,coresight-etm4x", "arm,primecell";
955 clock-names = "apb_pclk", "atclk";
959 out-ports {
962 remote-endpoint = <&kpss_in1>;
969 compatible = "arm,coresight-etm4x", "arm,primecell";
973 clock-names = "apb_pclk", "atclk";
977 out-ports {
980 remote-endpoint = <&kpss_in2>;
987 compatible = "arm,coresight-etm4x", "arm,primecell";
991 clock-names = "apb_pclk", "atclk";
995 out-ports {
998 remote-endpoint = <&kpss_in3>;
1006 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
1010 clock-names = "apb_pclk", "atclk";
1012 in-ports {
1013 #address-cells = <1>;
1014 #size-cells = <0>;
1019 remote-endpoint = <&etm0_out>;
1025 remote-endpoint = <&etm1_out>;
1031 remote-endpoint = <&etm2_out>;
1037 remote-endpoint = <&etm3_out>;
1042 out-ports {
1045 remote-endpoint = <&funnel1_in5>;
1051 gcc: clock-controller@fc400000 {
1052 compatible = "qcom,gcc-msm8974";
1053 #clock-cells = <1>;
1054 #reset-cells = <1>;
1055 #power-domain-cells = <1>;
1060 compatible = "qcom,rpm-msg-ram";
1066 compatible = "qcom,msm8974-bimc";
1067 #interconnect-cells = <1>;
1068 clock-names = "bus", "bus_a";
1075 compatible = "qcom,msm8974-snoc";
1076 #interconnect-cells = <1>;
1077 clock-names = "bus", "bus_a";
1084 compatible = "qcom,msm8974-pnoc";
1085 #interconnect-cells = <1>;
1086 clock-names = "bus", "bus_a";
1093 compatible = "qcom,msm8974-ocmemnoc";
1094 #interconnect-cells = <1>;
1095 clock-names = "bus", "bus_a";
1102 compatible = "qcom,msm8974-mmssnoc";
1103 #interconnect-cells = <1>;
1104 clock-names = "bus", "bus_a";
1111 compatible = "qcom,msm8974-cnoc";
1112 #interconnect-cells = <1>;
1113 clock-names = "bus", "bus_a";
1118 tsens: thermal-sensor@fc4a9000 {
1119 compatible = "qcom,msm8974-tsens";
1122 nvmem-cells = <&tsens_calib>, <&tsens_backup>;
1123 nvmem-cell-names = "calib", "calib_backup";
1126 interrupt-names = "uplow";
1127 #thermal-sensor-cells = <1>;
1136 compatible = "qcom,msm8974-qfprom", "qcom,qfprom";
1138 #address-cells = <1>;
1139 #size-cells = <1>;
1149 compatible = "qcom,spmi-pmic-arb";
1150 reg-names = "core", "intr", "cnfg";
1154 interrupt-names = "periph_irq";
1158 #address-cells = <2>;
1159 #size-cells = <0>;
1160 interrupt-controller;
1161 #interrupt-cells = <4>;
1164 bam_dmux_dma: dma-controller@fc834000 {
1165 compatible = "qcom,bam-v1.4.0";
1168 #dma-cells = <1>;
1171 num-channels = <6>;
1172 qcom,num-ees = <1>;
1173 qcom,powered-remotely;
1177 compatible = "qcom,msm8974-mss-pil";
1179 reg-names = "qdsp6", "rmb";
1181 interrupts-extended = <&intc GIC_SPI 24 IRQ_TYPE_EDGE_RISING>,
1186 interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack";
1192 clock-names = "iface", "bus", "mem", "xo";
1195 reset-names = "mss_restart";
1197 qcom,halt-regs = <&tcsr_mutex_block 0x1180 0x1200 0x1280>;
1199 qcom,smem-states = <&modem_smp2p_out 0>;
1200 qcom,smem-state-names = "stop";
1205 memory-region = <&mba_region>;
1209 memory-region = <&mpss_region>;
1212 bam_dmux: bam-dmux {
1213 compatible = "qcom,bam-dmux";
1215 interrupt-parent = <&modem_smsm>;
1217 interrupt-names = "pc", "pc-ack";
1219 qcom,smem-states = <&apps_smsm 1>, <&apps_smsm 11>;
1220 qcom,smem-state-names = "pc", "pc-ack";
1223 dma-names = "tx", "rx";
1226 smd-edge {
1230 qcom,smd-edge = <0>;
1247 compatible = "qcom,msm8974-pinctrl";
1249 gpio-controller;
1250 gpio-ranges = <&tlmm 0 0 146>;
1251 #gpio-cells = <2>;
1252 interrupt-controller;
1253 #interrupt-cells = <2>;
1256 sdc1_off: sdc1-off {
1259 bias-disable;
1260 drive-strength = <2>;
1265 bias-pull-up;
1266 drive-strength = <2>;
1271 bias-pull-up;
1272 drive-strength = <2>;
1276 sdc2_off: sdc2-off {
1279 bias-disable;
1280 drive-strength = <2>;
1285 bias-pull-up;
1286 drive-strength = <2>;
1291 bias-pull-up;
1292 drive-strength = <2>;
1297 bias-disable;
1298 drive-strength = <2>;
1302 blsp1_uart2_default: blsp1-uart2-default {
1306 drive-strength = <2>;
1307 bias-pull-up;
1313 drive-strength = <4>;
1314 bias-disable;
1318 blsp2_uart1_default: blsp2-uart1-default {
1319 tx-rts {
1322 drive-strength = <2>;
1323 bias-disable;
1326 rx-cts {
1329 drive-strength = <2>;
1330 bias-pull-up;
1334 blsp2_uart1_sleep: blsp2-uart1-sleep {
1337 drive-strength = <2>;
1338 bias-pull-down;
1341 blsp2_uart4_default: blsp2-uart4-default {
1342 tx-rts {
1343 pins = "gpio53", "gpio56";
1345 drive-strength = <2>;
1346 bias-disable;
1349 rx-cts {
1352 drive-strength = <2>;
1353 bias-pull-up;
1357 blsp1_i2c1_default: blsp1-i2c1-default {
1360 drive-strength = <2>;
1361 bias-disable;
1364 blsp1_i2c1_sleep: blsp1-i2c1-sleep {
1367 drive-strength = <2>;
1368 bias-pull-up;
1371 blsp1_i2c2_default: blsp1-i2c2-default {
1374 drive-strength = <2>;
1375 bias-disable;
1378 blsp1_i2c2_sleep: blsp1-i2c2-sleep {
1381 drive-strength = <2>;
1382 bias-pull-up;
1385 blsp1_i2c3_default: blsp1-i2c3-default {
1388 drive-strength = <2>;
1389 bias-disable;
1392 blsp1_i2c3_sleep: blsp1-i2c3-sleep {
1395 drive-strength = <2>;
1396 bias-pull-up;
1403 blsp1_i2c6_default: blsp1-i2c6-default {
1406 drive-strength = <2>;
1407 bias-disable;
1410 blsp1_i2c6_sleep: blsp1-i2c6-sleep {
1413 drive-strength = <2>;
1414 bias-pull-up;
1420 blsp2_i2c2_default: blsp2-i2c2-default {
1423 drive-strength = <2>;
1424 bias-disable;
1427 blsp2_i2c2_sleep: blsp2-i2c2-sleep {
1430 drive-strength = <2>;
1431 bias-pull-up;
1438 blsp2_i2c5_default: blsp2-i2c5-default {
1441 drive-strength = <2>;
1442 bias-disable;
1445 blsp2_i2c5_sleep: blsp2-i2c5-sleep {
1448 drive-strength = <2>;
1449 bias-pull-up;
1452 blsp2_i2c6_default: blsp2-i2c6-default {
1455 drive-strength = <2>;
1456 bias-disable;
1459 blsp2_i2c6_sleep: blsp2-i2c6-sleep {
1462 drive-strength = <2>;
1463 bias-pull-up;
1486 mmcc: clock-controller@fd8c0000 {
1487 compatible = "qcom,mmcc-msm8974";
1488 #clock-cells = <1>;
1489 #reset-cells = <1>;
1490 #power-domain-cells = <1>;
1497 reg-names = "mdss_phys", "vbif_phys";
1499 power-domains = <&mmcc MDSS_GDSC>;
1504 clock-names = "iface", "bus", "vsync";
1508 interrupt-controller;
1509 #interrupt-cells = <1>;
1513 #address-cells = <1>;
1514 #size-cells = <1>;
1520 reg-names = "mdp_phys";
1522 interrupt-parent = <&mdss>;
1529 clock-names = "iface", "bus", "core", "vsync";
1532 interconnect-names = "mdp0-mem";
1535 #address-cells = <1>;
1536 #size-cells = <0>;
1541 remote-endpoint = <&dsi0_in>;
1548 compatible = "qcom,mdss-dsi-ctrl";
1550 reg-names = "dsi_ctrl";
1552 interrupt-parent = <&mdss>;
1555 assigned-clocks = <&mmcc BYTE0_CLK_SRC>, <&mmcc PCLK0_CLK_SRC>;
1556 assigned-clock-parents = <&dsi0_phy 0>, <&dsi0_phy 1>;
1565 clock-names = "mdp_core",
1574 phy-names = "dsi-phy";
1578 #address-cells = <1>;
1579 #size-cells = <0>;
1582 #address-cells = <1>;
1583 #size-cells = <0>;
1588 remote-endpoint = <&mdp5_intf1_out>;
1600 dsi0_phy: dsi-phy@fd922a00 {
1601 compatible = "qcom,dsi-phy-28nm-hpm";
1605 reg-names = "dsi_pll",
1609 #clock-cells = <1>;
1610 #phy-cells = <0>;
1613 clock-names = "iface", "ref";
1620 compatible = "qcom,adreno-330.1", "qcom,adreno";
1622 reg-names = "kgsl_3d0_reg_memory";
1625 interrupt-names = "kgsl_3d0_irq";
1630 clock-names = "core", "iface", "mem_iface";
1633 power-domains = <&mmcc OXILICX_GDSC>;
1634 operating-points-v2 = <&gpu_opp_table>;
1638 interconnect-names = "gfx-mem", "ocmem";
1644 gpu_opp_table: opp-table {
1645 compatible = "operating-points-v2";
1647 opp-320000000 {
1648 opp-hz = /bits/ 64 <320000000>;
1651 opp-200000000 {
1652 opp-hz = /bits/ 64 <200000000>;
1655 opp-27000000 {
1656 opp-hz = /bits/ 64 <27000000>;
1662 compatible = "qcom,msm8974-ocmem";
1665 reg-names = "ctrl", "mem";
1669 clock-names = "core", "iface";
1671 #address-cells = <1>;
1672 #size-cells = <1>;
1674 gmu_sram: gmu-sram@0 {
1680 compatible = "qcom,msm8974-adsp-pil";
1683 interrupts-extended = <&intc GIC_SPI 162 IRQ_TYPE_EDGE_RISING>,
1688 interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack";
1691 clock-names = "xo";
1693 memory-region = <&adsp_region>;
1695 qcom,smem-states = <&adsp_smp2p_out 0>;
1696 qcom,smem-state-names = "stop";
1700 smd-edge {
1704 qcom,smd-edge = <1>;
1706 #address-cells = <1>;
1707 #size-cells = <0>;
1712 compatible = "qcom,msm8974-imem", "syscon", "simple-mfd";
1715 reboot-mode {
1716 compatible = "syscon-reboot-mode";
1722 tcsr_mutex: tcsr-mutex {
1723 compatible = "qcom,tcsr-mutex";
1726 #hwlock-cells = <1>;
1729 thermal-zones {
1730 cpu0-thermal {
1731 polling-delay-passive = <250>;
1732 polling-delay = <1000>;
1734 thermal-sensors = <&tsens 5>;
1750 cpu1-thermal {
1751 polling-delay-passive = <250>;
1752 polling-delay = <1000>;
1754 thermal-sensors = <&tsens 6>;
1770 cpu2-thermal {
1771 polling-delay-passive = <250>;
1772 polling-delay = <1000>;
1774 thermal-sensors = <&tsens 7>;
1790 cpu3-thermal {
1791 polling-delay-passive = <250>;
1792 polling-delay = <1000>;
1794 thermal-sensors = <&tsens 8>;
1810 q6-dsp-thermal {
1811 polling-delay-passive = <250>;
1812 polling-delay = <1000>;
1814 thermal-sensors = <&tsens 1>;
1817 q6_dsp_alert0: trip-point0 {
1825 modemtx-thermal {
1826 polling-delay-passive = <250>;
1827 polling-delay = <1000>;
1829 thermal-sensors = <&tsens 2>;
1832 modemtx_alert0: trip-point0 {
1840 video-thermal {
1841 polling-delay-passive = <250>;
1842 polling-delay = <1000>;
1844 thermal-sensors = <&tsens 3>;
1847 video_alert0: trip-point0 {
1855 wlan-thermal {
1856 polling-delay-passive = <250>;
1857 polling-delay = <1000>;
1859 thermal-sensors = <&tsens 4>;
1862 wlan_alert0: trip-point0 {
1870 gpu-top-thermal {
1871 polling-delay-passive = <250>;
1872 polling-delay = <1000>;
1874 thermal-sensors = <&tsens 9>;
1877 gpu1_alert0: trip-point0 {
1885 gpu-bottom-thermal {
1886 polling-delay-passive = <250>;
1887 polling-delay = <1000>;
1889 thermal-sensors = <&tsens 10>;
1892 gpu2_alert0: trip-point0 {
1902 compatible = "arm,armv7-timer";
1907 clock-frequency = <19200000>;
1910 vreg_boost: vreg-boost {
1911 compatible = "regulator-fixed";
1913 regulator-name = "vreg-boost";
1914 regulator-min-microvolt = <3150000>;
1915 regulator-max-microvolt = <3150000>;
1917 regulator-always-on;
1918 regulator-boot-on;
1921 enable-active-high;
1923 pinctrl-names = "default";
1924 pinctrl-0 = <&boost_bypass_n_pin>;
1927 vreg_vph_pwr: vreg-vph-pwr {
1928 compatible = "regulator-fixed";
1929 regulator-name = "vph-pwr";
1931 regulator-min-microvolt = <3600000>;
1932 regulator-max-microvolt = <3600000>;
1934 regulator-always-on;