1 // SPDX-License-Identifier: GPL-2.0+
3  * Bitmain BM1880 SoC Pinctrl driver
14 #include <linux/pinctrl/pinconf-generic.h>
18 #include "pinctrl-utils.h"
23  * struct bm1880_pinctrl - driver data
43  * struct bm1880_pctrl_group - pinctrl group
55  * struct bm1880_pinmux_function - a pinmux function
73  * struct bm1880_pinconf_data - pinconf data
486 	BM1880_PINCTRL_GRP(gpio53),
774 	BM1880_PINMUX_FUNCTION(gpio53, 0),
921 	return pctrl->ngroups;  in bm1880_pctrl_get_groups_count()
929 	return pctrl->groups[selector].name;  in bm1880_pctrl_get_group_name()
939 	*pins = pctrl->groups[selector].pins;  in bm1880_pctrl_get_group_pins()
940 	*num_pins = pctrl->groups[selector].npins;  in bm1880_pctrl_get_group_pins()
958 	return pctrl->nfuncs;  in bm1880_pmux_get_functions_count()
966 	return pctrl->funcs[selector].name;  in bm1880_pmux_get_function_name()
976 	*groups = pctrl->funcs[selector].groups;  in bm1880_pmux_get_function_groups()
977 	*num_groups = pctrl->funcs[selector].ngroups;  in bm1880_pmux_get_function_groups()
986 	const struct bm1880_pctrl_group *pgrp = &pctrl->groups[group];  in bm1880_pinmux_set_mux()
987 	const struct bm1880_pinmux_function *func = &pctrl->funcs[function];  in bm1880_pinmux_set_mux()
990 	for (i = 0; i < pgrp->npins; i++) {  in bm1880_pinmux_set_mux()
991 		unsigned int pin = pgrp->pins[i];  in bm1880_pinmux_set_mux()
994 		u32 regval = readl_relaxed(pctrl->base + BM1880_REG_MUX +  in bm1880_pinmux_set_mux()
998 		regval |= func->mux_val << mux_offset;  in bm1880_pinmux_set_mux()
1000 		writel_relaxed(regval, pctrl->base + BM1880_REG_MUX + offset);  in bm1880_pinmux_set_mux()
1023 	 * SoC at 4mA step, hence we need to handle them separately.  in bm1880_pinconf_drv_set()
1060 			return -EINVAL;  in bm1880_pinconf_drv_set()
1081 			return -EINVAL;  in bm1880_pinconf_drv_set()
1092 	int ret = -ENOTSUPP;  in bm1880_pinconf_drv_get()
1096 	 * SoC at 4mA step, hence we need to handle them separately.  in bm1880_pinconf_drv_get()
1160 	regval = readl_relaxed(pctrl->base + BM1880_REG_MUX + offset);  in bm1880_pinconf_cfg_get()
1185 		ret = bm1880_pinconf_drv_get(pctrl->pinconf[pin].drv_bits,  in bm1880_pinconf_cfg_get()
1193 		return -ENOTSUPP;  in bm1880_pinconf_cfg_get()
1211 	regval = readl_relaxed(pctrl->base + BM1880_REG_MUX + offset);  in bm1880_pinconf_cfg_set()
1247 						pctrl->pinconf[pin].drv_bits,  in bm1880_pinconf_cfg_set()
1254 			dev_warn(pctldev->dev,  in bm1880_pinconf_cfg_set()
1260 		writel_relaxed(regval, pctrl->base + BM1880_REG_MUX + offset);  in bm1880_pinconf_cfg_set()
1273 	const struct bm1880_pctrl_group *pgrp = &pctrl->groups[selector];  in bm1880_pinconf_group_set()
1275 	for (i = 0; i < pgrp->npins; i++) {  in bm1880_pinconf_group_set()
1276 		ret = bm1880_pinconf_cfg_set(pctldev, pgrp->pins[i], configs,  in bm1880_pinconf_group_set()
1314 	pctrl = devm_kzalloc(&pdev->dev, sizeof(*pctrl), GFP_KERNEL);  in bm1880_pinctrl_probe()
1316 		return -ENOMEM;  in bm1880_pinctrl_probe()
1318 	pctrl->base = devm_platform_ioremap_resource(pdev, 0);  in bm1880_pinctrl_probe()
1319 	if (IS_ERR(pctrl->base))  in bm1880_pinctrl_probe()
1320 		return PTR_ERR(pctrl->base);  in bm1880_pinctrl_probe()
1322 	pctrl->groups = bm1880_pctrl_groups;  in bm1880_pinctrl_probe()
1323 	pctrl->ngroups = ARRAY_SIZE(bm1880_pctrl_groups);  in bm1880_pinctrl_probe()
1324 	pctrl->funcs = bm1880_pmux_functions;  in bm1880_pinctrl_probe()
1325 	pctrl->nfuncs = ARRAY_SIZE(bm1880_pmux_functions);  in bm1880_pinctrl_probe()
1326 	pctrl->pinconf = bm1880_pinconf;  in bm1880_pinctrl_probe()
1328 	pctrl->pctrldev = devm_pinctrl_register(&pdev->dev, &bm1880_desc,  in bm1880_pinctrl_probe()
1330 	if (IS_ERR(pctrl->pctrldev))  in bm1880_pinctrl_probe()
1331 		return PTR_ERR(pctrl->pctrldev);  in bm1880_pinctrl_probe()
1335 	dev_info(&pdev->dev, "BM1880 pinctrl driver initialized\n");  in bm1880_pinctrl_probe()
1341 	{ .compatible = "bitmain,bm1880-pinctrl" },
1347 		.name = "pinctrl-bm1880",