Home
last modified time | relevance | path

Searched +full:interrupt +full:- +full:clk (Results 1 – 25 of 1183) sorted by relevance

12345678910>>...48

/Linux-v6.1/arch/arm64/boot/dts/marvell/
Darmada-cp11x.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/interrupt-controller/mvebu-icu.h>
9 #include <dt-bindings/thermal/thermal.h>
11 #include "armada-common.dtsi"
27 thermal-zones {
28 CP11X_LABEL(thermal_ic): CP11X_NODE_NAME(thermal-ic) {
29 polling-delay-passive = <0>; /* Interrupt driven */
30 polling-delay = <0>; /* Interrupt driven */
32 thermal-sensors = <&CP11X_LABEL(thermal) 0>;
42 cooling-maps { };
[all …]
/Linux-v6.1/arch/arm64/boot/dts/freescale/
Dimx8-ss-lsio.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2018-2020 NXP
7 #include <dt-bindings/clock/imx8-lpcg.h>
8 #include <dt-bindings/firmware/imx/rsrc.h>
11 compatible = "simple-bus";
12 #address-cells = <1>;
13 #size-cells = <1>;
16 lsio_mem_clk: clock-lsio-mem {
17 compatible = "fixed-clock";
18 #clock-cells = <0>;
[all …]
Dimx93.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx93-clock.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/fsl,imx93-power.h>
12 #include "imx93-pinfunc.h"
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
[all …]
Dimx8mq.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 * Copyright (C) 2017-2018 Pengutronix, Lucas Stach <kernel@pengutronix.de>
7 #include <dt-bindings/clock/imx8mq-clock.h>
8 #include <dt-bindings/power/imx8mq-power.h>
9 #include <dt-bindings/reset/imx8mq-reset.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include "dt-bindings/input/input.h"
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/thermal/thermal.h>
14 #include <dt-bindings/interconnect/imx8mq.h>
[all …]
Dimx8mm.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8mm-clock.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/imx8mm-power.h>
11 #include <dt-bindings/reset/imx8mq-reset.h>
12 #include <dt-bindings/thermal/thermal.h>
14 #include "imx8mm-pinfunc.h"
17 interrupt-parent = <&gic>;
[all …]
Dimx8mp.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8mp-clock.h>
7 #include <dt-bindings/power/imx8mp-power.h>
8 #include <dt-bindings/reset/imx8mp-reset.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/interconnect/fsl,imx8mp.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/thermal/thermal.h>
15 #include "imx8mp-pinfunc.h"
[all …]
Dimx8mn.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8mn-clock.h>
7 #include <dt-bindings/power/imx8mn-power.h>
8 #include <dt-bindings/reset/imx8mq-reset.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/thermal/thermal.h>
14 #include "imx8mn-pinfunc.h"
17 interrupt-parent = <&gic>;
[all …]
/Linux-v6.1/arch/arm/boot/dts/
Dlpc32xx.dtsi1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (C) 2015-2019 Vladimir Zapolskiy <vz@mleia.com>
9 #include <dt-bindings/clock/lpc32xx-clock.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
13 #address-cells = <1>;
14 #size-cells = <1>;
16 interrupt-parent = <&mic>;
19 #address-cells = <1>;
20 #size-cells = <0>;
23 compatible = "arm,arm926ej-s";
[all …]
Dsocfpga_arria10.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/reset/altr,rst-mgr-a10.h>
10 #address-cells = <1>;
11 #size-cells = <1>;
14 #address-cells = <1>;
15 #size-cells = <0>;
16 enable-method = "altr,socfpga-a10-smp";
19 compatible = "arm,cortex-a9";
22 next-level-cache = <&L2>;
[all …]
Dsocfpga.dtsi1 // SPDX-License-Identifier: GPL-2.0+
6 #include <dt-bindings/reset/altr,rst-mgr.h>
9 #address-cells = <1>;
10 #size-cells = <1>;
22 #address-cells = <1>;
23 #size-cells = <0>;
24 enable-method = "altr,socfpga-smp";
27 compatible = "arm,cortex-a9";
30 next-level-cache = <&L2>;
33 compatible = "arm,cortex-a9";
[all …]
/Linux-v6.1/arch/arm64/boot/dts/nuvoton/
Dnuvoton-common-npcm8xx.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/clock/nuvoton,npcm845-clk.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/interrupt-controller/irq.h>
9 #address-cells = <2>;
10 #size-cells = <2>;
11 interrupt-parent = <&gic>;
14 #address-cells = <2>;
15 #size-cells = <2>;
16 compatible = "simple-bus";
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/display/imx/
Dnxp,imx8mq-dcss.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/display/imx/nxp,imx8mq-dcss.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - Laurentiu Palcu <laurentiu.palcu@nxp.com>
17 2.2) or MIPI-DSI. The DCSS is intended to support up to 4kp60 displays. HDR10
23 const: nxp,imx8mq-dcss
27 - description: DCSS base address and size, up to IRQ steer start
28 - description: DCSS BLKCTL base address and size
32 - description: Context loader completion and error interrupt
[all …]
/Linux-v6.1/drivers/clocksource/
Dtimer-of.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/clk.h>
8 #include <linux/interrupt.h>
14 #include "timer-of.h"
17 * timer_of_irq_exit - Release the interrupt
26 struct clock_event_device *clkevt = &to->clkevt; in timer_of_irq_exit()
28 if (of_irq->percpu) in timer_of_irq_exit()
29 free_percpu_irq(of_irq->irq, clkevt); in timer_of_irq_exit()
31 free_irq(of_irq->irq, clkevt); in timer_of_irq_exit()
35 * timer_of_irq_init - Request the interrupt
[all …]
Dtimer-pxa.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * arch/arm/mach-pxa/time.c
5 * PXA clocksource, clockevents, and OST interrupt handlers.
14 #include <linux/interrupt.h>
15 #include <linux/clk.h>
34 #define OIER 0x1C /* OS Timer Interrupt Enable Register */
41 #define OIER_E0 (1 << 0) /* Interrupt enable channel 0 */
73 c->event_handler(c); in pxa_ost0_interrupt()
88 return (signed)(next - oscr) <= MIN_OSCR_DELTA ? -ETIME : 0; in pxa_osmr0_set_next_event()
117 * the one-shot timer interrupt. We adjust OSMR0 in preference in pxa_timer_resume()
[all …]
Dtimer-lpc32xx.c1 // SPDX-License-Identifier: GPL-2.0
8 * time-efm32 Copyright (C) 2013 Pengutronix
9 * mach-lpc32xx/timer.c Copyright (C) 2009 - 2010 NXP Semiconductors
14 #include <linux/clk.h>
18 #include <linux/interrupt.h>
72 * in MR0 register the match will trigger an interrupt. in lpc32xx_clkevt_next_event()
75 writel_relaxed(LPC32XX_TIMER_TCR_CRST, ddata->base + LPC32XX_TIMER_TCR); in lpc32xx_clkevt_next_event()
76 writel_relaxed(delta, ddata->base + LPC32XX_TIMER_MR0); in lpc32xx_clkevt_next_event()
77 writel_relaxed(LPC32XX_TIMER_TCR_CEN, ddata->base + LPC32XX_TIMER_TCR); in lpc32xx_clkevt_next_event()
88 writel_relaxed(0, ddata->base + LPC32XX_TIMER_TCR); in lpc32xx_clkevt_shutdown()
[all …]
Dnomadik-mtu.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2010 Linus Walleij for ST-Ericsson
8 #include <linux/interrupt.h>
16 #include <linux/clk.h>
28 #define MTU_IMSC 0x00 /* Interrupt mask set/clear */
29 #define MTU_RIS 0x04 /* Raw interrupt status */
30 #define MTU_MIS 0x08 /* Masked interrupt status */
31 #define MTU_ICR 0x0C /* Interrupt clear register */
33 /* per-timer registers take 0..3 as argument */
41 #define MTU_CRn_PERIODIC 0x40 /* if 0 = free-running */
[all …]
Dtimer-armada-370-xp.c1 // SPDX-License-Identifier: GPL-2.0
8 * Gregory CLEMENT <gregory.clement@free-electrons.com>
9 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
11 * Timer 0 is used as free-running clocksource, while timer 1 is
14 * ---
25 * See Documentation/devicetree/bindings/timer/marvell,armada-370-xp-timer.txt
31 #include <linux/clk.h>
35 #include <linux/interrupt.h>
74 * SoC-specific data.
107 * Clear clockevent timer interrupt. in armada_370_xp_clkevt_next_event()
[all …]
/Linux-v6.1/arch/arm64/boot/dts/bitmain/
Dbm1880.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/clock/bm1880-clock.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/reset/bitmain,bm1880-reset.h>
13 interrupt-parent = <&gic>;
14 #address-cells = <2>;
15 #size-cells = <2>;
18 #address-cells = <1>;
19 #size-cells = <0>;
23 compatible = "arm,cortex-a53";
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/pinctrl/
Dpinctrl-st.txt3 Each multi-function pin is controlled, driven and routed through the
5 and multiple alternate functions(ALT1 - ALTx) that directly connect
14 GPIO bank can have one of the two possible types of interrupt-wirings.
16 First type is via irqmux, single interrupt is used by multiple gpio banks. This
20 | |----> [gpio-bank (n) ]
21 | |----> [gpio-bank (n + 1)]
22 [irqN]-- | irq-mux |----> [gpio-bank (n + 2)]
23 | |----> [gpio-bank (... )]
24 |_________|----> [gpio-bank (n + 7)]
26 Second type has a dedicated interrupt per gpio bank.
[all …]
/Linux-v6.1/arch/mips/lantiq/xway/
Dgptu.c1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <linux/interrupt.h>
15 #include "../clk.h"
23 /* interrupt node enable */
25 /* interrupt control register */
27 /* interrupt capture register */
75 int timer = irq - irqres[0].start; in timer_irq_handler()
94 static int gptu_enable(struct clk *clk) in gptu_enable() argument
96 int ret = request_irq(irqres[clk->bits].start, timer_irq_handler, in gptu_enable()
104 GPTU_CON(clk->bits)); in gptu_enable()
[all …]
/Linux-v6.1/arch/arm/kernel/
Dsmp_twd.c1 // SPDX-License-Identifier: GPL-2.0-only
10 #include <linux/clk.h>
18 #include <linux/interrupt.h>
28 static struct clk *twd_clk;
37 static int twd_shutdown(struct clock_event_device *clk) in twd_shutdown() argument
43 static int twd_set_oneshot(struct clock_event_device *clk) in twd_set_oneshot() argument
51 static int twd_set_periodic(struct clock_event_device *clk) in twd_set_periodic() argument
77 * local_timer_ack: checks for a local timer interrupt.
79 * If a local timer interrupt has occurred, acknowledge and return 1.
94 struct clock_event_device *clk = raw_cpu_ptr(twd_evt); in twd_timer_stop() local
[all …]
/Linux-v6.1/drivers/rtc/
Drtc-mxc_v2.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright (c) 2004-2011 Freescale Semiconductor, Inc.
8 #include <linux/clk.h>
26 #define SRTC_LPSR_NVES BIT(14) /* lp non-valid state exit status */
42 struct clk *clk; member
51 * The caller should hold the pdata->lock
63 if (!--timeout) { in mxc_rtc_sync_lp_locked()
71 /* This function is the RTC interrupt service routine. */
76 void __iomem *ioaddr = pdata->ioaddr; in mxc_rtc_interrupt()
80 spin_lock(&pdata->lock); in mxc_rtc_interrupt()
[all …]
/Linux-v6.1/drivers/watchdog/
Dsa1100_wdt.c1 // SPDX-License-Identifier: GPL-2.0+
10 * "AS-IS" and at no charge.
21 #include <linux/clk.h>
40 #define REG_OWER 0x0018 /* OS timer Watch-dog Enable Reg. */
41 #define REG_OIER 0x001C /* OS timer Interrupt Enable Reg. */
50 #define OIER_E3 (1 << 3) /* Interrupt enable channel 3 */
51 #define OIER_E2 (1 << 2) /* Interrupt enable channel 2 */
52 #define OIER_E1 (1 << 1) /* Interrupt enable channel 1 */
53 #define OIER_E0 (1 << 0) /* Interrupt enable channel 0 */
77 return -EBUSY; in sa1100dog_open()
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/sound/
Dqcom,lpass-cpu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/qcom,lpass-cpu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
11 - Rohit kumar <rohitkr@codeaurora.org>
14 Qualcomm Technologies Inc. SOC Low-Power Audio SubSystem (LPASS) that consist
16 is a module to configure Low-Power Audio Interface(LPAIF) core registers
22 - qcom,lpass-cpu
23 - qcom,apq8016-lpass-cpu
[all …]
/Linux-v6.1/drivers/spi/
Dspi-meson-spicc.c7 * SPDX-License-Identifier: GPL-2.0+
11 #include <linux/clk.h>
12 #include <linux/clk-provider.h>
22 #include <linux/interrupt.h>
30 * - all transfers are cutted in 16 words burst because the FIFO hangs on
31 * TX underflow, and there is no TX "Half-Empty" interrupt, so we go by
33 * - CS management is dumb, and goes UP between every burst, so is really a
68 #define SPICC_TE_EN BIT(0) /* TX FIFO Empty Interrupt */
69 #define SPICC_TH_EN BIT(1) /* TX FIFO Half-Full Interrupt */
70 #define SPICC_TF_EN BIT(2) /* TX FIFO Full Interrupt */
[all …]

12345678910>>...48