Lines Matching +full:interrupt +full:- +full:clk
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/interrupt-controller/mvebu-icu.h>
9 #include <dt-bindings/thermal/thermal.h>
11 #include "armada-common.dtsi"
27 thermal-zones {
28 CP11X_LABEL(thermal_ic): CP11X_NODE_NAME(thermal-ic) {
29 polling-delay-passive = <0>; /* Interrupt driven */
30 polling-delay = <0>; /* Interrupt driven */
32 thermal-sensors = <&CP11X_LABEL(thermal) 0>;
42 cooling-maps { };
48 #address-cells = <2>;
49 #size-cells = <2>;
50 compatible = "simple-bus";
51 interrupt-parent = <&CP11X_LABEL(icu_nsr)>;
54 config-space@CP11X_BASE {
55 #address-cells = <1>;
56 #size-cells = <1>;
57 compatible = "simple-bus";
61 compatible = "marvell,armada-7k-pp22";
63 clocks = <&CP11X_LABEL(clk) 1 3>, <&CP11X_LABEL(clk) 1 9>,
64 <&CP11X_LABEL(clk) 1 5>, <&CP11X_LABEL(clk) 1 6>,
65 <&CP11X_LABEL(clk) 1 18>;
66 clock-names = "pp_clk", "gop_clk",
68 marvell,system-controller = <&CP11X_LABEL(syscon0)>;
70 dma-coherent;
83 interrupt-names = "hif0", "hif1", "hif2",
86 port-id = <0>;
87 gop-port-id = <0>;
102 interrupt-names = "hif0", "hif1", "hif2",
105 port-id = <1>;
106 gop-port-id = <2>;
121 interrupt-names = "hif0", "hif1", "hif2",
124 port-id = <2>;
125 gop-port-id = <3>;
131 compatible = "marvell,comphy-cp110";
133 marvell,system-controller = <&CP11X_LABEL(syscon0)>;
134 clocks = <&CP11X_LABEL(clk) 1 5>, <&CP11X_LABEL(clk) 1 6>,
135 <&CP11X_LABEL(clk) 1 18>;
136 clock-names = "mg_clk", "mg_core_clk", "axi_clk";
137 #address-cells = <1>;
138 #size-cells = <0>;
142 #phy-cells = <1>;
147 #phy-cells = <1>;
152 #phy-cells = <1>;
157 #phy-cells = <1>;
162 #phy-cells = <1>;
167 #phy-cells = <1>;
172 #address-cells = <1>;
173 #size-cells = <0>;
174 compatible = "marvell,orion-mdio";
176 clocks = <&CP11X_LABEL(clk) 1 9>, <&CP11X_LABEL(clk) 1 5>,
177 <&CP11X_LABEL(clk) 1 6>, <&CP11X_LABEL(clk) 1 18>;
182 #address-cells = <1>;
183 #size-cells = <0>;
186 clocks = <&CP11X_LABEL(clk) 1 5>,
187 <&CP11X_LABEL(clk) 1 6>, <&CP11X_LABEL(clk) 1 18>;
191 CP11X_LABEL(icu): interrupt-controller@1e0000 {
192 compatible = "marvell,cp110-icu";
194 #address-cells = <1>;
195 #size-cells = <1>;
197 CP11X_LABEL(icu_nsr): interrupt-controller@10 {
198 compatible = "marvell,cp110-icu-nsr";
200 #interrupt-cells = <2>;
201 interrupt-controller;
202 msi-parent = <&gicp>;
205 CP11X_LABEL(icu_sei): interrupt-controller@50 {
206 compatible = "marvell,cp110-icu-sei";
208 #interrupt-cells = <2>;
209 interrupt-controller;
210 msi-parent = <&sei>;
215 compatible = "marvell,armada-8k-rtc";
217 reg-names = "rtc", "rtc-soc";
221 CP11X_LABEL(syscon0): system-controller@440000 {
222 compatible = "syscon", "simple-mfd";
225 CP11X_LABEL(clk): clock {
226 compatible = "marvell,cp110-clock";
227 #clock-cells = <2>;
231 compatible = "marvell,armada-8k-gpio";
234 gpio-controller;
235 #gpio-cells = <2>;
236 gpio-ranges = <&CP11X_LABEL(pinctrl) 0 0 32>;
237 marvell,pwm-offset = <0x1f0>;
238 #pwm-cells = <2>;
239 interrupt-controller;
244 #interrupt-cells = <2>;
245 clock-names = "core", "axi";
246 clocks = <&CP11X_LABEL(clk) 1 21>,
247 <&CP11X_LABEL(clk) 1 17>;
252 compatible = "marvell,armada-8k-gpio";
255 gpio-controller;
256 #gpio-cells = <2>;
257 gpio-ranges = <&CP11X_LABEL(pinctrl) 0 32 31>;
258 marvell,pwm-offset = <0x1f0>;
259 #pwm-cells = <2>;
260 interrupt-controller;
265 #interrupt-cells = <2>;
266 clock-names = "core", "axi";
267 clocks = <&CP11X_LABEL(clk) 1 21>,
268 <&CP11X_LABEL(clk) 1 17>;
273 CP11X_LABEL(syscon1): system-controller@400000 {
274 compatible = "syscon", "simple-mfd";
276 #address-cells = <1>;
277 #size-cells = <1>;
279 CP11X_LABEL(thermal): thermal-sensor@70 {
280 compatible = "marvell,armada-cp110-thermal";
282 interrupts-extended =
284 #thermal-sensor-cells = <1>;
289 compatible = "marvell,cp110-utmi-phy";
291 marvell,system-controller = <&CP11X_LABEL(syscon0)>;
292 #address-cells = <1>;
293 #size-cells = <0>;
296 CP11X_LABEL(utmi0): usb-phy@0 {
298 #phy-cells = <0>;
301 CP11X_LABEL(utmi1): usb-phy@1 {
303 #phy-cells = <0>;
308 compatible = "marvell,armada-8k-xhci",
309 "generic-xhci";
311 dma-coherent;
313 clock-names = "core", "reg";
314 clocks = <&CP11X_LABEL(clk) 1 22>,
315 <&CP11X_LABEL(clk) 1 16>;
320 compatible = "marvell,armada-8k-xhci",
321 "generic-xhci";
323 dma-coherent;
325 clock-names = "core", "reg";
326 clocks = <&CP11X_LABEL(clk) 1 23>,
327 <&CP11X_LABEL(clk) 1 16>;
332 compatible = "marvell,armada-8k-ahci",
333 "generic-ahci";
335 dma-coherent;
337 clocks = <&CP11X_LABEL(clk) 1 15>,
338 <&CP11X_LABEL(clk) 1 16>;
339 #address-cells = <1>;
340 #size-cells = <0>;
343 sata-port@0 {
347 sata-port@1 {
353 compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
355 dma-coherent;
356 msi-parent = <&gic_v2m0>;
357 clock-names = "core", "reg";
358 clocks = <&CP11X_LABEL(clk) 1 8>,
359 <&CP11X_LABEL(clk) 1 14>;
363 compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
365 dma-coherent;
366 msi-parent = <&gic_v2m0>;
367 clock-names = "core", "reg";
368 clocks = <&CP11X_LABEL(clk) 1 7>,
369 <&CP11X_LABEL(clk) 1 14>;
373 compatible = "marvell,armada-380-spi";
375 #address-cells = <0x1>;
376 #size-cells = <0x0>;
377 clock-names = "core", "axi";
378 clocks = <&CP11X_LABEL(clk) 1 21>,
379 <&CP11X_LABEL(clk) 1 17>;
384 compatible = "marvell,armada-380-spi";
386 #address-cells = <1>;
387 #size-cells = <0>;
388 clock-names = "core", "axi";
389 clocks = <&CP11X_LABEL(clk) 1 21>,
390 <&CP11X_LABEL(clk) 1 17>;
395 compatible = "marvell,mv78230-i2c";
397 #address-cells = <1>;
398 #size-cells = <0>;
400 clock-names = "core", "reg";
401 clocks = <&CP11X_LABEL(clk) 1 21>,
402 <&CP11X_LABEL(clk) 1 17>;
407 compatible = "marvell,mv78230-i2c";
409 #address-cells = <1>;
410 #size-cells = <0>;
412 clock-names = "core", "reg";
413 clocks = <&CP11X_LABEL(clk) 1 21>,
414 <&CP11X_LABEL(clk) 1 17>;
419 compatible = "snps,dw-apb-uart";
421 reg-shift = <2>;
423 reg-io-width = <1>;
424 clock-names = "baudclk", "apb_pclk";
425 clocks = <&CP11X_LABEL(clk) 1 21>,
426 <&CP11X_LABEL(clk) 1 17>;
431 compatible = "snps,dw-apb-uart";
433 reg-shift = <2>;
435 reg-io-width = <1>;
436 clock-names = "baudclk", "apb_pclk";
437 clocks = <&CP11X_LABEL(clk) 1 21>,
438 <&CP11X_LABEL(clk) 1 17>;
443 compatible = "snps,dw-apb-uart";
445 reg-shift = <2>;
447 reg-io-width = <1>;
448 clock-names = "baudclk", "apb_pclk";
449 clocks = <&CP11X_LABEL(clk) 1 21>,
450 <&CP11X_LABEL(clk) 1 17>;
455 compatible = "snps,dw-apb-uart";
457 reg-shift = <2>;
459 reg-io-width = <1>;
460 clock-names = "baudclk", "apb_pclk";
461 clocks = <&CP11X_LABEL(clk) 1 21>,
462 <&CP11X_LABEL(clk) 1 17>;
472 compatible = "marvell,armada-8k-nand-controller",
473 "marvell,armada370-nand-controller";
475 #address-cells = <1>;
476 #size-cells = <0>;
478 clock-names = "core", "reg";
479 clocks = <&CP11X_LABEL(clk) 1 2>,
480 <&CP11X_LABEL(clk) 1 17>;
481 marvell,system-controller = <&CP11X_LABEL(syscon0)>;
486 compatible = "marvell,armada-8k-rng",
487 "inside-secure,safexcel-eip76";
490 clock-names = "core", "reg";
491 clocks = <&CP11X_LABEL(clk) 1 25>,
492 <&CP11X_LABEL(clk) 1 17>;
497 compatible = "marvell,armada-cp110-sdhci";
500 clock-names = "core", "axi";
501 clocks = <&CP11X_LABEL(clk) 1 4>, <&CP11X_LABEL(clk) 1 18>;
502 dma-coherent;
507 compatible = "inside-secure,safexcel-eip197b";
515 interrupt-names = "mem", "ring0", "ring1",
517 clock-names = "core", "reg";
518 clocks = <&CP11X_LABEL(clk) 1 26>,
519 <&CP11X_LABEL(clk) 1 17>;
520 dma-coherent;
525 compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
528 reg-names = "ctrl", "config";
529 #address-cells = <3>;
530 #size-cells = <2>;
531 #interrupt-cells = <1>;
533 dma-coherent;
534 msi-parent = <&gic_v2m0>;
536 bus-range = <0 0xff>;
537 /* non-prefetchable memory */
539 interrupt-map-mask = <0 0 0 0>;
540 interrupt-map = <0 0 0 0 &CP11X_LABEL(icu_nsr) 22 IRQ_TYPE_LEVEL_HIGH>;
542 num-lanes = <1>;
543 clock-names = "core", "reg";
544 clocks = <&CP11X_LABEL(clk) 1 13>, <&CP11X_LABEL(clk) 1 14>;
549 compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
552 reg-names = "ctrl", "config";
553 #address-cells = <3>;
554 #size-cells = <2>;
555 #interrupt-cells = <1>;
557 dma-coherent;
558 msi-parent = <&gic_v2m0>;
560 bus-range = <0 0xff>;
561 /* non-prefetchable memory */
563 interrupt-map-mask = <0 0 0 0>;
564 interrupt-map = <0 0 0 0 &CP11X_LABEL(icu_nsr) 24 IRQ_TYPE_LEVEL_HIGH>;
567 num-lanes = <1>;
568 clock-names = "core", "reg";
569 clocks = <&CP11X_LABEL(clk) 1 11>, <&CP11X_LABEL(clk) 1 14>;
574 compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
577 reg-names = "ctrl", "config";
578 #address-cells = <3>;
579 #size-cells = <2>;
580 #interrupt-cells = <1>;
582 dma-coherent;
583 msi-parent = <&gic_v2m0>;
585 bus-range = <0 0xff>;
586 /* non-prefetchable memory */
588 interrupt-map-mask = <0 0 0 0>;
589 interrupt-map = <0 0 0 0 &CP11X_LABEL(icu_nsr) 23 IRQ_TYPE_LEVEL_HIGH>;
592 num-lanes = <1>;
593 clock-names = "core", "reg";
594 clocks = <&CP11X_LABEL(clk) 1 12>, <&CP11X_LABEL(clk) 1 14>;