1 // SPDX-License-Identifier: GPL-2.0-only
5  * Copyright (C) 2010 Linus Walleij for ST-Ericsson
8 #include <linux/interrupt.h>
16 #include <linux/clk.h>
28 #define MTU_IMSC	0x00	/* Interrupt mask set/clear */
29 #define MTU_RIS		0x04	/* Raw interrupt status */
30 #define MTU_MIS		0x08	/* Masked interrupt status */
31 #define MTU_ICR		0x0C	/* Interrupt clear register */
33 /* per-timer registers take 0..3 as argument */
41 #define MTU_CRn_PERIODIC	0x40	/* if 0 = free-running */
66 static u32 nmdk_cycle;		/* write-once */
79 	return -readl(mtu_base + MTU_VAL(0));  in nomadik_read_sched_clock()
87 /* Clockevent device: use one-shot mode */
103 		/* Timer: configure load and background-load, and fire it up */  in nmdk_clkevt_reset()
112 		/* Generate an interrupt to start the clockevent again */  in nmdk_clkevt_reset()
145 	/* ClockSource: configure load and background-load, and fire it up */  in nmdk_clksrc_reset()
179 	writel(1 << 1, mtu_base + MTU_ICR); /* Interrupt clear reg */  in nmdk_timer_interrupt()
180 	evdev->event_handler(evdev);  in nmdk_timer_interrupt()
185 				   struct clk *pclk, struct clk *clk)  in nmdk_timer_init()  argument
194 	BUG_ON(clk_prepare_enable(clk));  in nmdk_timer_init()
200 	 * Use a divide-by-16 counter if the tick rate is more than 32MHz.  in nmdk_timer_init()
202 	 * to wake-up at a max 127s a head in time. Dividing a 2.4 MHz timer  in nmdk_timer_init()
205 	rate = clk_get_rate(clk);  in nmdk_timer_init()
251 	struct clk *pclk;  in nmdk_timer_of_init()
252 	struct clk *clk;  in nmdk_timer_of_init()  local
259 		return -ENXIO;  in nmdk_timer_of_init()
268 	clk = of_clk_get_by_name(node, "timclk");  in nmdk_timer_of_init()
269 	if (IS_ERR(clk)) {  in nmdk_timer_of_init()
271 		return PTR_ERR(clk);  in nmdk_timer_of_init()
277 		return -EINVAL;  in nmdk_timer_of_init()
280 	return nmdk_timer_init(base, irq, pclk, clk);  in nmdk_timer_of_init()
282 TIMER_OF_DECLARE(nomadik_mtu, "st,nomadik-mtu",