Lines Matching +full:interrupt +full:- +full:clk
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx93-clock.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/fsl,imx93-power.h>
12 #include "imx93-pinfunc.h"
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
42 #address-cells = <1>;
43 #size-cells = <0>;
47 compatible = "arm,cortex-a55";
49 enable-method = "psci";
50 #cooling-cells = <2>;
55 compatible = "arm,cortex-a55";
57 enable-method = "psci";
58 #cooling-cells = <2>;
63 osc_32k: clock-osc-32k {
64 compatible = "fixed-clock";
65 #clock-cells = <0>;
66 clock-frequency = <32768>;
67 clock-output-names = "osc_32k";
70 osc_24m: clock-osc-24m {
71 compatible = "fixed-clock";
72 #clock-cells = <0>;
73 clock-frequency = <24000000>;
74 clock-output-names = "osc_24m";
77 clk_ext1: clock-ext1 {
78 compatible = "fixed-clock";
79 #clock-cells = <0>;
80 clock-frequency = <133000000>;
81 clock-output-names = "clk_ext1";
85 compatible = "arm,cortex-a55-pmu";
90 compatible = "arm,psci-1.0";
95 compatible = "arm,armv8-timer";
100 clock-frequency = <24000000>;
101 arm,no-tick-in-suspend;
102 interrupt-parent = <&gic>;
105 gic: interrupt-controller@48000000 {
106 compatible = "arm,gic-v3";
109 #interrupt-cells = <3>;
110 interrupt-controller;
112 interrupt-parent = <&gic>;
116 compatible = "simple-bus";
117 #address-cells = <1>;
118 #size-cells = <1>;
123 compatible = "fsl,aips-bus", "simple-bus";
125 #address-cells = <1>;
126 #size-cells = <1>;
130 compatible = "fsl,imx93-aonmix-ns-syscfg", "syscon";
135 compatible = "fsl,imx93-mu", "fsl,imx8ulp-mu";
138 #mbox-cells = <2>;
143 compatible = "nxp,sysctr-timer";
147 clock-names = "per";
151 compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
154 clocks = <&clk IMX93_CLK_LPI2C1_GATE>,
155 <&clk IMX93_CLK_BUS_AON>;
156 clock-names = "per", "ipg";
161 compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
164 clocks = <&clk IMX93_CLK_LPI2C2_GATE>,
165 <&clk IMX93_CLK_BUS_AON>;
166 clock-names = "per", "ipg";
171 #address-cells = <1>;
172 #size-cells = <0>;
173 compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
176 clocks = <&clk IMX93_CLK_LPSPI1_GATE>,
177 <&clk IMX93_CLK_BUS_AON>;
178 clock-names = "per", "ipg";
183 #address-cells = <1>;
184 #size-cells = <0>;
185 compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
188 clocks = <&clk IMX93_CLK_LPSPI2_GATE>,
189 <&clk IMX93_CLK_BUS_AON>;
190 clock-names = "per", "ipg";
195 compatible = "fsl,imx93-lpuart", "fsl,imx7ulp-lpuart";
198 clocks = <&clk IMX93_CLK_LPUART1_GATE>;
199 clock-names = "ipg";
204 compatible = "fsl,imx93-lpuart", "fsl,imx7ulp-lpuart";
207 clocks = <&clk IMX93_CLK_LPUART2_GATE>;
208 clock-names = "ipg";
213 compatible = "fsl,imx93-iomuxc";
218 clk: clock-controller@44450000 { label
219 compatible = "fsl,imx93-ccm";
221 #clock-cells = <1>;
223 clock-names = "osc_32k", "osc_24m", "clk_ext1";
227 src: system-controller@44460000 {
228 compatible = "fsl,imx93-src", "syscon";
230 #address-cells = <1>;
231 #size-cells = <1>;
234 mediamix: power-domain@44462400 {
235 compatible = "fsl,imx93-src-slice";
237 #power-domain-cells = <0>;
238 clocks = <&clk IMX93_CLK_MEDIA_AXI>,
239 <&clk IMX93_CLK_MEDIA_APB>;
242 mlmix: power-domain@44461800 {
243 compatible = "fsl,imx93-src-slice";
245 #power-domain-cells = <0>;
246 clocks = <&clk IMX93_CLK_ML_APB>,
247 <&clk IMX93_CLK_ML>;
252 compatible = "fsl,imx93-anatop", "syscon";
258 compatible = "fsl,aips-bus", "simple-bus";
260 #address-cells = <1>;
261 #size-cells = <1>;
265 compatible = "fsl,imx93-wakeupmix-syscfg", "syscon";
270 compatible = "fsl,imx93-mu", "fsl,imx8ulp-mu";
273 #mbox-cells = <2>;
278 compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
281 clocks = <&clk IMX93_CLK_LPI2C3_GATE>,
282 <&clk IMX93_CLK_BUS_WAKEUP>;
283 clock-names = "per", "ipg";
288 compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
291 clocks = <&clk IMX93_CLK_LPI2C4_GATE>,
292 <&clk IMX93_CLK_BUS_WAKEUP>;
293 clock-names = "per", "ipg";
298 compatible = "fsl,imx93-lpuart", "fsl,imx7ulp-lpuart";
301 clocks = <&clk IMX93_CLK_LPUART3_GATE>;
302 clock-names = "ipg";
307 compatible = "fsl,imx93-lpuart", "fsl,imx7ulp-lpuart";
310 clocks = <&clk IMX93_CLK_LPUART4_GATE>;
311 clock-names = "ipg";
316 compatible = "fsl,imx93-lpuart", "fsl,imx7ulp-lpuart";
319 clocks = <&clk IMX93_CLK_LPUART5_GATE>;
320 clock-names = "ipg";
325 compatible = "fsl,imx93-lpuart", "fsl,imx7ulp-lpuart";
328 clocks = <&clk IMX93_CLK_LPUART6_GATE>;
329 clock-names = "ipg";
334 compatible = "fsl,imx93-lpuart", "fsl,imx7ulp-lpuart";
337 clocks = <&clk IMX93_CLK_LPUART7_GATE>;
338 clock-names = "ipg";
343 compatible = "fsl,imx93-lpuart", "fsl,imx7ulp-lpuart";
346 clocks = <&clk IMX93_CLK_LPUART8_GATE>;
347 clock-names = "ipg";
352 compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
355 clocks = <&clk IMX93_CLK_LPI2C5_GATE>,
356 <&clk IMX93_CLK_BUS_WAKEUP>;
357 clock-names = "per", "ipg";
362 compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
365 clocks = <&clk IMX93_CLK_LPI2C6_GATE>,
366 <&clk IMX93_CLK_BUS_WAKEUP>;
367 clock-names = "per", "ipg";
372 compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
375 clocks = <&clk IMX93_CLK_LPI2C7_GATE>,
376 <&clk IMX93_CLK_BUS_WAKEUP>;
377 clock-names = "per", "ipg";
382 compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
385 clocks = <&clk IMX93_CLK_LPI2C8_GATE>,
386 <&clk IMX93_CLK_BUS_WAKEUP>;
387 clock-names = "per", "ipg";
394 compatible = "fsl,aips-bus", "simple-bus";
396 #address-cells = <1>;
397 #size-cells = <1>;
401 compatible = "fsl,imx93-usdhc", "fsl,imx8mm-usdhc";
404 clocks = <&clk IMX93_CLK_BUS_WAKEUP>,
405 <&clk IMX93_CLK_WAKEUP_AXI>,
406 <&clk IMX93_CLK_USDHC1_GATE>;
407 clock-names = "ipg", "ahb", "per";
408 bus-width = <8>;
409 fsl,tuning-start-tap = <20>;
410 fsl,tuning-step= <2>;
415 compatible = "fsl,imx93-usdhc", "fsl,imx8mm-usdhc";
418 clocks = <&clk IMX93_CLK_BUS_WAKEUP>,
419 <&clk IMX93_CLK_WAKEUP_AXI>,
420 <&clk IMX93_CLK_USDHC2_GATE>;
421 clock-names = "ipg", "ahb", "per";
422 bus-width = <4>;
423 fsl,tuning-start-tap = <20>;
424 fsl,tuning-step= <2>;
429 compatible = "fsl,imx93-usdhc", "fsl,imx8mm-usdhc";
432 clocks = <&clk IMX93_CLK_BUS_WAKEUP>,
433 <&clk IMX93_CLK_WAKEUP_AXI>,
434 <&clk IMX93_CLK_USDHC3_GATE>;
435 clock-names = "ipg", "ahb", "per";
436 bus-width = <4>;
437 fsl,tuning-start-tap = <20>;
438 fsl,tuning-step= <2>;
444 compatible = "fsl,imx93-gpio", "fsl,imx7ulp-gpio";
446 gpio-controller;
447 #gpio-cells = <2>;
449 interrupt-controller;
450 #interrupt-cells = <2>;
451 clocks = <&clk IMX93_CLK_GPIO2_GATE>,
452 <&clk IMX93_CLK_GPIO2_GATE>;
453 clock-names = "gpio", "port";
454 gpio-ranges = <&iomuxc 0 4 30>;
458 compatible = "fsl,imx93-gpio", "fsl,imx7ulp-gpio";
460 gpio-controller;
461 #gpio-cells = <2>;
463 interrupt-controller;
464 #interrupt-cells = <2>;
465 clocks = <&clk IMX93_CLK_GPIO3_GATE>,
466 <&clk IMX93_CLK_GPIO3_GATE>;
467 clock-names = "gpio", "port";
468 gpio-ranges = <&iomuxc 0 84 8>, <&iomuxc 8 66 18>,
473 compatible = "fsl,imx93-gpio", "fsl,imx7ulp-gpio";
475 gpio-controller;
476 #gpio-cells = <2>;
478 interrupt-controller;
479 #interrupt-cells = <2>;
480 clocks = <&clk IMX93_CLK_GPIO4_GATE>,
481 <&clk IMX93_CLK_GPIO4_GATE>;
482 clock-names = "gpio", "port";
483 gpio-ranges = <&iomuxc 0 38 28>, <&iomuxc 28 36 2>;
487 compatible = "fsl,imx93-gpio", "fsl,imx7ulp-gpio";
489 gpio-controller;
490 #gpio-cells = <2>;
492 interrupt-controller;
493 #interrupt-cells = <2>;
494 clocks = <&clk IMX93_CLK_GPIO1_GATE>,
495 <&clk IMX93_CLK_GPIO1_GATE>;
496 clock-names = "gpio", "port";
497 gpio-ranges = <&iomuxc 0 92 16>;
501 compatible = "fsl,imx93-mu-s4";
505 interrupt-names = "tx", "rx";
506 #mbox-cells = <2>;
509 media_blk_ctrl: system-controller@4ac10000 {
510 compatible = "fsl,imx93-media-blk-ctrl", "syscon";
512 power-domains = <&mediamix>;
513 clocks = <&clk IMX93_CLK_MEDIA_APB>,
514 <&clk IMX93_CLK_MEDIA_AXI>,
515 <&clk IMX93_CLK_NIC_MEDIA_GATE>,
516 <&clk IMX93_CLK_MEDIA_DISP_PIX>,
517 <&clk IMX93_CLK_CAM_PIX>,
518 <&clk IMX93_CLK_PXP_GATE>,
519 <&clk IMX93_CLK_LCDIF_GATE>,
520 <&clk IMX93_CLK_ISI_GATE>,
521 <&clk IMX93_CLK_MIPI_CSI_GATE>,
522 <&clk IMX93_CLK_MIPI_DSI_GATE>;
523 clock-names = "apb", "axi", "nic", "disp", "cam",
525 #power-domain-cells = <1>;