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/Linux-v5.15/Documentation/devicetree/bindings/usb/
Dqcom,dwc3.yaml114 "^usb@[0-9a-f]+$":
142 reg = <0 0x0a6f8800 0 0x400>;
172 reg = <0 0x0a600000 0 0xcd00>;
174 iommus = <&apps_smmu 0x740 0>;
/Linux-v5.15/drivers/staging/media/meson/vdec/
Dhevc_regs.h9 #define HEVC_ASSIST_MMU_MAP_ADDR 0xc024
11 #define HEVC_ASSIST_MBOX1_CLR_REG 0xc1d4
12 #define HEVC_ASSIST_MBOX1_MASK 0xc1d8
14 #define HEVC_ASSIST_SCRATCH_0 0xc300
15 #define HEVC_ASSIST_SCRATCH_1 0xc304
16 #define HEVC_ASSIST_SCRATCH_2 0xc308
17 #define HEVC_ASSIST_SCRATCH_3 0xc30c
18 #define HEVC_ASSIST_SCRATCH_4 0xc310
19 #define HEVC_ASSIST_SCRATCH_5 0xc314
20 #define HEVC_ASSIST_SCRATCH_6 0xc318
[all …]
/Linux-v5.15/arch/arm64/boot/dts/qcom/
Dipq8074.dtsi17 #clock-cells = <0>;
23 #clock-cells = <0>;
28 #address-cells = <0x1>;
29 #size-cells = <0x0>;
31 CPU0: cpu@0 {
34 reg = <0x0>;
43 reg = <0x1>;
51 reg = <0x2>;
59 reg = <0x3>;
65 cache-level = <0x2>;
[all …]
Dsm6125.dtsi22 #clock-cells = <0>;
29 #clock-cells = <0>;
37 #size-cells = <0>;
39 CPU0: cpu@0 {
42 reg = <0x0 0x0>;
54 reg = <0x0 0x1>;
63 reg = <0x0 0x2>;
72 reg = <0x0 0x3>;
81 reg = <0x0 0x100>;
93 reg = <0x0 0x101>;
[all …]
Dipq6018.dtsi22 #clock-cells = <0>;
28 #clock-cells = <0>;
34 #size-cells = <0>;
36 CPU0: cpu@0 {
39 reg = <0x0>;
52 reg = <0x1>;
64 reg = <0x2>;
76 reg = <0x3>;
86 cache-level = <0x2>;
134 syscon = <&tcsr_mutex_regs 0 0x80>;
[all …]
Dsm8350.dtsi28 #clock-cells = <0>;
36 #clock-cells = <0>;
42 #size-cells = <0>;
44 CPU0: cpu@0 {
47 reg = <0x0 0x0>;
50 qcom,freq-domain = <&cpufreq_hw 0>;
64 reg = <0x0 0x100>;
67 qcom,freq-domain = <&cpufreq_hw 0>;
78 reg = <0x0 0x200>;
81 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]
Dqcs404.dtsi22 #clock-cells = <0>;
28 #clock-cells = <0>;
35 #size-cells = <0>;
40 reg = <0x100>;
54 reg = <0x101>;
68 reg = <0x102>;
82 reg = <0x103>;
101 CPU_SLEEP_0: cpu-sleep-0 {
104 arm,psci-suspend-param = <0x40000003>;
158 reg = <0 0x80000000 0 0>;
[all …]
Dsm8150.dtsi30 #clock-cells = <0>;
37 #clock-cells = <0>;
45 #size-cells = <0>;
47 CPU0: cpu@0 {
50 reg = <0x0 0x0>;
55 qcom,freq-domain = <&cpufreq_hw 0>;
74 reg = <0x0 0x100>;
79 qcom,freq-domain = <&cpufreq_hw 0>;
96 reg = <0x0 0x200>;
101 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]
Dmsm8998.dtsi14 qcom,msm-id = <292 0x0>;
24 reg = <0x0 0x80000000 0x0 0x0>;
33 reg = <0x0 0x85800000 0x0 0x600000>;
38 reg = <0x0 0x85e00000 0x0 0x100000>;
43 reg = <0x0 0x86000000 0x0 0x200000>;
48 reg = <0x0 0x86200000 0x0 0x2d00000>;
54 reg = <0x0 0x88f00000 0x0 0x200000>;
62 reg = <0x0 0x8ab00000 0x0 0x700000>;
67 reg = <0x0 0x8b200000 0x0 0x1a00000>;
72 reg = <0x0 0x8cc00000 0x0 0x7000000>;
[all …]
Dsm8250.dtsi78 #clock-cells = <0>;
86 #clock-cells = <0>;
92 #size-cells = <0>;
94 CPU0: cpu@0 {
97 reg = <0x0 0x0>;
102 qcom,freq-domain = <&cpufreq_hw 0>;
116 reg = <0x0 0x100>;
121 qcom,freq-domain = <&cpufreq_hw 0>;
132 reg = <0x0 0x200>;
137 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]
Dsdm845.dtsi73 reg = <0 0x80000000 0 0>;
82 reg = <0 0x85700000 0 0x600000>;
87 reg = <0 0x85e00000 0 0x100000>;
92 reg = <0 0x85fc0000 0 0x20000>;
98 reg = <0x0 0x85fe0000 0 0x20000>;
103 reg = <0x0 0x86000000 0 0x200000>;
108 reg = <0 0x86200000 0 0x2d00000>;
114 reg = <0 0x88f00000 0 0x200000>;
122 reg = <0 0x8ab00000 0 0x1400000>;
127 reg = <0 0x8bf00000 0 0x500000>;
[all …]
/Linux-v5.15/arch/arm/boot/dts/
Duniphier-pro4.dtsi17 #size-cells = <0>;
19 cpu@0 {
22 reg = <0>;
44 #clock-cells = <0>;
49 #clock-cells = <0>;
64 reg = <0x500c0000 0x2000>, <0x503c0100 0x4>,
65 <0x506c0000 0x400>;
66 interrupts = <0 174 4>, <0 175 4>;
77 reg = <0x54006000 0x100>;
79 #size-cells = <0>;
[all …]
Duniphier-pro5.dtsi15 #size-cells = <0>;
17 cpu@0 {
20 reg = <0>;
116 #clock-cells = <0>;
121 #clock-cells = <0>;
136 reg = <0x500c0000 0x2000>, <0x503c0100 0x8>,
137 <0x506c0000 0x400>;
138 interrupts = <0 190 4>, <0 191 4>;
149 reg = <0x500c8000 0x2000>, <0x503c8100 0x8>,
150 <0x506c8000 0x400>;
[all …]
Duniphier-pxs2.dtsi18 #size-cells = <0>;
20 cpu0: cpu@0 {
23 reg = <0>;
111 #clock-cells = <0>;
116 #clock-cells = <0>;
162 reg = <0x500c0000 0x2000>, <0x503c0100 0x8>,
163 <0x506c0000 0x400>;
164 interrupts = <0 174 4>, <0 175 4>, <0 190 4>, <0 191 4>;
175 reg = <0x54006000 0x100>;
177 #size-cells = <0>;
[all …]
Dqcom-ipq8064.dtsi23 #size-cells = <0>;
25 cpu0: cpu@0 {
29 reg = <0>;
53 polling-delay-passive = <0>;
54 polling-delay = <0>;
55 thermal-sensors = <&tsens 0>;
73 polling-delay-passive = <0>;
74 polling-delay = <0>;
93 polling-delay-passive = <0>;
94 polling-delay = <0>;
[all …]
Dqcom-sdx55.dtsi19 qcom,msm-id = <357 0x10000>, <368 0x10000>, <418 0x10000>;
24 reg = <0 0>;
30 #clock-cells = <0>;
37 #clock-cells = <0>;
43 #clock-cells = <0>;
50 #size-cells = <0>;
52 cpu0: cpu@0 {
55 reg = <0x0>;
107 reg = <0x8fc00000 0x80000>;
112 reg = <0x8fc80000 0x40000>;
[all …]
/Linux-v5.15/arch/arm64/boot/dts/socionext/
Duniphier-pxs3.dtsi20 #size-cells = <0>;
39 cpu0: cpu@0 {
42 reg = <0 0x000>;
52 reg = <0 0x001>;
62 reg = <0 0x002>;
72 reg = <0 0x003>;
126 #clock-cells = <0>;
181 reg = <0x0 0x81000000 0x0 0x01000000>;
186 soc@0 {
190 ranges = <0 0 0 0xffffffff>;
[all …]
Duniphier-ld20.dtsi20 #size-cells = <0>;
42 cpu0: cpu@0 {
45 reg = <0 0x000>;
55 reg = <0 0x001>;
65 reg = <0 0x100>;
75 reg = <0 0x101>;
167 #clock-cells = <0>;
222 reg = <0x0 0x81000000 0x0 0x01000000>;
227 soc@0 {
231 ranges = <0 0 0 0xffffffff>;
[all …]
/Linux-v5.15/drivers/ptp/
Didt8a340_reg.h8 * Based on 4.8.0, SCSR rev C commit a03c7ae5
13 #define PAGE_ADDR_BASE 0x0000
14 #define PAGE_ADDR 0x00fc
16 #define HW_REVISION 0x8180
17 #define REV_ID 0x007a
19 #define HW_DPLL_0 (0x8a00)
20 #define HW_DPLL_1 (0x8b00)
21 #define HW_DPLL_2 (0x8c00)
22 #define HW_DPLL_3 (0x8d00)
23 #define HW_DPLL_4 (0x8e00)
[all …]
/Linux-v5.15/include/linux/mfd/
Didt8a340_reg.h3 * Based on 5.2.0, Family Programming Guide (Sept 30, 2020)
10 #define PAGE_ADDR_BASE 0x0000
11 #define PAGE_ADDR 0x00fc
13 #define HW_REVISION 0x8180
14 #define REV_ID 0x007a
16 #define HW_DPLL_0 (0x8a00)
17 #define HW_DPLL_1 (0x8b00)
18 #define HW_DPLL_2 (0x8c00)
19 #define HW_DPLL_3 (0x8d00)
20 #define HW_DPLL_4 (0x8e00)
[all …]
/Linux-v5.15/drivers/usb/dwc3/
Ddwc3-qcom.c27 #define QSCRATCH_HS_PHY_CTRL 0x10
31 #define QSCRATCH_SS_PHY_CTRL 0x30
34 #define QSCRATCH_GENERAL_CFG 0x08
35 #define PIPE_UTMI_CLK_SEL BIT(0)
39 #define PWR_EVNT_IRQ_STAT_REG 0x58
43 #define SDM845_QSCRATCH_BASE_OFFSET 0xf8800
44 #define SDM845_QSCRATCH_SIZE 0x400
45 #define SDM845_DWC3_CORE_SIZE 0xcd00
52 #define APPS_USB_AVG_BW 0
164 return 0; in dwc3_qcom_register_extcon()
[all …]
/Linux-v5.15/drivers/nvme/host/
Dpci.c46 module_param(use_threaded_interrupts, int, 0);
61 "this size. Use 0 to disable SGLs.");
81 if (ret != 0 || n > num_possible_cpus()) in io_queue_count_set()
207 #define NVMEQ_ENABLED 0
230 int npages; /* In the PRP list. 0 means small pool in use */
248 return 0; in nvme_dbbuf_dma_alloc()
265 return 0; in nvme_dbbuf_dma_alloc()
319 if (nvme_submit_sync_cmd(dev->ctrl.admin_q, &c, NULL, 0)) { in nvme_dbbuf_set()
399 struct nvme_queue *nvmeq = &dev->queues[0]; in nvme_admin_init_hctx()
401 WARN_ON(hctx_idx != 0); in nvme_admin_init_hctx()
[all …]
/Linux-v5.15/Documentation/networking/
Darcnet-hardware.rst269 values in the Linux ARCnet driver are only from 0x200 through 0x3F0. (If
272 a doc I got from Novell, MS Windows prefers values of 0x300 or more,
274 this may be because, if your card is at 0x2E0, probing for a serial port
275 at 0x2E8 will reset the card and probably mess things up royally.
277 - Avery's favourite: 0x300.
292 IRQ 0 Timer 0 (Not on bus)
340 Anything less than 0xA0000 is, well, a BAD idea since it isn't above
343 - Avery's favourite: 0xD0000
346 address from 0 to 255. Unlike Ethernet, you can set this address
349 on a network. DON'T use 0 or 255, since these are reserved (although
[all …]
/Linux-v5.15/drivers/net/usb/
Dr8152.c44 #define PLA_IDR 0xc000
45 #define PLA_RCR 0xc010
46 #define PLA_RCR1 0xc012
47 #define PLA_RMS 0xc016
48 #define PLA_RXFIFO_CTRL0 0xc0a0
49 #define PLA_RXFIFO_FULL 0xc0a2
50 #define PLA_RXFIFO_CTRL1 0xc0a4
51 #define PLA_RX_FIFO_FULL 0xc0a6
52 #define PLA_RXFIFO_CTRL2 0xc0a8
53 #define PLA_RX_FIFO_EMPTY 0xc0aa
[all …]
/Linux-v5.15/fs/nls/
Dnls_cp949.c17 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x00-0x07 */
18 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x08-0x0F */
19 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x10-0x17 */
20 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x18-0x1F */
21 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x20-0x27 */
22 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x28-0x2F */
23 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x30-0x37 */
24 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x38-0x3F */
25 0x0000,0xAC02,0xAC03,0xAC05,0xAC06,0xAC0B,0xAC0C,0xAC0D,/* 0x40-0x47 */
26 0xAC0E,0xAC0F,0xAC18,0xAC1E,0xAC1F,0xAC21,0xAC22,0xAC23,/* 0x48-0x4F */
[all …]