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/Linux-v5.10/arch/powerpc/include/asm/
Dmpic.h14 #define MPIC_GREG_BASE 0x01000
16 #define MPIC_GREG_FEATURE_0 0x00000
17 #define MPIC_GREG_FEATURE_LAST_SRC_MASK 0x07ff0000
19 #define MPIC_GREG_FEATURE_LAST_CPU_MASK 0x00001f00
21 #define MPIC_GREG_FEATURE_VERSION_MASK 0xff
22 #define MPIC_GREG_FEATURE_1 0x00010
23 #define MPIC_GREG_GLOBAL_CONF_0 0x00020
24 #define MPIC_GREG_GCONF_RESET 0x80000000
27 * 0b00 = pass through (interrupts routed to IRQ0)
28 * 0b01 = Mixed mode
[all …]
/Linux-v5.10/drivers/media/common/b2c2/
Dflexcop-sram.c28 return 0; in flexcop_sram_init()
55 return 0; in flexcop_sram_set_dest()
75 #if 0
81 for (i = 0; i < len; i++) {
82 command = bank | addr | 0x04000000 | (*buf << 0x10);
86 while (((read_reg_dw(adapter, 0x700) & 0x80000000) != 0) && (retries > 0)) {
91 if (retries == 0)
94 write_reg_dw(adapter, 0x700, command);
106 for (i = 0; i < len; i++) {
107 command = bank | addr | 0x04008000;
[all …]
/Linux-v5.10/drivers/gpu/drm/arm/
Dmalidp_regs.h20 #define MALIDP_DE_IRQ_UNDERRUN (1 << 0)
34 #define MALIDP500_SE_IRQ_CONF_MODE (1 << 0)
50 #define MALIDP550_SE_IRQ_EOW (1 << 0)
54 #define MALIDP550_DC_IRQ_CONF_VALID (1 << 0)
67 #define MALIDP_CFG_VALID (1 << 0)
68 #define MALIDP_DISP_FUNC_GAMMA (1 << 0)
75 #define MALIDP_REG_STATUS 0x00000
76 #define MALIDP_REG_SETIRQ 0x00004
77 #define MALIDP_REG_MASKIRQ 0x00008
78 #define MALIDP_REG_CLEARIRQ 0x0000c
[all …]
/Linux-v5.10/drivers/clk/imx/
Dclk-imx8qxp-lpcg.h11 #define LSIO_PWM_0_LPCG 0x00000
12 #define LSIO_PWM_1_LPCG 0x10000
13 #define LSIO_PWM_2_LPCG 0x20000
14 #define LSIO_PWM_3_LPCG 0x30000
15 #define LSIO_PWM_4_LPCG 0x40000
16 #define LSIO_PWM_5_LPCG 0x50000
17 #define LSIO_PWM_6_LPCG 0x60000
18 #define LSIO_PWM_7_LPCG 0x70000
19 #define LSIO_GPIO_0_LPCG 0x80000
20 #define LSIO_GPIO_1_LPCG 0x90000
[all …]
/Linux-v5.10/tools/perf/trace/beauty/tracepoints/
Dx86_msr.sh13 # Just the ones starting with 0x00000 so as to have a simple
17 …[[:space:]]*define[[:space:]]+MSR_([[:alnum:]][[:alnum:]_]+)[[:space:]]+(0x00000[[:xdigit:]]+)[[:s…
24 regex='^[[:space:]]*#[[:space:]]*define[[:space:]]+MSR_([[:alnum:]][[:alnum:]_]+)[[:space:]]+(0xc00…
33 regex='^[[:space:]]*#[[:space:]]*define[[:space:]]+MSR_([[:alnum:]][[:alnum:]_]+)[[:space:]]+(0xc00…
/Linux-v5.10/sound/soc/fsl/
Dfsl_audmix.c38 SOC_ENUM_SINGLE_S(FSL_AUDMIX_ATCR0, 0, endis_sel),
41 SOC_ENUM_SINGLE_S(FSL_AUDMIX_ATCR1, 0, endis_sel),
53 { .tdms = 0, .clk = 0, .msg = "" },
59 { .tdms = 3, .clk = 0, .msg = "DIS->MIX: Please start both TDMs!\n" }
61 { .tdms = 1, .clk = 0, .msg = "TDM1->DIS: TDM1 not started!\n" },
63 { .tdms = 0, .clk = 0, .msg = "" },
67 { .tdms = 3, .clk = 0, .msg = "TDM1->MIX: Please start both TDMs!\n" }
69 { .tdms = 2, .clk = 0, .msg = "TDM2->DIS: TDM2 not started!\n" },
73 { .tdms = 0, .clk = 0, .msg = "" },
75 { .tdms = 3, .clk = 0, .msg = "TDM2->MIX: Please start both TDMs!\n" }
[all …]
/Linux-v5.10/arch/arm/mach-mv78xx0/
Dmv78xx0.h20 * f0800000 PCIe #0 I/O space
32 * fee00000 f0800000 64K PCIe #0 I/O space
42 #define MV78XX0_CORE0_REGS_PHYS_BASE 0xf1020000
43 #define MV78XX0_CORE1_REGS_PHYS_BASE 0xf1024000
44 #define MV78XX0_CORE_REGS_VIRT_BASE IOMEM(0xfe400000)
45 #define MV78XX0_CORE_REGS_PHYS_BASE 0xfe400000
48 #define MV78XX0_PCIE_IO_PHYS_BASE(i) (0xf0800000 + ((i) << 20))
51 #define MV78XX0_REGS_PHYS_BASE 0xf1000000
52 #define MV78XX0_REGS_VIRT_BASE IOMEM(0xfec00000)
55 #define MV78XX0_PCIE_MEM_PHYS_BASE 0xc0000000
[all …]
/Linux-v5.10/arch/arm/mach-dove/
Ddove.h19 * e0000000 @runtime 128M PCIe-0 Memory space
23 * f2000000 fee00000 1M PCIe-0 I/O space
27 #define DOVE_CESA_PHYS_BASE 0xc8000000
28 #define DOVE_CESA_VIRT_BASE IOMEM(0xfdb00000)
31 #define DOVE_PCIE0_MEM_PHYS_BASE 0xe0000000
34 #define DOVE_PCIE1_MEM_PHYS_BASE 0xe8000000
37 #define DOVE_BOOTROM_PHYS_BASE 0xf8000000
40 #define DOVE_SCRATCHPAD_PHYS_BASE 0xf0000000
41 #define DOVE_SCRATCHPAD_VIRT_BASE IOMEM(0xfdd00000)
44 #define DOVE_SB_REGS_PHYS_BASE 0xf1000000
[all …]
/Linux-v5.10/drivers/gpu/drm/nouveau/nvkm/subdev/pci/
Dgk104.c29 return (nvkm_rd32(pci->subdev.device, 0x8c1c0) & 0x4) == 0x4 ? 2 : 1; in gk104_pcie_version_supported()
40 nvkm_mask(device, 0x8c1c0, 0x30000, 0x10000); in gk104_pcie_set_cap_speed()
44 nvkm_mask(device, 0x8c1c0, 0x30000, 0x20000); in gk104_pcie_set_cap_speed()
48 nvkm_mask(device, 0x8c1c0, 0x30000, 0x30000); in gk104_pcie_set_cap_speed()
58 if (speed == 0) in gk104_pcie_cap_speed()
62 int speed2 = nvkm_rd32(pci->subdev.device, 0x8c1c0) & 0x30000; in gk104_pcie_cap_speed()
64 case 0x00000: in gk104_pcie_cap_speed()
65 case 0x10000: in gk104_pcie_cap_speed()
67 case 0x20000: in gk104_pcie_cap_speed()
69 case 0x30000: in gk104_pcie_cap_speed()
[all …]
/Linux-v5.10/arch/powerpc/boot/dts/
Dtqm8548-bigflash.dts31 #size-cells = <0>;
33 PowerPC,8548@0 {
35 reg = <0>;
38 d-cache-size = <0x8000>; // L1, 32K
39 i-cache-size = <0x8000>; // L1, 32K
46 reg = <0x00000000 0x00000000>; // Filled in by U-Boot
53 ranges = <0x0 0xa0000000 0x100000>;
54 bus-frequency = <0>;
57 ecm-law@0 {
59 reg = <0x0 0x1000>;
[all …]
Dtqm8548.dts31 #size-cells = <0>;
33 PowerPC,8548@0 {
35 reg = <0>;
38 d-cache-size = <0x8000>; // L1, 32K
39 i-cache-size = <0x8000>; // L1, 32K
46 reg = <0x00000000 0x00000000>; // Filled in by U-Boot
53 ranges = <0x0 0xe0000000 0x100000>;
54 bus-frequency = <0>;
57 ecm-law@0 {
59 reg = <0x0 0x1000>;
[all …]
Dxpedite5200_xmon.dts18 boot-bank = <0x0>;
34 #size-cells = <0>;
36 PowerPC,8548@0 {
38 reg = <0>;
41 d-cache-size = <0x8000>; // L1, 32K
42 i-cache-size = <0x8000>; // L1, 32K
49 reg = <0x0 0x0>; // Filled in by boot loader
56 ranges = <0x0 0xef000000 0x100000>;
57 bus-frequency = <0>;
60 ecm-law@0 {
[all …]
/Linux-v5.10/arch/arm/mach-mvebu/
Dkirkwood.h12 #define KIRKWOOD_REGS_PHYS_BASE 0xf1000000
13 #define DDR_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0x00000)
14 #define BRIDGE_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0x20000)
16 #define DDR_OPERATION_BASE (DDR_PHYS_BASE + 0x1418)
18 #define CPU_CONFIG_PHYS (BRIDGE_PHYS_BASE + 0x0100)
19 #define CPU_CONFIG_ERROR_PROP 0x00000004
21 #define CPU_CONTROL_PHYS (BRIDGE_PHYS_BASE + 0x0104)
22 #define MEMORY_PM_CTRL_PHYS (BRIDGE_PHYS_BASE + 0x0118)
/Linux-v5.10/arch/arm/mach-ux500/
Ddb8500-regs.h10 #define U8500_ESRAM_BASE 0x40000000
11 #define U8500_ESRAM_BANK_SIZE 0x00020000
21 #define U8500_ESRAM_DMA_LCPA_OFFSET 0x10000
28 #define U8500_PER3_BASE 0x80000000
29 #define U8500_STM_BASE 0x80100000
30 #define U8500_STM_REG_BASE (U8500_STM_BASE + 0xF000)
31 #define U8500_PER2_BASE 0x80110000
32 #define U8500_PER1_BASE 0x80120000
33 #define U8500_B2R2_BASE 0x80130000
34 #define U8500_HSEM_BASE 0x80140000
[all …]
/Linux-v5.10/drivers/gpu/drm/nouveau/nvkm/engine/sec/fuc/
Dg98.fuc0s23 ctx_dma_query: .b32 0
24 ctx_dma_src: .b32 0
25 ctx_dma_dst: .b32 0
27 ctx_query_address_high: .b32 0
28 ctx_query_address_low: .b32 0
29 ctx_query_counter: .b32 0
30 ctx_cond_address_high: .b32 0
31 ctx_cond_address_low: .b32 0
32 ctx_cond_off: .b32 0
33 ctx_src_address_high: .b32 0
[all …]
/Linux-v5.10/tools/testing/selftests/kvm/include/x86_64/
Dprocessor.h18 #define X86_CR4_VME (1ul << 0)
39 #define UNEXPECTED_VECTOR_PORT 0xfff0u
225 __asm__ __volatile__("mov %0, %%cr4" : : "r" (val) : "memory"); in set_cr4()
250 asm volatile("movq %0, %%"#__xmm : : "r"(__var) : #__xmm)
255 case 0: in set_xmm()
285 assert(n >= 0 && n <= 7); in get_xmm()
296 case 0: in get_xmm()
313 return 0; in get_xmm()
335 return kvm_get_supported_cpuid_index(function, 0); in kvm_get_supported_cpuid_entry()
380 #define X86_CR0_PE (1UL<<0) /* Protection Enable */
[all …]
/Linux-v5.10/Documentation/devicetree/bindings/display/panel/
Darm,versatile-tft-panel.yaml36 sysreg@0 {
38 reg = <0x00000 0x1000>;
41 #size-cells = <0>;
/Linux-v5.10/arch/x86/include/asm/
Dapicdef.h12 #define IO_APIC_DEFAULT_PHYS_BASE 0xfec00000
13 #define APIC_DEFAULT_PHYS_BASE 0xfee00000
21 #define APIC_ID 0x20
23 #define APIC_LVR 0x30
24 #define APIC_LVR_MASK 0xFF00FF
26 #define GET_APIC_VERSION(x) ((x) & 0xFFu)
27 #define GET_APIC_MAXLVT(x) (((x) >> 16) & 0xFFu)
29 # define APIC_INTEGRATED(x) ((x) & 0xF0u)
33 #define APIC_XAPIC(x) ((x) >= 0x14)
34 #define APIC_EXT_SPACE(x) ((x) & 0x80000000)
[all …]
/Linux-v5.10/drivers/i2c/busses/
Di2c-efm32.c17 #define REG_CTRL 0x00
18 #define REG_CTRL_EN 0x00001
19 #define REG_CTRL_SLAVE 0x00002
20 #define REG_CTRL_AUTOACK 0x00004
21 #define REG_CTRL_AUTOSE 0x00008
22 #define REG_CTRL_AUTOSN 0x00010
23 #define REG_CTRL_ARBDIS 0x00020
24 #define REG_CTRL_GCAMEN 0x00040
25 #define REG_CTRL_CLHR__MASK 0x00300
26 #define REG_CTRL_BITO__MASK 0x03000
[all …]
/Linux-v5.10/arch/arm/mach-orion5x/
Dorion5x.h39 #define ORION5X_REGS_PHYS_BASE 0xf1000000
40 #define ORION5X_REGS_VIRT_BASE IOMEM(0xfec00000)
43 #define ORION5X_PCIE_IO_PHYS_BASE 0xf2000000
44 #define ORION5X_PCIE_IO_BUS_BASE 0x00000000
47 #define ORION5X_PCI_IO_PHYS_BASE 0xf2100000
48 #define ORION5X_PCI_IO_BUS_BASE 0x00010000
51 #define ORION5X_SRAM_PHYS_BASE (0xf2200000)
55 #define ORION5X_PCIE_WA_PHYS_BASE 0xf0000000
56 #define ORION5X_PCIE_WA_VIRT_BASE IOMEM(0xfd000000)
59 #define ORION5X_PCIE_MEM_PHYS_BASE 0xe0000000
[all …]
/Linux-v5.10/drivers/gpu/drm/v3d/
Dv3d_regs.h14 WARN_ON((fieldval & ~field##_MASK) != 0); \
23 #define V3D_HUB_AXICFG 0x00000
24 # define V3D_HUB_AXICFG_MAX_LEN_MASK V3D_MASK(3, 0)
25 # define V3D_HUB_AXICFG_MAX_LEN_SHIFT 0
26 #define V3D_HUB_UIFCFG 0x00004
27 #define V3D_HUB_IDENT0 0x00008
29 #define V3D_HUB_IDENT1 0x0000c
40 # define V3D_HUB_IDENT1_TVER_MASK V3D_MASK(3, 0)
41 # define V3D_HUB_IDENT1_TVER_SHIFT 0
43 #define V3D_HUB_IDENT2 0x00010
[all …]
/Linux-v5.10/drivers/net/ethernet/marvell/octeontx2/nic/
Dotx2_reg.h17 #define RVU_PF_VFX_PFVF_MBOX0 (0x00000)
18 #define RVU_PF_VFX_PFVF_MBOX1 (0x00008)
19 #define RVU_PF_VFX_PFVF_MBOXX(a, b) (0x0 | (a) << 12 | (b) << 3)
20 #define RVU_PF_VF_BAR4_ADDR (0x10)
21 #define RVU_PF_BLOCK_ADDRX_DISC(a) (0x200 | (a) << 3)
22 #define RVU_PF_VFME_STATUSX(a) (0x800 | (a) << 3)
23 #define RVU_PF_VFTRPENDX(a) (0x820 | (a) << 3)
24 #define RVU_PF_VFTRPEND_W1SX(a) (0x840 | (a) << 3)
25 #define RVU_PF_VFPF_MBOX_INTX(a) (0x880 | (a) << 3)
26 #define RVU_PF_VFPF_MBOX_INT_W1SX(a) (0x8A0 | (a) << 3)
[all …]
/Linux-v5.10/drivers/gpu/drm/nouveau/nvkm/engine/disp/
Ddp.h37 #define DPCD_RC00_DPCD_REV 0x00000
38 #define DPCD_RC01_MAX_LINK_RATE 0x00001
39 #define DPCD_RC02 0x00002
40 #define DPCD_RC02_ENHANCED_FRAME_CAP 0x80
41 #define DPCD_RC02_TPS3_SUPPORTED 0x40
42 #define DPCD_RC02_MAX_LANE_COUNT 0x1f
43 #define DPCD_RC03 0x00003
44 #define DPCD_RC03_MAX_DOWNSPREAD 0x01
45 #define DPCD_RC0E_AUX_RD_INTERVAL 0x0000e
48 #define DPCD_LC00_LINK_BW_SET 0x00100
[all …]
/Linux-v5.10/drivers/net/ethernet/intel/ixgbevf/
Dregs.h7 #define IXGBE_VFCTRL 0x00000
8 #define IXGBE_VFSTATUS 0x00008
9 #define IXGBE_VFLINKS 0x00010
10 #define IXGBE_VFFRTIMER 0x00048
11 #define IXGBE_VFRXMEMWRAP 0x03190
12 #define IXGBE_VTEICR 0x00100
13 #define IXGBE_VTEICS 0x00104
14 #define IXGBE_VTEIMS 0x00108
15 #define IXGBE_VTEIMC 0x0010C
16 #define IXGBE_VTEIAC 0x00110
[all …]
/Linux-v5.10/arch/mips/include/asm/netlogic/xlr/
Diomap.h38 #define DEFAULT_NETLOGIC_IO_BASE CKSEG1ADDR(0x1ef00000)
39 #define NETLOGIC_IO_DDR2_CHN0_OFFSET 0x01000
40 #define NETLOGIC_IO_DDR2_CHN1_OFFSET 0x02000
41 #define NETLOGIC_IO_DDR2_CHN2_OFFSET 0x03000
42 #define NETLOGIC_IO_DDR2_CHN3_OFFSET 0x04000
43 #define NETLOGIC_IO_PIC_OFFSET 0x08000
44 #define NETLOGIC_IO_UART_0_OFFSET 0x14000
45 #define NETLOGIC_IO_UART_1_OFFSET 0x15100
47 #define NETLOGIC_IO_SIZE 0x1000
49 #define NETLOGIC_IO_BRIDGE_OFFSET 0x00000
[all …]

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