Lines Matching +full:0 +full:x00000
20 #define MALIDP_DE_IRQ_UNDERRUN (1 << 0)
34 #define MALIDP500_SE_IRQ_CONF_MODE (1 << 0)
50 #define MALIDP550_SE_IRQ_EOW (1 << 0)
54 #define MALIDP550_DC_IRQ_CONF_VALID (1 << 0)
67 #define MALIDP_CFG_VALID (1 << 0)
68 #define MALIDP_DISP_FUNC_GAMMA (1 << 0)
75 #define MALIDP_REG_STATUS 0x00000
76 #define MALIDP_REG_SETIRQ 0x00004
77 #define MALIDP_REG_MASKIRQ 0x00008
78 #define MALIDP_REG_CLEARIRQ 0x0000c
81 #define MALIDP_DE_CORE_ID 0x00018
82 #define MALIDP_DE_DISPLAY_FUNC 0x00020
85 #define MALIDP_DE_H_TIMINGS 0x0
86 #define MALIDP_DE_V_TIMINGS 0x4
87 #define MALIDP_DE_SYNC_WIDTH 0x8
88 #define MALIDP_DE_HV_ACTIVE 0xc
91 #define MALIDP_DE_LG_STRIDE 0x18
92 #define MALIDP_DE_LV_STRIDE0 0x18
93 #define MALIDP550_DE_LS_R1_STRIDE 0x28
96 #define MALIDP_DE_H_FRONTPORCH(x) (((x) & 0xfff) << 0)
97 #define MALIDP_DE_H_BACKPORCH(x) (((x) & 0x3ff) << 16)
98 #define MALIDP500_DE_V_FRONTPORCH(x) (((x) & 0xff) << 0)
99 #define MALIDP550_DE_V_FRONTPORCH(x) (((x) & 0xfff) << 0)
100 #define MALIDP_DE_V_BACKPORCH(x) (((x) & 0xff) << 16)
101 #define MALIDP_DE_H_SYNCWIDTH(x) (((x) & 0x3ff) << 0)
102 #define MALIDP_DE_V_SYNCWIDTH(x) (((x) & 0xff) << 16)
103 #define MALIDP_DE_H_ACTIVE(x) (((x) & 0x1fff) << 0)
104 #define MALIDP_DE_V_ACTIVE(x) (((x) & 0x1fff) << 16)
109 #define MALIDP_COLOR_ADJ_COEF 0x00000
110 #define MALIDP_COEF_TABLE_ADDR 0x00030
111 #define MALIDP_COEF_TABLE_DATA 0x00034
114 #define MALIDP_SE_SCALING_EN (1 << 0)
126 #define MALIDP_SE_LAYER_CONTROL 0x14
127 #define MALIDP_SE_L0_IN_SIZE 0x00
128 #define MALIDP_SE_L0_OUT_SIZE 0x04
129 #define MALIDP_SE_SET_V_SIZE(x) (((x) & 0x1fff) << 16)
130 #define MALIDP_SE_SET_H_SIZE(x) (((x) & 0x1fff) << 0)
131 #define MALIDP_SE_SCALING_CONTROL 0x24
132 #define MALIDP_SE_H_INIT_PH 0x00
133 #define MALIDP_SE_H_DELTA_PH 0x04
134 #define MALIDP_SE_V_INIT_PH 0x08
135 #define MALIDP_SE_V_DELTA_PH 0x0c
136 #define MALIDP_SE_COEFFTAB_ADDR 0x10
137 #define MALIDP_SE_COEFFTAB_ADDR_MASK 0x7f
144 #define MALIDP_SE_COEFFTAB_DATA 0x14
145 #define MALIDP_SE_COEFFTAB_DATA_MASK 0x3fff
149 #define MALIDP_SE_IMAGE_ENH 0x3C
150 /* ENH_LIMITS offset 0x0 */
153 #define MALIDP_SE_ENH_LIMIT_MASK 0xfff
158 #define MALIDP_SE_ENH_COEFF0 0x04
162 #define MALIDP_MW_FORMAT 0x00000
163 #define MALIDP_MW_P1_STRIDE 0x00004
164 #define MALIDP_MW_P2_STRIDE 0x00008
165 #define MALIDP_MW_P1_PTR_LOW 0x0000c
166 #define MALIDP_MW_P1_PTR_HIGH 0x00010
167 #define MALIDP_MW_P2_PTR_LOW 0x0002c
168 #define MALIDP_MW_P2_PTR_HIGH 0x00030
171 #define MALIDP500_ADDR_SPACE_SIZE 0x01000
172 #define MALIDP500_DC_BASE 0x00000
173 #define MALIDP500_DC_CONTROL 0x0000c
177 #define MALIDP500_DC_CLEAR_MASK 0x300fff
178 #define MALIDP500_DE_LINE_COUNTER 0x00010
179 #define MALIDP500_DE_AXI_CONTROL 0x00014
180 #define MALIDP500_DE_SECURE_CTRL 0x0001c
181 #define MALIDP500_DE_CHROMA_KEY 0x00024
182 #define MALIDP500_TIMINGS_BASE 0x00028
184 #define MALIDP500_CONFIG_3D 0x00038
185 #define MALIDP500_BGND_COLOR 0x0003c
186 #define MALIDP500_OUTPUT_DEPTH 0x00044
187 #define MALIDP500_COEFFS_BASE 0x00078
194 #define MALIDP500_LV_YUV2RGB ((s16)(-0xB8))
195 #define MALIDP500_DE_LV_BASE 0x00100
196 #define MALIDP500_DE_LV_PTR_BASE 0x00124
197 #define MALIDP500_DE_LV_AD_CTRL 0x00400
198 #define MALIDP500_DE_LG1_BASE 0x00200
199 #define MALIDP500_DE_LG1_PTR_BASE 0x0021c
200 #define MALIDP500_DE_LG1_AD_CTRL 0x0040c
201 #define MALIDP500_DE_LG2_BASE 0x00300
202 #define MALIDP500_DE_LG2_PTR_BASE 0x0031c
203 #define MALIDP500_DE_LG2_AD_CTRL 0x00418
204 #define MALIDP500_SE_BASE 0x00c00
205 #define MALIDP500_SE_CONTROL 0x00c0c
206 #define MALIDP500_SE_MEMWRITE_OUT_SIZE 0x00c2c
207 #define MALIDP500_SE_RGB_YUV_COEFFS 0x00C74
208 #define MALIDP500_SE_MEMWRITE_BASE 0x00e00
209 #define MALIDP500_DC_IRQ_BASE 0x00f00
210 #define MALIDP500_CONFIG_VALID 0x00f00
211 #define MALIDP500_CONFIG_ID 0x00fd4
221 #define MALIDP500_RQOS_QUALITY 0x00500
224 #define MALIDP550_ADDR_SPACE_SIZE 0x10000
225 #define MALIDP550_DE_CONTROL 0x00010
226 #define MALIDP550_DE_LINE_COUNTER 0x00014
227 #define MALIDP550_DE_AXI_CONTROL 0x00018
228 #define MALIDP550_DE_QOS 0x0001c
229 #define MALIDP550_TIMINGS_BASE 0x00030
233 #define MALIDP550_DE_DISP_SIDEBAND 0x00040
234 #define MALIDP550_DE_BGND_COLOR 0x00044
235 #define MALIDP550_DE_OUTPUT_DEPTH 0x0004c
236 #define MALIDP550_COEFFS_BASE 0x00050
237 #define MALIDP550_LV_YUV2RGB 0x00084
238 #define MALIDP550_DE_LV1_BASE 0x00100
239 #define MALIDP550_DE_LV1_PTR_BASE 0x00124
240 #define MALIDP550_DE_LV1_AD_CTRL 0x001B8
241 #define MALIDP550_DE_LV2_BASE 0x00200
242 #define MALIDP550_DE_LV2_PTR_BASE 0x00224
243 #define MALIDP550_DE_LV2_AD_CTRL 0x002B8
244 #define MALIDP550_DE_LG_BASE 0x00300
245 #define MALIDP550_DE_LG_PTR_BASE 0x0031c
246 #define MALIDP550_DE_LG_AD_CTRL 0x00330
247 #define MALIDP550_DE_LS_BASE 0x00400
248 #define MALIDP550_DE_LS_PTR_BASE 0x0042c
249 #define MALIDP550_DE_PERF_BASE 0x00500
250 #define MALIDP550_SE_BASE 0x08000
251 #define MALIDP550_SE_CONTROL 0x08010
253 #define MALIDP550_SE_MEMWRITE_OUT_SIZE 0x08030
254 #define MALIDP550_SE_RGB_YUV_COEFFS 0x08078
255 #define MALIDP550_SE_MEMWRITE_BASE 0x08100
256 #define MALIDP550_DC_BASE 0x0c000
257 #define MALIDP550_DC_CONTROL 0x0c010
259 #define MALIDP550_CONFIG_VALID 0x0c014
260 #define MALIDP550_CONFIG_ID 0x0ffd4
263 #define MALIDP650_DE_LV_MMU_CTRL 0x000D0
264 #define MALIDP650_DE_LG_MMU_CTRL 0x00048
265 #define MALIDP650_DE_LS_MMU_CTRL 0x00078
268 #define MALIDP_MMU_CTRL_EN (1 << 0)
271 #define MALIDP_MMU_CTRL_PP_NUM_REQ(x) (((x) & 0x7f) << 12)
275 #define MALIDP_AD_CROP_H 0x4
276 #define MALIDP_AD_CROP_V 0x8
277 #define MALIDP_AD_END_PTR_LOW 0xc
278 #define MALIDP_AD_END_PTR_HIGH 0x10
281 #define MALIDP_AD_EN BIT(0)
292 * 0x00000 Display Engine
293 * 0x08000 Scaling Engine
294 * 0x0c000 Display Core
295 * 0x10000 Secure control