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Searched refs:mem_addr_t (Results 1 – 25 of 86) sorted by relevance

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/Zephyr-latest/include/zephyr/arch/riscv/
Dsys_io.h28 extern uint8_t z_soc_sys_read8(mem_addr_t addr);
29 extern void z_soc_sys_write8(uint8_t data, mem_addr_t addr);
30 extern uint16_t z_soc_sys_read16(mem_addr_t addr);
31 extern void z_soc_sys_write16(uint16_t data, mem_addr_t addr);
32 extern uint32_t z_soc_sys_read32(mem_addr_t addr);
33 extern void z_soc_sys_write32(uint32_t data, mem_addr_t addr);
34 extern uint64_t z_soc_sys_read64(mem_addr_t addr);
35 extern void z_soc_sys_write64(uint64_t data, mem_addr_t addr);
37 static ALWAYS_INLINE uint8_t sys_read8(mem_addr_t addr) in sys_read8()
42 static ALWAYS_INLINE void sys_write8(uint8_t data, mem_addr_t addr) in sys_write8()
[all …]
/Zephyr-latest/tests/kernel/common/src/
Dbitfield.c47 sys_set_bit((mem_addr_t)&b1, bit); in ZTEST()
52 zassert_true(sys_test_bit((mem_addr_t)&b1, bit), in ZTEST()
55 sys_clear_bit((mem_addr_t)&b1, bit); in ZTEST()
58 zassert_false(sys_test_bit((mem_addr_t)&b1, bit), in ZTEST()
62 zassert_false(sys_test_and_set_bit((mem_addr_t)&b1, bit), in ZTEST()
68 zassert_true(sys_test_and_set_bit((mem_addr_t)&b1, bit), in ZTEST()
74 zassert_true(sys_test_and_clear_bit((mem_addr_t)&b1, bit), in ZTEST()
79 zassert_false(sys_test_and_clear_bit((mem_addr_t)&b1, bit), in ZTEST()
87 sys_bitfield_set_bit((mem_addr_t)b2, bit); in ZTEST()
91 zassert_true(sys_bitfield_test_bit((mem_addr_t)b2, bit), in ZTEST()
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/Zephyr-latest/include/zephyr/arch/common/
Dsys_bitops.h24 static ALWAYS_INLINE void sys_set_bit(mem_addr_t addr, unsigned int bit) in sys_set_bit()
31 static ALWAYS_INLINE void sys_clear_bit(mem_addr_t addr, unsigned int bit) in sys_clear_bit()
38 static ALWAYS_INLINE int sys_test_bit(mem_addr_t addr, unsigned int bit) in sys_test_bit()
45 static ALWAYS_INLINE void sys_set_bits(mem_addr_t addr, unsigned int mask) in sys_set_bits()
52 static ALWAYS_INLINE void sys_clear_bits(mem_addr_t addr, unsigned int mask) in sys_clear_bits()
60 void sys_bitfield_set_bit(mem_addr_t addr, unsigned int bit) in sys_bitfield_set_bit()
69 void sys_bitfield_clear_bit(mem_addr_t addr, unsigned int bit) in sys_bitfield_clear_bit()
75 int sys_bitfield_test_bit(mem_addr_t addr, unsigned int bit) in sys_bitfield_test_bit()
81 int sys_test_and_set_bit(mem_addr_t addr, unsigned int bit) in sys_test_and_set_bit()
92 int sys_test_and_clear_bit(mem_addr_t addr, unsigned int bit) in sys_test_and_clear_bit()
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Dsys_io.h23 static ALWAYS_INLINE uint8_t sys_read8(mem_addr_t addr) in sys_read8()
28 static ALWAYS_INLINE void sys_write8(uint8_t data, mem_addr_t addr) in sys_write8()
33 static ALWAYS_INLINE uint16_t sys_read16(mem_addr_t addr) in sys_read16()
38 static ALWAYS_INLINE void sys_write16(uint16_t data, mem_addr_t addr) in sys_write16()
43 static ALWAYS_INLINE uint32_t sys_read32(mem_addr_t addr) in sys_read32()
48 static ALWAYS_INLINE void sys_write32(uint32_t data, mem_addr_t addr) in sys_write32()
53 static ALWAYS_INLINE uint64_t sys_read64(mem_addr_t addr) in sys_read64()
58 static ALWAYS_INLINE void sys_write64(uint64_t data, mem_addr_t addr) in sys_write64()
/Zephyr-latest/include/zephyr/arch/arm64/
Dsys_io.h37 static ALWAYS_INLINE uint8_t sys_read8(mem_addr_t addr) in sys_read8()
47 static ALWAYS_INLINE void sys_write8(uint8_t data, mem_addr_t addr) in sys_write8()
53 static ALWAYS_INLINE uint16_t sys_read16(mem_addr_t addr) in sys_read16()
63 static ALWAYS_INLINE void sys_write16(uint16_t data, mem_addr_t addr) in sys_write16()
69 static ALWAYS_INLINE uint32_t sys_read32(mem_addr_t addr) in sys_read32()
79 static ALWAYS_INLINE void sys_write32(uint32_t data, mem_addr_t addr) in sys_write32()
85 static ALWAYS_INLINE uint64_t sys_read64(mem_addr_t addr) in sys_read64()
95 static ALWAYS_INLINE void sys_write64(uint64_t data, mem_addr_t addr) in sys_write64()
/Zephyr-latest/include/zephyr/arch/arm/cortex_a_r/
Dsys_io.h27 static ALWAYS_INLINE uint8_t sys_read8(mem_addr_t addr) in sys_read8()
37 static ALWAYS_INLINE void sys_write8(uint8_t data, mem_addr_t addr) in sys_write8()
43 static ALWAYS_INLINE uint16_t sys_read16(mem_addr_t addr) in sys_read16()
53 static ALWAYS_INLINE void sys_write16(uint16_t data, mem_addr_t addr) in sys_write16()
59 static ALWAYS_INLINE uint32_t sys_read32(mem_addr_t addr) in sys_read32()
69 static ALWAYS_INLINE void sys_write32(uint32_t data, mem_addr_t addr) in sys_write32()
75 static ALWAYS_INLINE uint64_t sys_read64(mem_addr_t addr) in sys_read64()
/Zephyr-latest/include/zephyr/arch/arc/
Dsys-io-common.h23 static ALWAYS_INLINE uint8_t sys_read8(mem_addr_t addr) in sys_read8()
34 static ALWAYS_INLINE void sys_write8(uint8_t data, mem_addr_t addr) in sys_write8()
41 static ALWAYS_INLINE uint16_t sys_read16(mem_addr_t addr) in sys_read16()
52 static ALWAYS_INLINE void sys_write16(uint16_t data, mem_addr_t addr) in sys_write16()
59 static ALWAYS_INLINE uint32_t sys_read32(mem_addr_t addr) in sys_read32()
70 static ALWAYS_INLINE void sys_write32(uint32_t data, mem_addr_t addr) in sys_write32()
/Zephyr-latest/drivers/pinctrl/
Dpinctrl_imx.c39 (mem_addr_t)mux_register); in pinctrl_configure_pins()
42 (mem_addr_t)input_register); in pinctrl_configure_pins()
46 (mem_addr_t)config_register); in pinctrl_configure_pins()
51 pin_ctrl_flags, (mem_addr_t)mux_register); in pinctrl_configure_pins()
54 (mem_addr_t)mux_register); in pinctrl_configure_pins()
57 sys_write32(pin_ctrl_flags, (mem_addr_t)config_register); in pinctrl_configure_pins()
62 sys_write32(IOMUXC_PSMI_SSS(input_daisy), (mem_addr_t)input_register); in pinctrl_configure_pins()
68 (mem_addr_t)mux_register); in pinctrl_configure_pins()
71 (mem_addr_t)input_register); in pinctrl_configure_pins()
Dpinctrl_silabs_dbus.c21 mem_addr_t enable_reg, route_reg; in pinctrl_configure_pins()
26 (pins[i].base_offset * sizeof(mem_addr_t)); in pinctrl_configure_pins()
37 (pins[i].base_offset * sizeof(mem_addr_t)); in pinctrl_configure_pins()
38 route_reg = enable_reg + (pins[i].route_offset * sizeof(mem_addr_t)); in pinctrl_configure_pins()
/Zephyr-latest/drivers/usb/udc/
Dudc_dwc2.c66 #define UDC_DWC2_EP_FIFO(base, idx) ((mem_addr_t)base + 0x1000 * (idx + 1))
182 mem_addr_t addr, uint32_t bit) in dwc2_wait_for_bit()
223 static mem_addr_t dwc2_get_dxepctl_reg(const struct device *dev, const uint8_t ep) in dwc2_get_dxepctl_reg()
229 return (mem_addr_t)&base->out_ep[ep_idx].doepctl; in dwc2_get_dxepctl_reg()
231 return (mem_addr_t)&base->in_ep[ep_idx].diepctl; in dwc2_get_dxepctl_reg()
239 mem_addr_t reg = (mem_addr_t)&base->in_ep[idx].dtxfsts; in dwc2_ftx_avail()
294 mem_addr_t grstctl_reg = (mem_addr_t)&base->grstctl; in dwc2_flush_rx_fifo()
304 mem_addr_t grstctl_reg = (mem_addr_t)&base->grstctl; in dwc2_flush_tx_fifo()
320 dieptxf = sys_read32((mem_addr_t)&base->dieptxf[f_idx]); in dwc2_get_txfdep()
331 dieptxf = sys_read32((mem_addr_t)&base->dieptxf[f_idx]); in dwc2_get_txfaddr()
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Dudc_dwc2_vendor_quirks.h66 mem_addr_t ggpio_reg = (mem_addr_t)&config->base->ggpio; in stm32f4_fsotg_enable_phy()
76 mem_addr_t ggpio_reg = (mem_addr_t)&config->base->ggpio; in stm32f4_fsotg_disable_phy()
271 sys_set_bits((mem_addr_t)&base->pcgcctl, USB_DWC2_PCGCCTL_GATEHCLK); in usbhs_post_hibernation_entry()
273 sys_write32(0x87, (mem_addr_t)wrapper + 0xC80); in usbhs_post_hibernation_entry()
274 sys_write32(0x87, (mem_addr_t)wrapper + 0xC84); in usbhs_post_hibernation_entry()
275 sys_write32(1, (mem_addr_t)wrapper + 0x004); in usbhs_post_hibernation_entry()
286 sys_clear_bits((mem_addr_t)&base->pcgcctl, USB_DWC2_PCGCCTL_GATEHCLK); in usbhs_pre_hibernation_exit()
289 sys_write32(0, (mem_addr_t)wrapper + 0xC80); in usbhs_pre_hibernation_exit()
290 sys_write32(0, (mem_addr_t)wrapper + 0xC84); in usbhs_pre_hibernation_exit()
/Zephyr-latest/drivers/input/
Dinput_tsc_keys.c88 sys_set_bits((mem_addr_t)&config->tsc->ICR, TSC_ICR_EOAIC | TSC_ICR_MCEIC); in stm32_tsc_start()
91 sys_set_bits((mem_addr_t)&config->tsc->IER, TSC_IER_EOAIE | TSC_IER_MCEIE); in stm32_tsc_start()
98 sys_set_bit((mem_addr_t)&config->tsc->CR, TSC_CR_START_Pos); in stm32_tsc_start()
120 if (sys_test_bit((mem_addr_t)&config->tsc->ISR, TSC_ISR_MCEF_Pos)) { in stm32_tsc_handle_incoming_data()
122 sys_set_bit((mem_addr_t)&config->tsc->ICR, TSC_ICR_MCEIC_Pos); in stm32_tsc_handle_incoming_data()
128 if (sys_test_bit((mem_addr_t)&config->tsc->ISR, TSC_ISR_EOAF_Pos)) { in stm32_tsc_handle_incoming_data()
130 sys_set_bit((mem_addr_t)&config->tsc->ICR, TSC_ICR_EOAIC_Pos); in stm32_tsc_handle_incoming_data()
139 (mem_addr_t)&config->tsc->IOGXCR[group->group - 1]); in stm32_tsc_handle_incoming_data()
167 sys_clear_bits((mem_addr_t)&config->tsc->IER, TSC_IER_EOAIE | TSC_IER_MCEIE); in stm32_tsc_isr()
204 sys_set_bits((mem_addr_t)&config->tsc->CR, (((config->ctph - 1) << 4) | (config->ctpl - 1)) in stm32_tsc_init()
[all …]
/Zephyr-latest/drivers/power_domain/
Dpower_domain_intel_adsp.c31 sys_write16(sys_read16((mem_addr_t)ACE_PWRCTL) | SPA_bit_mask, in pd_intel_adsp_set_power_enable()
32 (mem_addr_t)ACE_PWRCTL); in pd_intel_adsp_set_power_enable()
34 if (!WAIT_FOR(sys_read16((mem_addr_t)ACE_PWRSTS) & BIT(bits->CPA_bit), in pd_intel_adsp_set_power_enable()
51 sys_write16(sys_read16((mem_addr_t)ACE_PWRCTL) & ~(SPA_bit_mask), in pd_intel_adsp_set_power_enable()
52 (mem_addr_t)ACE_PWRCTL); in pd_intel_adsp_set_power_enable()
/Zephyr-latest/drivers/gpio/
Dgpio_iproc.c33 mem_addr_t base;
49 mem_addr_t base = cfg->base; in gpio_iproc_configure()
66 mem_addr_t base = cfg->base; in gpio_iproc_port_get_raw()
76 mem_addr_t base = cfg->base; in gpio_iproc_port_set_masked_raw()
88 mem_addr_t base = cfg->base; in gpio_iproc_port_set_bits_raw()
99 mem_addr_t base = cfg->base; in gpio_iproc_port_clear_bits_raw()
113 mem_addr_t base = cfg->base; in gpio_iproc_port_toggle_bits()
127 mem_addr_t base = cfg->base; in gpio_iproc_pin_interrupt_configure()
161 mem_addr_t base = cfg->base; in gpio_iproc_isr()
Dgpio_smartbond.c311 static void gpio_latch_inst(mem_addr_t data_reg, mem_addr_t mode_reg, mem_addr_t latch_reg, in gpio_latch_inst()
324 static void gpio_unlatch_inst(mem_addr_t data_reg, mem_addr_t mode_reg, mem_addr_t latch_reg, in gpio_unlatch_inst()
341 gpio_latch_inst((mem_addr_t)&config->data_regs->data, in gpio_latch()
342 (mem_addr_t)config->mode_regs, in gpio_latch()
343 (mem_addr_t)&config->latch_regs->reset, in gpio_latch()
352 gpio_unlatch_inst((mem_addr_t)&config->data_regs->data, in gpio_unlatch()
353 (mem_addr_t)config->mode_regs, in gpio_unlatch()
354 (mem_addr_t)&config->latch_regs->set, in gpio_unlatch()
Dgpio_rp1.c58 mem_addr_t gpio_offset;
59 mem_addr_t rio_offset;
60 mem_addr_t pads_offset;
69 mem_addr_t gpio_base;
70 mem_addr_t rio_base;
71 mem_addr_t pads_base;
/Zephyr-latest/drivers/interrupt_controller/
Dintc_gicv3.c39 mem_addr_t base;
40 mem_addr_t size;
52 mem_addr_t gic_rdists[CONFIG_MP_MAX_NUM_CPUS];
76 static inline mem_addr_t gic_get_rdist(void) in gic_get_rdist()
88 mem_addr_t base; in gic_wait_rwp()
144 mem_addr_t addr = IROUTER(GET_DIST_BASE(intid), intid); in arm_gic_write_irouter()
168 mem_addr_t base = GET_DIST_BASE(intid); in arm_gic_irq_set_priority()
335 static void gicv3_rdist_enable(mem_addr_t rdist) in gicv3_rdist_enable()
362 static void gicv3_rdist_setup_lpis(mem_addr_t rdist) in gicv3_rdist_setup_lpis()
417 mem_addr_t base = gic_get_rdist() + GICR_SGI_BASE_OFF; in gicv3_cpuif_init()
[all …]
Dintc_ioapic.c220 sys_bitfield_set_bit((mem_addr_t) ioapic_suspend_buf, in store_flags()
225 sys_bitfield_set_bit((mem_addr_t) ioapic_suspend_buf, in store_flags()
230 sys_bitfield_set_bit((mem_addr_t) ioapic_suspend_buf, in store_flags()
239 sys_bitfield_set_bit((mem_addr_t) ioapic_suspend_buf, in store_flags()
249 if (sys_bitfield_test_bit((mem_addr_t) ioapic_suspend_buf, in restore_flags()
254 if (sys_bitfield_test_bit((mem_addr_t) ioapic_suspend_buf, in restore_flags()
259 if (sys_bitfield_test_bit((mem_addr_t) ioapic_suspend_buf, in restore_flags()
264 if (sys_bitfield_test_bit((mem_addr_t) ioapic_suspend_buf, in restore_flags()
Dintc_plic.c80 mem_addr_t prio;
81 mem_addr_t irq_en;
82 mem_addr_t reg;
84 mem_addr_t pend;
87 mem_addr_t trig;
159 static inline mem_addr_t get_context_en_addr(const struct device *dev, uint32_t cpu_num) in get_context_en_addr()
174 static inline mem_addr_t get_claim_complete_addr(const struct device *dev) in get_claim_complete_addr()
185 static inline mem_addr_t get_threshold_priority_addr(const struct device *dev, uint32_t cpu_num) in get_threshold_priority_addr()
207 static inline mem_addr_t get_pending_reg(const struct device *dev, uint32_t local_irq) in get_pending_reg()
247 mem_addr_t trig_addr = config->trig + local_irq_to_reg_offset(local_irq); in riscv_plic_irq_trig_val()
[all …]
/Zephyr-latest/drivers/dma/
Ddma_pl330.h153 mem_addr_t dma_exec_addr;
162 mem_addr_t mcode_base;
163 mem_addr_t reg_base;
165 mem_addr_t control_reg_base;
/Zephyr-latest/drivers/mdio/
Dmdio_dwcxgmac.c56 static inline int dwxgmac_software_reset(mem_addr_t ioaddr) in dwxgmac_software_reset()
61 mem_addr_t reg_addr = (mem_addr_t)(ioaddr + XGMAC_DMA_BASE_ADDR_OFFSET + DMA_MODE_OFST); in dwxgmac_software_reset()
93 mem_addr_t ioaddr = 0; in mdio_transfer()
97 ioaddr = (mem_addr_t)DEVICE_MMIO_GET(dev); in mdio_transfer()
170 mem_addr_t ioaddr; in mdio_dwcxgmac_initialize()
193 ioaddr = (mem_addr_t)DEVICE_MMIO_GET(dev); in mdio_dwcxgmac_initialize()
/Zephyr-latest/drivers/ethernet/dwc_xgmac/
Deth_dwc_xgmac.c72 mem_addr_t *tx_pkts;
80 mem_addr_t *rx_buffs;
146 static inline mem_addr_t get_reg_base_addr(const struct device *dev) in get_reg_base_addr()
148 return (mem_addr_t)DEVICE_MMIO_GET(dev); in get_reg_base_addr()
153 mem_addr_t ioaddr = get_reg_base_addr(dev); in dwxgmac_dma_init()
154 mem_addr_t reg_addr = in dwxgmac_dma_init()
155 (mem_addr_t)(ioaddr + XGMAC_DMA_BASE_ADDR_OFFSET + DMA_SYSBUS_MODE_OFST); in dwxgmac_dma_init()
203 mem_addr_t ioaddr = get_reg_base_addr(dev); in dwxgmac_dma_chnl_init()
204 mem_addr_t reg_addr; in dwxgmac_dma_chnl_init()
341 mem_addr_t ioaddr = get_reg_base_addr(dev); in dwxgmac_dma_mtl_init()
[all …]
/Zephyr-latest/include/zephyr/arch/x86/
Darch.h155 static ALWAYS_INLINE void sys_set_bit(mem_addr_t addr, unsigned int bit) in sys_set_bit()
163 static ALWAYS_INLINE void sys_clear_bit(mem_addr_t addr, unsigned int bit) in sys_clear_bit()
170 static ALWAYS_INLINE int sys_test_bit(mem_addr_t addr, unsigned int bit) in sys_test_bit()
182 static ALWAYS_INLINE int sys_test_and_set_bit(mem_addr_t addr, in sys_test_and_set_bit()
195 static ALWAYS_INLINE int sys_test_and_clear_bit(mem_addr_t addr, in sys_test_and_clear_bit()
/Zephyr-latest/drivers/i2c/
Di2c_bcm_iproc.c156 mem_addr_t base;
177 mem_addr_t base = DEV_BASE(dev); in iproc_i2c_enable_disable()
191 mem_addr_t base = DEV_BASE(dev); in iproc_i2c_reset_controller()
210 mem_addr_t base = DEV_BASE(dev); in iproc_i2c_target_set_address()
230 mem_addr_t base = DEV_BASE(dev); in iproc_i2c_target_init()
274 mem_addr_t base = DEV_BASE(dev); in iproc_i2c_check_target_status()
306 mem_addr_t base = DEV_BASE(dev); in iproc_i2c_target_read()
343 mem_addr_t base = DEV_BASE(dev); in iproc_i2c_target_rx()
373 mem_addr_t base = DEV_BASE(dev); in iproc_i2c_target_isr()
461 mem_addr_t base = DEV_BASE(dev); in iproc_i2c_target_register()
[all …]
/Zephyr-latest/subsys/shell/modules/
Ddevmem_service.c43 static int memory_dump(const struct shell *sh, mem_addr_t phys_addr, size_t size, uint8_t width) in memory_dump()
103 mem_addr_t addr = -1; in cmd_dump()
112 addr = (mem_addr_t)shell_strtoul(optarg, 16, &err); in cmd_dump()
258 static int memory_read(const struct shell *sh, mem_addr_t addr, uint8_t width) in memory_read()
286 static int memory_write(const struct shell *sh, mem_addr_t addr, uint8_t width, uint64_t value) in memory_write()
312 mem_addr_t phys_addr, addr; in cmd_devmem()

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