Searched refs:masking (Results 1 – 8 of 8) sorted by relevance
38 critical sections using interrupt masking. These APIs continue to39 work via an emulation layer (see below), but the masking technique92 instruction) interrupt masking operation. That, and the fact that the234 scheduling the highest N priority ready threads to execute. When CPU masking240 When CPU masking is not in play, the optimal set of threads is the same241 as the valid set of threads. However when CPU masking is in play, there
449 * masking layer makes it easier for LNL to handle
612 * masking layer makes it easier for MTL to handle
625 * masking layer makes it easier for MTL to handle
544 * masking layer makes it easier for MTL to handle
76 This method is called masking.
276 will set the PRIMASK register to 1, eventually, masking all IRQs with configurable
2174 observation. The observation enables us to increase the granularity of masking observation.
