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Searched refs:SRAM_BASE (Results 1 – 14 of 14) sorted by relevance

/hal_ti-3.4.0/simplelink/source/ti/devices/msp432p4xx/driverlib/
Dsysctl_a.c183 bankBit = (addr - SRAM_BASE) / bankSize; in SysCtl_A_enableSRAM()
213 bankBit = (addr - SRAM_BASE) / bankSize; in SysCtl_A_disableSRAM()
247 blockBitStart = (startAddr - SRAM_BASE) / blockSize; in SysCtl_A_enableSRAMRetention()
248 blockBitEnd = (endAddr - SRAM_BASE) / blockSize; in SysCtl_A_enableSRAMRetention()
338 blockBitStart = (startAddr - SRAM_BASE) / blockSize; in SysCtl_A_disableSRAMRetention()
339 blockBitEnd = (endAddr - SRAM_BASE) / blockSize; in SysCtl_A_disableSRAMRetention()
/hal_ti-3.4.0/simplelink/source/ti/devices/cc32xx/inc/
Dhw_memmap.h44 #define SRAM_BASE 0x20000000 macro
/hal_ti-3.4.0/simplelink/source/ti/devices/cc13x2x7_cc26x2x7/inc/
Dhw_memmap.h49 #define SRAM_BASE 0x20000000 // SRAM macro
/hal_ti-3.4.0/simplelink/source/ti/devices/cc13x2_cc26x2/inc/
Dhw_memmap.h49 #define SRAM_BASE 0x20000000 // SRAM macro
/hal_ti-3.4.0/simplelink/source/ti/devices/cc13x2_cc26x2/driverlib/
Dudma.c241 ASSERT((uint32_t)pvSrcAddr >= SRAM_BASE); in uDMAChannelTransferSet()
242 ASSERT((uint32_t)pvDstAddr >= SRAM_BASE); in uDMAChannelTransferSet()
Dudma.h558 ASSERT((uint32_t)pControlTable >= SRAM_BASE); in uDMAControlBaseSet()
/hal_ti-3.4.0/simplelink/source/ti/devices/cc13x2x7_cc26x2x7/driverlib/
Dudma.c239 ASSERT((uint32_t)pvSrcAddr >= SRAM_BASE); in uDMAChannelTransferSet()
240 ASSERT((uint32_t)pvDstAddr >= SRAM_BASE); in uDMAChannelTransferSet()
Dudma.h556 ASSERT((uint32_t)pControlTable >= SRAM_BASE); in uDMAControlBaseSet()
/hal_ti-3.4.0/simplelink/source/ti/devices/msp432p4xx/inc/
Dmsp432p401m.h269 #define SRAM_BASE ((uint32_t)0x20000000) /*!< SRAM memory s… macro
327 …((__IO uint32_t *) (BITBAND_SRAM_BASE + (((uint32_t)(uint32_t *)&(x)) - SRAM_BASE )*32 + (b)*4)))
Dmsp432p401r.h269 #define SRAM_BASE ((uint32_t)0x20000000) /*!< SRAM memory s… macro
327 …((__IO uint32_t *) (BITBAND_SRAM_BASE + (((uint32_t)(uint32_t *)&(x)) - SRAM_BASE )*32 + (b)*4)))
Dmsp432p4111.h260 #define SRAM_BASE ((uint32_t)0x20000000) /*!< SRAM memory s… macro
319 …((__IO uint32_t *) (BITBAND_SRAM_BASE + (((uint32_t)(uint32_t *)&(x)) - SRAM_BASE )*32 + (b)*4)))
Dmsp432p411v.h260 #define SRAM_BASE ((uint32_t)0x20000000) /*!< SRAM memory s… macro
319 …((__IO uint32_t *) (BITBAND_SRAM_BASE + (((uint32_t)(uint32_t *)&(x)) - SRAM_BASE )*32 + (b)*4)))
Dmsp432p411y.h260 #define SRAM_BASE ((uint32_t)0x20000000) /*!< SRAM memory s… macro
319 …((__IO uint32_t *) (BITBAND_SRAM_BASE + (((uint32_t)(uint32_t *)&(x)) - SRAM_BASE )*32 + (b)*4)))
Dmsp432p4xx.h262 #define SRAM_BASE ((uint32_t)0x20000000) /*!< SRAM memory s… macro
324 …((__IO uint32_t *) (BITBAND_SRAM_BASE + (((uint32_t)(uint32_t *)&(x)) - SRAM_BASE )*32 + (b)*4)))