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Searched refs:DMAMUX_CSR_SOF2_Pos (Results 1 – 25 of 100) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32c0xx/soc/
Dstm32c011xx.h1661 #define DMAMUX_CSR_SOF2_Pos (2U) macro
1662 #define DMAMUX_CSR_SOF2_Msk (0x1UL << DMAMUX_CSR_SOF2_Pos) /*!< 0x00000004 */
Dstm32c031xx.h1665 #define DMAMUX_CSR_SOF2_Pos (2U) macro
1666 #define DMAMUX_CSR_SOF2_Msk (0x1UL << DMAMUX_CSR_SOF2_Pos) /*!< 0x00000004 */
Dstm32c071xx.h1892 #define DMAMUX_CSR_SOF2_Pos (2U) macro
1893 #define DMAMUX_CSR_SOF2_Msk (0x1UL << DMAMUX_CSR_SOF2_Pos) /*!< 0x00000004 */
/hal_stm32-latest/stm32cube/stm32g0xx/soc/
Dstm32g030xx.h1736 #define DMAMUX_CSR_SOF2_Pos (2U) macro
1737 #define DMAMUX_CSR_SOF2_Msk (0x1UL << DMAMUX_CSR_SOF2_Pos) /*!< 0x00000004 */
Dstm32g050xx.h1755 #define DMAMUX_CSR_SOF2_Pos (2U) macro
1756 #define DMAMUX_CSR_SOF2_Msk (0x1UL << DMAMUX_CSR_SOF2_Pos) /*!< 0x00000004 */
Dstm32g070xx.h1758 #define DMAMUX_CSR_SOF2_Pos (2U) macro
1759 #define DMAMUX_CSR_SOF2_Msk (0x1UL << DMAMUX_CSR_SOF2_Pos) /*!< 0x00000004 */
Dstm32g031xx.h1779 #define DMAMUX_CSR_SOF2_Pos (2U) macro
1780 #define DMAMUX_CSR_SOF2_Msk (0x1UL << DMAMUX_CSR_SOF2_Pos) /*!< 0x00000004 */
Dstm32g041xx.h2015 #define DMAMUX_CSR_SOF2_Pos (2U) macro
2016 #define DMAMUX_CSR_SOF2_Msk (0x1UL << DMAMUX_CSR_SOF2_Pos) /*!< 0x00000004 */
Dstm32g051xx.h2073 #define DMAMUX_CSR_SOF2_Pos (2U) macro
2074 #define DMAMUX_CSR_SOF2_Msk (0x1UL << DMAMUX_CSR_SOF2_Pos) /*!< 0x00000004 */
Dstm32g061xx.h2309 #define DMAMUX_CSR_SOF2_Pos (2U) macro
2310 #define DMAMUX_CSR_SOF2_Msk (0x1UL << DMAMUX_CSR_SOF2_Pos) /*!< 0x00000004 */
Dstm32g071xx.h2259 #define DMAMUX_CSR_SOF2_Pos (2U) macro
2260 #define DMAMUX_CSR_SOF2_Msk (0x1UL << DMAMUX_CSR_SOF2_Pos) /*!< 0x00000004 */
Dstm32g081xx.h2495 #define DMAMUX_CSR_SOF2_Pos (2U) macro
2496 #define DMAMUX_CSR_SOF2_Msk (0x1UL << DMAMUX_CSR_SOF2_Pos) /*!< 0x00000004 */
Dstm32g0b0xx.h1840 #define DMAMUX_CSR_SOF2_Pos (2U) macro
1841 #define DMAMUX_CSR_SOF2_Msk (0x1UL << DMAMUX_CSR_SOF2_Pos) /*!< 0x00000004 */
/hal_stm32-latest/stm32cube/stm32wlxx/soc/
Dstm32wle4xx.h3053 #define DMAMUX_CSR_SOF2_Pos (2U) macro
3054 #define DMAMUX_CSR_SOF2_Msk (0x1UL << DMAMUX_CSR_SOF2_Pos) /*!< 0x00000004 */
Dstm32wle5xx.h3053 #define DMAMUX_CSR_SOF2_Pos (2U) macro
3054 #define DMAMUX_CSR_SOF2_Msk (0x1UL << DMAMUX_CSR_SOF2_Pos) /*!< 0x00000004 */
Dstm32wl5mxx.h3247 #define DMAMUX_CSR_SOF2_Pos (2U) macro
3248 #define DMAMUX_CSR_SOF2_Msk (0x1UL << DMAMUX_CSR_SOF2_Pos) /*!< 0x00000004 */
Dstm32wl54xx.h3247 #define DMAMUX_CSR_SOF2_Pos (2U) macro
3248 #define DMAMUX_CSR_SOF2_Msk (0x1UL << DMAMUX_CSR_SOF2_Pos) /*!< 0x00000004 */
Dstm32wl55xx.h3247 #define DMAMUX_CSR_SOF2_Pos (2U) macro
3248 #define DMAMUX_CSR_SOF2_Msk (0x1UL << DMAMUX_CSR_SOF2_Pos) /*!< 0x00000004 */
/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u031xx.h2130 #define DMAMUX_CSR_SOF2_Pos (2U) macro
2131 #define DMAMUX_CSR_SOF2_Msk (0x1UL << DMAMUX_CSR_SOF2_Pos) /*!< 0x00000004…
Dstm32u083xx.h2603 #define DMAMUX_CSR_SOF2_Pos (2U) macro
2604 #define DMAMUX_CSR_SOF2_Msk (0x1UL << DMAMUX_CSR_SOF2_Pos) /*!< 0x00000004…
/hal_stm32-latest/stm32cube/stm32wbxx/soc/
Dstm32wb50xx.h2543 #define DMAMUX_CSR_SOF2_Pos (2U) macro
2544 #define DMAMUX_CSR_SOF2_Msk (0x1UL << DMAMUX_CSR_SOF2_Pos) /*!< 0x00000004 */
Dstm32wb1mxx.h2148 #define DMAMUX_CSR_SOF2_Pos (2U) macro
2149 #define DMAMUX_CSR_SOF2_Msk (0x1UL << DMAMUX_CSR_SOF2_Pos) /*!< 0x00000004 */
Dstm32wb30xx.h2542 #define DMAMUX_CSR_SOF2_Pos (2U) macro
2543 #define DMAMUX_CSR_SOF2_Msk (0x1UL << DMAMUX_CSR_SOF2_Pos) /*!< 0x00000004 */
/hal_stm32-latest/stm32cube/stm32wbxx/soc/Include/
Dstm32wb10xx.h2076 #define DMAMUX_CSR_SOF2_Pos (2U) macro
2077 #define DMAMUX_CSR_SOF2_Msk (0x1UL << DMAMUX_CSR_SOF2_Pos) /*!< 0x00000004 */
Dstm32wb15xx.h2148 #define DMAMUX_CSR_SOF2_Pos (2U) macro
2149 #define DMAMUX_CSR_SOF2_Msk (0x1UL << DMAMUX_CSR_SOF2_Pos) /*!< 0x00000004 */

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