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Searched refs:I2C_CR1_ENARP (Results 1 – 25 of 71) sorted by relevance

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/hal_stm32-3.5.0/stm32cube/stm32f1xx/drivers/include/
Dstm32f1xx_ll_i2c.h186 …_SMBUS_HOST (uint32_t)(I2C_CR1_SMBUS | I2C_CR1_SMBTYPE | I2C_CR1_ENARP) /*!< SMBus Ho…
188 #define LL_I2C_MODE_SMBUS_DEVICE_ARP (uint32_t)(I2C_CR1_SMBUS | I2C_CR1_ENARP) …
780 MODIFY_REG(I2Cx->CR1, I2C_CR1_SMBUS | I2C_CR1_SMBTYPE | I2C_CR1_ENARP, PeripheralMode); in LL_I2C_SetMode()
799 return (uint32_t)(READ_BIT(I2Cx->CR1, I2C_CR1_SMBUS | I2C_CR1_SMBTYPE | I2C_CR1_ENARP)); in LL_I2C_GetMode()
/hal_stm32-3.5.0/stm32cube/stm32f2xx/drivers/include/
Dstm32f2xx_ll_i2c.h185 …_SMBUS_HOST (uint32_t)(I2C_CR1_SMBUS | I2C_CR1_SMBTYPE | I2C_CR1_ENARP) /*!< SMBus Ho…
187 #define LL_I2C_MODE_SMBUS_DEVICE_ARP (uint32_t)(I2C_CR1_SMBUS | I2C_CR1_ENARP) …
779 MODIFY_REG(I2Cx->CR1, I2C_CR1_SMBUS | I2C_CR1_SMBTYPE | I2C_CR1_ENARP, PeripheralMode); in LL_I2C_SetMode()
798 return (uint32_t)(READ_BIT(I2Cx->CR1, I2C_CR1_SMBUS | I2C_CR1_SMBTYPE | I2C_CR1_ENARP)); in LL_I2C_GetMode()
/hal_stm32-3.5.0/stm32cube/stm32l1xx/drivers/include/
Dstm32l1xx_ll_i2c.h185 …_SMBUS_HOST (uint32_t)(I2C_CR1_SMBUS | I2C_CR1_SMBTYPE | I2C_CR1_ENARP) /*!< SMBus Ho…
187 #define LL_I2C_MODE_SMBUS_DEVICE_ARP (uint32_t)(I2C_CR1_SMBUS | I2C_CR1_ENARP) …
779 MODIFY_REG(I2Cx->CR1, I2C_CR1_SMBUS | I2C_CR1_SMBTYPE | I2C_CR1_ENARP, PeripheralMode); in LL_I2C_SetMode()
798 return (uint32_t)(READ_BIT(I2Cx->CR1, I2C_CR1_SMBUS | I2C_CR1_SMBTYPE | I2C_CR1_ENARP)); in LL_I2C_GetMode()
Dstm32l1xx_hal_smbus.h312 …SMBUS_PERIPHERAL_MODE_SMBUS_HOST (uint32_t)(I2C_CR1_SMBUS | I2C_CR1_SMBTYPE | I2C_CR1_ENARP)
314 #define SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE_ARP (uint32_t)(I2C_CR1_SMBUS | I2C_CR1_ENARP)
/hal_stm32-3.5.0/stm32cube/stm32f4xx/drivers/include/
Dstm32f4xx_ll_i2c.h208 …_SMBUS_HOST (uint32_t)(I2C_CR1_SMBUS | I2C_CR1_SMBTYPE | I2C_CR1_ENARP) /*!< SMBus Ho…
210 #define LL_I2C_MODE_SMBUS_DEVICE_ARP (uint32_t)(I2C_CR1_SMBUS | I2C_CR1_ENARP) …
887 MODIFY_REG(I2Cx->CR1, I2C_CR1_SMBUS | I2C_CR1_SMBTYPE | I2C_CR1_ENARP, PeripheralMode); in LL_I2C_SetMode()
906 return (uint32_t)(READ_BIT(I2Cx->CR1, I2C_CR1_SMBUS | I2C_CR1_SMBTYPE | I2C_CR1_ENARP)); in LL_I2C_GetMode()
Dstm32f4xx_hal_smbus.h312 …SMBUS_PERIPHERAL_MODE_SMBUS_HOST (uint32_t)(I2C_CR1_SMBUS | I2C_CR1_SMBTYPE | I2C_CR1_ENARP)
314 #define SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE_ARP (uint32_t)(I2C_CR1_SMBUS | I2C_CR1_ENARP)
/hal_stm32-3.5.0/stm32cube/stm32l1xx/drivers/src/
Dstm32l1xx_hal_smbus.c362 …s->Instance->CR1, (I2C_CR1_NOSTRETCH | I2C_CR1_ENGC | I2C_CR1_ENPEC | I2C_CR1_ENARP | I2C_CR1_SMBT… in HAL_SMBUS_Init()
/hal_stm32-3.5.0/stm32cube/stm32f4xx/drivers/src/
Dstm32f4xx_hal_smbus.c361 …s->Instance->CR1, (I2C_CR1_NOSTRETCH | I2C_CR1_ENGC | I2C_CR1_ENPEC | I2C_CR1_ENARP | I2C_CR1_SMBT… in HAL_SMBUS_Init()
/hal_stm32-3.5.0/stm32cube/stm32f1xx/soc/
Dstm32f101x6.h4445 #define I2C_CR1_ENARP I2C_CR1_ENARP_Msk /*!< ARP Enable */ macro
Dstm32f101xb.h4507 #define I2C_CR1_ENARP I2C_CR1_ENARP_Msk /*!< ARP Enable */ macro
Dstm32f100xb.h4909 #define I2C_CR1_ENARP I2C_CR1_ENARP_Msk /*!< ARP Enable */ macro
Dstm32f102x6.h5564 #define I2C_CR1_ENARP I2C_CR1_ENARP_Msk /*!< ARP Enable */ macro
Dstm32f100xe.h5423 #define I2C_CR1_ENARP I2C_CR1_ENARP_Msk /*!< ARP Enable */ macro
Dstm32f101xe.h5482 #define I2C_CR1_ENARP I2C_CR1_ENARP_Msk /*!< ARP Enable */ macro
Dstm32f101xg.h5556 #define I2C_CR1_ENARP I2C_CR1_ENARP_Msk /*!< ARP Enable */ macro
Dstm32f102xb.h5618 #define I2C_CR1_ENARP I2C_CR1_ENARP_Msk /*!< ARP Enable */ macro
/hal_stm32-3.5.0/stm32cube/stm32l1xx/soc/
Dstm32l151xb.h3388 #define I2C_CR1_ENARP I2C_CR1_ENARP_Msk /*!< ARP Enable */ macro
Dstm32l151xba.h3397 #define I2C_CR1_ENARP I2C_CR1_ENARP_Msk /*!< ARP Enable */ macro
Dstm32l152xb.h3405 #define I2C_CR1_ENARP I2C_CR1_ENARP_Msk /*!< ARP Enable */ macro
Dstm32l152xba.h3399 #define I2C_CR1_ENARP I2C_CR1_ENARP_Msk /*!< ARP Enable */ macro
Dstm32l100xb.h3387 #define I2C_CR1_ENARP I2C_CR1_ENARP_Msk /*!< ARP Enable */ macro
Dstm32l100xba.h3393 #define I2C_CR1_ENARP I2C_CR1_ENARP_Msk /*!< ARP Enable */ macro
/hal_stm32-3.5.0/stm32cube/stm32f4xx/soc/
Dstm32f410tx.h3608 #define I2C_CR1_ENARP I2C_CR1_ENARP_Msk /*!<ARP Enable … macro
Dstm32f410rx.h3618 #define I2C_CR1_ENARP I2C_CR1_ENARP_Msk /*!<ARP Enable … macro
Dstm32f410cx.h3618 #define I2C_CR1_ENARP I2C_CR1_ENARP_Msk /*!<ARP Enable … macro

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