Searched refs:GD32_RESET_I2C0 (Results 1 – 12 of 12) sorted by relevance
54 #define GD32_RESET_I2C0 GD32_RESET_CONFIG(APB1RST, 21U) macro
56 #define GD32_RESET_I2C0 GD32_RESET_CONFIG(APB1RST, 21U) macro
52 #define GD32_RESET_I2C0 GD32_RESET_CONFIG(APB1RST, 21U) macro
63 #define GD32_RESET_I2C0 GD32_RESET_CONFIG(APB1RST, 21U) macro
64 #define GD32_RESET_I2C0 GD32_RESET_CONFIG(APB1RST, 21U) macro
69 #define GD32_RESET_I2C0 GD32_RESET_CONFIG(APB1RST, 21U) macro
79 #define GD32_RESET_I2C0 GD32_RESET_CONFIG(APB1RST, 21U) macro
120 resets = <&rctl GD32_RESET_I2C0>;
179 resets = <&rctl GD32_RESET_I2C0>;
153 resets = <&rctl GD32_RESET_I2C0>;
130 resets = <&rctl GD32_RESET_I2C0>;
162 resets = <&rctl GD32_RESET_I2C0>;
