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/Zephyr-latest/boards/espressif/esp32c6_devkitc/doc/
Dindex.rst29 - 32-bit core RISC-V microcontroller with a clock speed of up to 160 MHz
/Zephyr-latest/boards/espressif/esp32s3_devkitm/doc/
Dindex.rst39 - 1x full-speed USB OTG
/Zephyr-latest/boards/nxp/frdm_mcxn947/doc/
Dindex.rst20 - USB high-speed (Host/Device) with on-chip HS PHY. HS USB Type-C connectors
/Zephyr-latest/subsys/bluetooth/audio/
Dmpl.c2043 static void set_playback_speed(int8_t speed) in set_playback_speed() argument
2046 if (speed != media_player.playback_speed_param) { in set_playback_speed()
2047 media_player.playback_speed_param = speed; in set_playback_speed()
/Zephyr-latest/soc/cdns/sample_controller32/include/
Dxtensa-sample-controller32.ld385 /* Below are to speed up execution by avoiding TLB misses
/Zephyr-latest/boards/st/stm32h7b3i_dk/doc/
Dindex.rst179 by the PLL clock at 280MHz. PLL clock is fed by a 24MHz high speed external clock.
/Zephyr-latest/boards/toradex/verdin_imx8mm/doc/
Dindex.rst130 The M4 Core is configured to run at a 400 MHz clock speed.
/Zephyr-latest/doc/develop/test/
Dbsim.rst152 To speed up compilation for users interested only in a subset of tests, several compile scripts
/Zephyr-latest/boards/st/stm32h745i_disco/doc/
Dindex.rst120 driven by the PLL clock at 480MHz, driven by an 25MHz high-speed external clock.
/Zephyr-latest/boards/nxp/mr_canhubk3/
Dmr_canhubk3.dts283 current-speed = <115200>;
/Zephyr-latest/boards/nxp/frdm_k22f/doc/
Dindex.rst290 …cus/k-seriesperformancem4/k2x-usb/kinetis-k22-120-mhz-cost-effective-full-speed-usb-microcontrolle…
/Zephyr-latest/doc/releases/
Dmigration-guide-3.5.rst413 initial CAN bitrate using the ``bus-speed``, ``sample-point``, ``bus-speed-data``, and
Drelease-notes-1.5.rst272 - No workaround need it, there is no support for high speed mode.
/Zephyr-latest/drivers/ethernet/
Deth_nxp_s32_gmac.c116 convert_phy_to_mac_config(&gmac_cfg, state->speed); in phy_link_state_changed()
Deth_sam_gmac.c1784 PHY_LINK_IS_FULL_DUPLEX(state->speed), in phy_link_state_changed()
1785 PHY_LINK_IS_SPEED_100M(state->speed)); in phy_link_state_changed()
/Zephyr-latest/boards/snps/emsdp/doc/
Dindex.rst86 use two different speed to verify data transfer with asynchronous functionality.
/Zephyr-latest/boards/ti/cc3220sf_launchxl/doc/
Dindex.rst65 the I2C driver defaults to I2C_BITRATE_FAST mode (400 kHz) bus speed
/Zephyr-latest/boards/96boards/carbon/doc/
Dstm32f401xe.rst294 usb 1-2.1: new full-speed USB device number 14 using xhci_hcd
/Zephyr-latest/boards/nxp/imx8mp_evk/doc/
Dindex.rst91 The M7 Core is configured to run at a 800 MHz clock speed.
/Zephyr-latest/doc/develop/flash_debug/
Dprobes.rst69 debuggers or high-speed tracing. You may need to adjust jumpers to prevent the
386 most J-Link features like the ultra fast flash download and debugging speed or
/Zephyr-latest/boards/ti/cc3235sf_launchxl/doc/
Dindex.rst65 the I2C driver defaults to I2C_BITRATE_FAST mode (400 kHz) bus speed
/Zephyr-latest/boards/toradex/verdin_imx8mp/doc/
Dindex.rst164 The M7 Core is configured to run at a 800 MHz clock speed.
/Zephyr-latest/boards/altr/max10/doc/
Dindex.rst120 current-speed = <115200>;
/Zephyr-latest/boards/microchip/mec172xevb_assy6906/doc/
Dindex.rst63 | RPMFAN | on-chip | Fan speed controller |
/Zephyr-latest/doc/hardware/porting/
Dboard_porting.rst483 controller and sets the bus speed:
696 board_runner_args(jlink "--device=nrf52" "--speed=4000")
709 options like ``--speed`` etc. are specific to the Python scripts.

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