Searched refs:main (Results 1776 – 1800 of 1972) sorted by relevance
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| /Zephyr-latest/boards/lilygo/ttgo_t8c3/doc/ |
| D | index.rst | 220 .. _`Lilygo TTGO T8-C3 schematic`: https://github.com/Xinyuan-LilyGO/T8-C3/blob/main/Schematic/T8-C…
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| /Zephyr-latest/boards/st/nucleo_h7a3zi_q/doc/ |
| D | index.rst | 132 oscillator, as well as the main PLL clock. By default, the System clock is
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| /Zephyr-latest/boards/st/stm32f072b_disco/doc/ |
| D | index.rst | 128 oscillator, as well as main PLL clock. By default System clock is driven
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| /Zephyr-latest/boards/st/stm32f411e_disco/doc/ |
| D | index.rst | 107 oscillator, as well as the main PLL clock. By default, the System clock is
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| /Zephyr-latest/boards/st/stm32f4_disco/doc/ |
| D | index.rst | 136 as well as main PLL clock. By default System clock is driven by PLL clock at 168MHz,
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| /Zephyr-latest/doc/services/portability/posix/overview/ |
| D | index.rst | 110 int main()
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| /Zephyr-latest/boards/adi/eval_adin2111ebz/doc/ |
| D | index.rst | 109 main PLL clock. By default the System clock is driven by the PLL clock at 80MHz, driven by the
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| /Zephyr-latest/boards/actinius/icarus_som_dk/doc/ |
| D | index.rst | 16 The main uController is the Nordic Semiconductor nRF9160, with
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| /Zephyr-latest/boards/alientek/pandora_stm32l475/doc/ |
| D | index.rst | 148 as well as the main PLL clock. By default the System clock is driven by the PLL clock at 80MHz,
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| /Zephyr-latest/boards/arduino/due/doc/ |
| D | index.rst | 118 32.768 kHz, and the main clock is 12 MHz. The processor can set up PLL to drive
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| /Zephyr-latest/boards/96boards/nitrogen/doc/ |
| D | index.rst | 195 32.768 kHz. The frequency of the main clock is 32 MHz.
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| /Zephyr-latest/boards/actinius/icarus/doc/ |
| D | index.rst | 11 The main uController is the Nordic Semiconductor nRF9160, with
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| /Zephyr-latest/dts/arm/renesas/ra/ |
| D | ra-cm4-common.dtsi | 26 xtal: clock-main-osc {
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| /Zephyr-latest/dts/arm/renesas/ra/ra6/ |
| D | r7fa6m3ax.dtsi | 146 xtal: clock-main-osc {
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| /Zephyr-latest/dts/arm/renesas/ra/ra8/ |
| D | r7fa8t1xh.dtsi | 15 xtal: clock-main-osc {
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| /Zephyr-latest/boards/others/black_f407ve/doc/ |
| D | index.rst | 168 as well as main PLL clock. By default System clock is driven by PLL clock
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| /Zephyr-latest/arch/posix/ |
| D | CMakeLists.txt | 151 # be included in all the applications' files which define main( ), and in any
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| /Zephyr-latest/boards/blues/swan_r5/doc/ |
| D | index.rst | 179 oscillator, as well as main PLL clock. By default, the System clock is
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| /Zephyr-latest/boards/nxp/frdm_ke17z512/doc/ |
| D | index.rst | 189 …-purpose-mcus/ke-series-arm-cortex-m4-m0-plus/ke1xz-arm-cortex-m0-plus-5v-main-stream-mcu-with-nxp…
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| /Zephyr-latest/boards/st/sensortile_box_pro/doc/ |
| D | index.rst | 37 The following is a summary of the main board features. More info can be find on `UM3133`_
192 oscillator, as well as main PLL clock. By default, the System clock is
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| /Zephyr-latest/samples/bluetooth/bap_broadcast_source/src/ |
| D | main.c | 450 int main(void) in main() function
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| /Zephyr-latest/boards/st/nucleo_f429zi/doc/ |
| D | index.rst | 163 as well as by the main PLL clock. By default System clock is driven by PLL clock at 180MHz,
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| /Zephyr-latest/boards/st/nucleo_f446ze/doc/ |
| D | index.rst | 162 as well as the main PLL clock. By default, the System clock is driven by the PLL clock at 84MHz,
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| /Zephyr-latest/boards/st/nucleo_f756zg/doc/ |
| D | index.rst | 143 oscillator, as well as the main PLL clock. By default, the System clock is
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| /Zephyr-latest/boards/st/nucleo_h753zi/doc/ |
| D | index.rst | 148 oscillator, as well as the main PLL clock. By default, the System clock is
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