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/Zephyr-latest/modules/hal_silabs/simplicity_sdk/
DCMakeLists.txt217 SL_CODE_COMPONENT_CORE=core
/Zephyr-latest/dts/xtensa/intel/
Dintel_adsp_ace30.dtsi153 compatible = "cdns,xtensa-core-intc";
610 /* This is actually an array of per-core designware
Dintel_adsp_ace30_ptl.dtsi158 compatible = "cdns,xtensa-core-intc";
623 /* This is actually an array of per-core designware
Dintel_adsp_ace15_mtpm.dtsi145 compatible = "cdns,xtensa-core-intc";
542 /* This is actually an array of per-core designware
/Zephyr-latest/boards/phytec/phyboard_polis/doc/
Dindex.rst101 It is recommended to disable peripherals used by the M4 core on the Linux host.
274 ## Starting auxiliary core stack = 0x20003A58, pc = 0x1FFE1905...
/Zephyr-latest/doc/releases/
Drelease-notes-1.5.rst153 * ``ZEP-354`` - Provide a DMA driver for Quark SE core
170 * ``ZEP-512`` - Add suspend/resume support for some core devices to enable Deep Sleep support in PMA
/Zephyr-latest/doc/kernel/usermode/
Dkernelobjects.rst8 * A core kernel object, such as a semaphore, thread, pipe, etc.
240 for creating core kernel objects and new driver subsystems.
/Zephyr-latest/modules/
DKconfig.mcuboot31 By default, this option instructs Zephyr to initialize the core
34 the core registers' state itself.
/Zephyr-latest/scripts/west_commands/runners/
Djlink.py19 from runners.core import FileType, RunnerCaps, ZephyrBinaryRunner
/Zephyr-latest/subsys/llext/
DKconfig117 available to the Zephyr core.
/Zephyr-latest/boards/dptechnics/walter/doc/
Dindex.rst16 - Xtensa dual-core 32-bit LX7 CPU
/Zephyr-latest/boards/infineon/cy8cproto_062_4343w/doc/
Dindex.rst129 …mmand, you may now set breakpoints and perform other standard GDB debugging on the PSOC 6 CM4 core.
/Zephyr-latest/boards/lilygo/ttgo_lora32/doc/
Dindex.rst10 - ESP32-PICO-D4 chip (240MHz dual core, 600 DMIPS, 520KB SRAM, Wi-Fi)
/Zephyr-latest/boards/st/stm32g081b_eval/doc/
Dindex.rst6 Arm Cortex-M0+ core-based STM32G081RBT6 microcontroller, with USB Type-C and
/Zephyr-latest/doc/connectivity/networking/api/
Dcoap_server.rst283 ``.well-known/core`` GET requests by the server. This allows clients to get a list of hypermedia
Dnet_mgmt.rst164 See :zephyr_file:`include/zephyr/net/net_event.h` for available generic core events that
Dnet_pkt.rst16 metadata for the core to hold important information. Such an object is
44 Note, however, one will rarely have to use it, as the core provides
/Zephyr-latest/doc/connectivity/bluetooth/api/mesh/
Dcore.rst6 The core provides functionality for managing the general Bluetooth Mesh
/Zephyr-latest/boards/st/stm32f746g_disco/doc/
Dindex.rst47 - 384+4 KB SRAM including 64-Kbyte of core coupled memory
/Zephyr-latest/boards/seeed/xiao_esp32s3/doc/
Dindex.rst32 and Bluetooth® Low Energy (Bluetooth LE). It consists of high-performance dual-core microprocessor
/Zephyr-latest/soc/nxp/imxrt/imxrt5xx/f1/
Dlinker.ld10 #include <xtensa/config/core-isa.h>
/Zephyr-latest/arch/x86/
DKconfig488 source "arch/x86/core/Kconfig.ia32"
489 source "arch/x86/core/Kconfig.intel64"
/Zephyr-latest/boards/st/steval_stwinbx1/doc/
Dindex.rst10 The STEVAL-STWINBX1 kit consists of an STWIN.box core system, a 480mAh LiPo battery, an adapter for…
40 Series) based on the high-performance Arm|reg| Cortex|reg|-M33 32-bit RISC core.
/Zephyr-latest/boards/nxp/mimxrt1060_evk/doc/
Dindex.rst13 Arm® Cortex-M7® core up to 600 MHz.
529 …tions-processors/i.mx-rt-series/i.mx-rt1060-crossover-processor-with-arm-cortex-m7-core:i.MX-RT1060
/Zephyr-latest/doc/project/
Drelease_process.rst268 APIs it is required that any release software that makes the core of the OS
270 This guarantees that we release many of the highlighted and core features with
277 with additional features, but the core implementation is not modified. This

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