Searched refs:core (Results 726 – 750 of 877) sorted by relevance
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/Zephyr-latest/modules/hal_silabs/simplicity_sdk/ |
D | CMakeLists.txt | 217 SL_CODE_COMPONENT_CORE=core
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/Zephyr-latest/dts/xtensa/intel/ |
D | intel_adsp_ace30.dtsi | 153 compatible = "cdns,xtensa-core-intc"; 610 /* This is actually an array of per-core designware
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D | intel_adsp_ace30_ptl.dtsi | 158 compatible = "cdns,xtensa-core-intc"; 623 /* This is actually an array of per-core designware
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D | intel_adsp_ace15_mtpm.dtsi | 145 compatible = "cdns,xtensa-core-intc"; 542 /* This is actually an array of per-core designware
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/Zephyr-latest/boards/phytec/phyboard_polis/doc/ |
D | index.rst | 101 It is recommended to disable peripherals used by the M4 core on the Linux host. 274 ## Starting auxiliary core stack = 0x20003A58, pc = 0x1FFE1905...
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/Zephyr-latest/doc/releases/ |
D | release-notes-1.5.rst | 153 * ``ZEP-354`` - Provide a DMA driver for Quark SE core 170 * ``ZEP-512`` - Add suspend/resume support for some core devices to enable Deep Sleep support in PMA
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/Zephyr-latest/doc/kernel/usermode/ |
D | kernelobjects.rst | 8 * A core kernel object, such as a semaphore, thread, pipe, etc. 240 for creating core kernel objects and new driver subsystems.
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/Zephyr-latest/modules/ |
D | Kconfig.mcuboot | 31 By default, this option instructs Zephyr to initialize the core 34 the core registers' state itself.
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/Zephyr-latest/scripts/west_commands/runners/ |
D | jlink.py | 19 from runners.core import FileType, RunnerCaps, ZephyrBinaryRunner
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/Zephyr-latest/subsys/llext/ |
D | Kconfig | 117 available to the Zephyr core.
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/Zephyr-latest/boards/dptechnics/walter/doc/ |
D | index.rst | 16 - Xtensa dual-core 32-bit LX7 CPU
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/Zephyr-latest/boards/infineon/cy8cproto_062_4343w/doc/ |
D | index.rst | 129 …mmand, you may now set breakpoints and perform other standard GDB debugging on the PSOC 6 CM4 core.
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/Zephyr-latest/boards/lilygo/ttgo_lora32/doc/ |
D | index.rst | 10 - ESP32-PICO-D4 chip (240MHz dual core, 600 DMIPS, 520KB SRAM, Wi-Fi)
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/Zephyr-latest/boards/st/stm32g081b_eval/doc/ |
D | index.rst | 6 Arm Cortex-M0+ core-based STM32G081RBT6 microcontroller, with USB Type-C and
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/Zephyr-latest/doc/connectivity/networking/api/ |
D | coap_server.rst | 283 ``.well-known/core`` GET requests by the server. This allows clients to get a list of hypermedia
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D | net_mgmt.rst | 164 See :zephyr_file:`include/zephyr/net/net_event.h` for available generic core events that
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D | net_pkt.rst | 16 metadata for the core to hold important information. Such an object is 44 Note, however, one will rarely have to use it, as the core provides
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/Zephyr-latest/doc/connectivity/bluetooth/api/mesh/ |
D | core.rst | 6 The core provides functionality for managing the general Bluetooth Mesh
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/Zephyr-latest/boards/st/stm32f746g_disco/doc/ |
D | index.rst | 47 - 384+4 KB SRAM including 64-Kbyte of core coupled memory
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/Zephyr-latest/boards/seeed/xiao_esp32s3/doc/ |
D | index.rst | 32 and Bluetooth® Low Energy (Bluetooth LE). It consists of high-performance dual-core microprocessor
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/Zephyr-latest/soc/nxp/imxrt/imxrt5xx/f1/ |
D | linker.ld | 10 #include <xtensa/config/core-isa.h>
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/Zephyr-latest/arch/x86/ |
D | Kconfig | 488 source "arch/x86/core/Kconfig.ia32" 489 source "arch/x86/core/Kconfig.intel64"
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/Zephyr-latest/boards/st/steval_stwinbx1/doc/ |
D | index.rst | 10 The STEVAL-STWINBX1 kit consists of an STWIN.box core system, a 480mAh LiPo battery, an adapter for… 40 Series) based on the high-performance Arm|reg| Cortex|reg|-M33 32-bit RISC core.
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/Zephyr-latest/boards/nxp/mimxrt1060_evk/doc/ |
D | index.rst | 13 Arm® Cortex-M7® core up to 600 MHz. 529 …tions-processors/i.mx-rt-series/i.mx-rt1060-crossover-processor-with-arm-cortex-m7-core:i.MX-RT1060
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/Zephyr-latest/doc/project/ |
D | release_process.rst | 268 APIs it is required that any release software that makes the core of the OS 270 This guarantees that we release many of the highlighted and core features with 277 with additional features, but the core implementation is not modified. This
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