Searched refs:core (Results 501 – 525 of 877) sorted by relevance
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/Zephyr-latest/boards/nxp/mimxrt1062_fmurt6/doc/ |
D | index.rst | 13 Arm® Cortex-M7® core up to 600 MHz. 272 Run JLink.exe and choose device / core as MIMXRT106A-ALEXA. 352 …tions-processors/i.mx-rt-series/i.mx-rt1060-crossover-processor-with-arm-cortex-m7-core:i.MX-RT1060
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/Zephyr-latest/doc/connectivity/bluetooth/ |
D | bluetooth-dev.rst | 160 on its network core, or, with the network core running only the controller, the application 161 core running the host and your application, and the HCI transport over IPC.
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/Zephyr-latest/boards/adafruit/feather_esp32s3_tft/doc/ |
D | index.rst | 17 - ESP32-S3 mini module, featuring the dual core 32-bit Xtensa Microprocessor 33 multiprocessing. Due to its dual-core architecture, each core can be enabled to
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/Zephyr-latest/boards/toradex/verdin_imx8mp/doc/ |
D | index.rst | 35 energy-efficient processor. With four cores in this cluster, each core is equipped with its own L1 127 It is recommended to disable peripherals used by the M7 core on the Linux host. 176 A53 core. The A53 core is responsible to load the M7 binary application into the RAM, put the M7 in
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/Zephyr-latest/scripts/west_commands/runners/ |
D | esp32.py | 12 from runners.core import RunnerCaps, ZephyrBinaryRunner
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D | blackmagicprobe.py | 14 from runners.core import RunnerCaps, ZephyrBinaryRunner
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D | nrfutil.py | 12 from runners.core import _DRY_RUN
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/Zephyr-latest/soc/microchip/mec/mec15xx/ |
D | Kconfig | 1 # Microchip MEC1501 MCU core series
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/Zephyr-latest/boards/silabs/dev_kits/sim3u1xx_dk/doc/ |
D | index.rst | 12 - CPU core: ARM Cortex®-M3
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/Zephyr-latest/boards/silabs/radio_boards/xg24_rb4187c/doc/ |
D | index.rst | 18 - CPU core: ARM Cortex®-M33 with FPU
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/Zephyr-latest/boards/seeed/xiao_rp2040/doc/ |
D | index.rst | 17 carries the powerful Dual-core RP2040 processor with a flexible
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/Zephyr-latest/boards/weact/stm32g431_core/ |
D | weact_stm32g431_core.dts | 15 compatible = "weact,stm32g431-core";
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/Zephyr-latest/arch/x86/ |
D | ia32.cmake | 120 add_subdirectory(core)
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/Zephyr-latest/arch/arm/core/cortex_m/tz/ |
D | Kconfig | 1 # ARM TrustZone-M core configuration options
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/Zephyr-latest/boards/nxp/mimxrt1160_evk/ |
D | mimxrt1160_evk_mimxrt1166_cm7.dts | 100 * timer will be used instead of systick, as allows the core clock to
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/Zephyr-latest/boards/renesas/rcar_spider_s4/doc/ |
D | rcar_spider_a55.rst | 20 * 1.0 GHz Arm Cortex-R52 core (hardware Lock step is supported);
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/Zephyr-latest/boards/nuvoton/numaker_pfm_m467/doc/ |
D | index.rst | 8 Ethernet series MCU with ARM® -Cortex®-M4F core.
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/Zephyr-latest/boards/beagle/beaglev_fire/doc/ |
D | index.rst | 7 PolarFire® MPFS025T 5x core RISC-V System on Chip (SoC) with FPGA fabric. BeagleV®-Fire opens up new 20 * ``beaglev_fire/polarfire/e51``: Uses only the E51 core
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/Zephyr-latest/boards/toradex/verdin_imx8mm/doc/ |
D | index.rst | 85 It is recommended to disable peripherals used by the M4 core on the Linux host. 136 to be started by the A53 core. The A53 core is responsible to load the M4 binary
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/Zephyr-latest/boards/silabs/radio_boards/slwrb4180b/doc/ |
D | index.rst | 18 - CPU core: ARM Cortex®-M33 with FPU
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/Zephyr-latest/boards/gd/gd32vf103c_starter/doc/ |
D | index.rst | 9 The GD32VF103CB features a single-core RISC-V 32-bit MCU which can run up
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/Zephyr-latest/doc/services/debugging/ |
D | debugmon.rst | 10 otherwise crash when the core halts (e.g. applications that need to keep
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/Zephyr-latest/boards/starfive/visionfive2/doc/ |
D | index.rst | 7 multi-core 64bit RISC-V SoC.
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/Zephyr-latest/arch/x86/core/ |
D | Kconfig.intel64 | 29 support limited call-tree depth and must fit into the low core,
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/Zephyr-latest/boards/lowrisc/opentitan_earlgrey/doc/ |
D | index.rst | 14 - RV32IMCB RISC-V "Ibex" core
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