1.. zephyr:board:: beaglev_fire
2
3Overview
4********
5
6BeagleV®-Fire is a revolutionary single-board computer (SBC) powered by the Microchip’s
7PolarFire® MPFS025T 5x core RISC-V System on Chip (SoC) with FPGA fabric. BeagleV®-Fire opens up new
8horizons for developers, tinkerers, and the open-source community to explore the vast potential of
9RISC-V architecture and FPGA technology. It has the same P8 & P9 cape header pins as BeagleBone
10Black allowing you to stack your favorite BeagleBone cape on top to expand it’s capability.
11Built around the powerful and energy-efficient RISC-V instruction set architecture (ISA) along with
12its versatile FPGA fabric, BeagleV®-Fire SBC offers unparalleled opportunities for developers,
13hobbyists, and researchers to explore and experiment with RISC-V technology.
14
15Building
16========
17
18There are three board configurations provided for the BeagleV-Fire:
19
20* ``beaglev_fire/polarfire/e51``: Uses only the E51 core
21* ``beaglev_fire/polarfire/u54``: Uses the U54 cores
22* ``beaglev_fire/polarfire/u54/smp``: Uses the U54 cores with CONFIG_SMP=y
23
24Applications for the ``beaglev_fire`` board configuration can be built as usual:
25
26.. zephyr-app-commands::
27   :zephyr-app: samples/hello_world
28   :board: beaglev_fire/polarfire/u54
29   :goals: build
30
31Debugging
32=========
33
34In order to upload the application to the device, you'll need OpenOCD and GDB
35with RISC-V support.
36You can get them as a part of SoftConsole SDK.
37Download and installation instructions can be found on
38`Microchip's SoftConsole website
39<https://www.microchip.com/en-us/products/fpgas-and-plds/fpga-and-soc-design-tools/programming-and-debug/softconsole>`_.
40
41You will also require a Debugger such as Microchip's FlashPro5/6.
42
43Connect to BeagleV-Fire UART debug port using a 3.3v USB to UART bridge.
44Now you can run ``tio <port>`` in a terminal window to access the UART debug port connection. Once you
45are connected properly you can press the Reset button which will show you a progress bar like:
46
47.. image:: img/board-booting.png
48     :align: center
49     :alt: beaglev_fire
50
51Once you see that progress bar on your screen you can start pressing any button (0-9/a-z) which
52will interrupt the Hart Software Services from booting its payload.
53
54With the necessary tools installed, you can connect to the board using OpenOCD.
55from a different terminal, run:
56
57.. code-block:: bash
58
59   <softconsole_path>/openocd/bin/openocd --command "set DEVICE MPFS" --file \
60   <softconsole_path>/openocd/share/openocd/scripts/board/microsemi-riscv.cfg
61
62
63Leave it running, and in a different terminal, use GDB to upload the binary to
64the board. You can use the RISC-V GDB from the Zephyr SDK.
65launch GDB:
66
67.. code-block:: bash
68
69   <path_to_zephyr_sdk>/riscv64-zephyr-elf/bin/riscv64-zephyr-elf-gdb
70
71
72
73Here is the GDB terminal command to connect to the device
74and load the binary:
75
76.. code-block:: bash
77
78   set arch riscv:rv64
79   set mem inaccessible-by-default off
80   file <path_to_zehyr.elf>
81   target extended-remote localhost:3333
82   load
83   break main
84   continue
85
86Flashing
87========
88When using the PolarFire `Hart Software Services <https://github.com/polarfire-soc/hart-software-services>`_ along with Zephyr, you need to use the `hss-payload-generator <https://github.com/polarfire-soc/hart-software-services/tree/master/tools/hss-payload-generator>`_ tool to generate an image that HSS can boot.
89
90.. code-block:: yaml
91
92  set-name: 'ZephyrImage'
93
94  # Define the entry point address for each hart (U54 cores)
95  hart-entry-points:
96    u54_1: '0x1000000000'
97
98  # Define the payloads (ELF binaries or raw blobs)
99  payloads:
100    <path_to_zephyr.elf>:
101      exec-addr: '0x1000000000'  # Where Zephyr should be loaded
102      owner-hart: u54_1  # Primary hart that runs Zephyr
103      priv-mode: prv_m  # Start in Machine mode
104      skip-opensbi: true  # Boot directly without OpenSBI
105
106After generating the image, you can flash it to the board by restarting a board that's connected over USB and UART, interrupting the HSS boot process with a key press, and then running the ``mmc`` and ``usbdmsc`` commands:
107
108.. code-block:: bash
109
110  Press a key to enter CLI, ESC to skip
111  Timeout in 1 second
112  .[6.304162] Character 100 pressed
113  [6.308415] Type HELP for list of commands
114  [6.313276] >> mmc
115  [10.450867] Selecting SDCARD/MMC (fallback) as boot source ...
116  [10.457550] Attempting to select eMMC ... Passed
117  [10.712708] >> usbdmsc
118  [14.732841] initialize MMC
119  [14.736400] Attempting to select eMMC ... Passed
120  [15.168707] MMC - 512 byte pages, 512 byte blocks, 30621696 pages
121  Waiting for USB Host to connect... (CTRL-C to quit)
122  . 0 bytes written, 0 bytes read
123  USB Host connected. Waiting for disconnect... (CTRL-C to quit)
124  / 0 bytes written, 219136 bytes read
125
126This will cause the board to appear as a USB mass storage device. You can then then flash the image with ``dd`` or other tools like `BalenaEtcher <https://www.balena.io/etcher/>`_:
127
128.. code-block:: bash
129
130  dd if=<path_to_zephyr.elf> of=/dev/sdXD bs=4M status=progress oflag=sync
131