1# Microchip MEC1501 MCU core series
2
3# Copyright (c) 2018 Intel Corporation
4# SPDX-License-Identifier: Apache-2.0
5
6config SOC_SERIES_MEC15XX
7	select ARM
8	select CPU_CORTEX_M4
9	select CPU_CORTEX_M_HAS_DWT
10	select CPU_HAS_ARM_MPU
11	select HAS_PM
12	select SOC_EARLY_INIT_HOOK
13
14config SOC_MEC1501_HSZ
15	select HAS_MEC_HAL
16
17if SOC_SERIES_MEC15XX
18
19config RTOS_TIMER
20	bool "MEC1501 RTOS timer"
21
22config SOC_MEC1501_PROC_CLK_DIV
23	int "PROC_CLK_DIV"
24	default 1
25	range 1 48
26	help
27	  This divisor defines a ratio between processor clock (HCLK)
28	  and master clock (MCK):
29	  HCLK = MCK / PROC_CLK_DIV
30	  Allowed divider values: 1, 3, 4, 16, and 48.
31
32config SOC_MEC1501_VTR3_1_8V
33	bool "VTR3 power rail is tied to 1.8V"
34	help
35	  Set this is if VTR3 power sourcejumper in the board is changed.
36
37config SOC_MEC1501_VCI_PINS_AS_GPIOS
38	bool "Use VCI block pins as GPIOS"
39	default y
40	help
41	  By default these pins are not GPIOs, but HW controlled.
42	  Set this if VCI pin block HW logic is not required in the board
43	  design.
44
45choice
46	prompt "MEC1501 debug interface general configuration"
47	default SOC_MEC1501_DEBUG_WITHOUT_TRACING
48	depends on SOC_SERIES_MEC15XX
49	help
50	  Select Debug SoC interface support for MEC15xx SoC family
51
52	config SOC_MEC1501_DEBUG_DISABLED
53		bool "Disable debug support"
54		help
55		  Debug port is disabled, JTAG/SWD cannot be enabled. JTAG_RST#
56		  pin is ignored. All other JTAG pins can be used as GPIOs
57		  or other non-JTAG alternate functions.
58
59	config SOC_MEC1501_DEBUG_WITHOUT_TRACING
60		bool "Debug support via Serial wire debug"
61		help
62		  JTAG port in SWD mode. UART2 and ADC00-03 can be used.
63
64	config SOC_MEC1501_DEBUG_AND_TRACING
65		bool "Debug support via Serial wire debug with tracing enabled"
66		help
67		  JTAG port is enabled in SWD mode. Refer to tracing options
68		  to see if ADC00-03 can be used or not.
69
70endchoice
71
72choice
73	prompt "MEC1501 debug interface trace configuration"
74	default SOC_MEC1501_DEBUG_AND_ETM_TRACING
75	depends on SOC_MEC1501_DEBUG_AND_TRACING
76	help
77	  Select tracing mode for debug interface
78
79	config SOC_MEC1501_DEBUG_AND_ETM_TRACING
80		bool "Debug support via Serial wire debug"
81		help
82		  JTAG port in SWD mode and SWV as tracing method.
83		  UART2 can be used, but ADC00-03 cannot.
84
85	config SOC_MEC1501_DEBUG_AND_SWV_TRACING
86		bool "debug support via Serial Wire Debug and Viewer"
87		help
88		  JTAG port in SWD mode and SWV as tracing method.
89		  UART2 cannot be used. ADC00-03 can be used.
90endchoice
91
92# GPIO initialization depends on SOC initialization, which happen at
93# CONFIG_KERNEL_INIT_PRIORITY_DEFAULT, so GPIO_INIT_PRIORITY needs to be
94# higher than that.
95if GPIO
96
97config GPIO_INIT_PRIORITY
98	default 41
99
100endif # GPIO
101
102endif # SOC_SERIES_MEC15XX
103