| /Zephyr-latest/samples/subsys/input/input_dump/boards/ |
| D | esp32s3_devkitm_procpu.overlay | 14 channel-num = <9>;
15 channel-sens = <20>;
20 channel-num = <8>;
21 channel-sens = <20>;
26 channel-num = <6>;
27 channel-sens = <20>;
32 channel-num = <4>;
33 channel-sens = <20>;
|
| /Zephyr-latest/samples/subsys/llext/edk/app/src/ |
| D | pubsub.c | 87 static void notify_subscribers(enum Channels channel) in notify_subscribers() argument
90 struct subs *subs = &channel_subscribers[channel]; in notify_subscribers()
93 k_event_post(subs->subscribers[i].evt, channel); in notify_subscribers()
124 int z_impl_publish(enum Channels channel, void *data, size_t data_len) in z_impl_publish() argument
126 const struct zbus_channel *chan = channel_subscribers[channel].chan; in z_impl_publish()
128 if (channel == CHAN_LAST) { in z_impl_publish()
137 static inline int z_vrfy_publish(enum Channels channel, void *data, in z_vrfy_publish() argument
148 ret = z_impl_publish(channel, copy_data, data_len); in z_vrfy_publish()
157 int z_impl_receive(enum Channels channel, void *data, size_t data_len) in z_impl_receive() argument
161 if (channel == CHAN_LAST || data == NULL) { in z_impl_receive()
[all …]
|
| /Zephyr-latest/drivers/dma/ |
| D | dma_dw_axi.c | 288 unsigned int channel; in dma_dw_axi_isr() local
297 channel = find_lsb_set(status) - 1; in dma_dw_axi_isr()
298 if (channel < 0) { in dma_dw_axi_isr()
299 LOG_ERR("Spurious interrupt received channel:%u\n", channel); in dma_dw_axi_isr()
303 if (channel > (dw_dev_data->dma_ctx.dma_channels - 1)) { in dma_dw_axi_isr()
304 LOG_ERR("Interrupt received on invalid channel:%d\n", channel); in dma_dw_axi_isr()
309 chan_data = &dw_dev_data->chan[channel]; in dma_dw_axi_isr()
312 ch_status = sys_read64(reg_base + DMA_DW_AXI_CH_INTSTATUS(channel)); in dma_dw_axi_isr()
321 reg_base + DMA_DW_AXI_CH_INTCLEARREG(channel)); in dma_dw_axi_isr()
323 channel, ch_status); in dma_dw_axi_isr()
[all …]
|
| D | dma_emul.c | 39 uint32_t channel; member
101 uint32_t channel) in dma_emul_get_channel_state() argument
105 __ASSERT_NO_MSG(channel < config->num_channels); in dma_emul_get_channel_state()
107 return (enum dma_emul_channel_state)config->xfer[channel].config._reserved; in dma_emul_get_channel_state()
110 static void dma_emul_set_channel_state(const struct device *dev, uint32_t channel, in dma_emul_set_channel_state() argument
115 LOG_DBG("setting channel %u state to %s", channel, dma_emul_channel_state_to_string(state)); in dma_emul_set_channel_state()
117 __ASSERT_NO_MSG(channel < config->num_channels); in dma_emul_set_channel_state()
120 config->xfer[channel].config._reserved = state; in dma_emul_set_channel_state()
200 uint32_t channel; in dma_emul_work_handler() local
211 channel = dma_work->channel; in dma_emul_work_handler()
[all …]
|
| D | dma_intel_adsp_hda.h | 34 uint32_t channel,
38 uint32_t channel,
42 uint32_t channel,
46 uint32_t channel,
49 int intel_adsp_hda_dma_link_reload(const struct device *dev, uint32_t channel,
52 int intel_adsp_hda_dma_host_reload(const struct device *dev, uint32_t channel,
55 int intel_adsp_hda_dma_status(const struct device *dev, uint32_t channel,
58 bool intel_adsp_hda_dma_chan_filter(const struct device *dev, int channel,
61 int intel_adsp_hda_dma_start(const struct device *dev, uint32_t channel);
63 int intel_adsp_hda_dma_stop(const struct device *dev, uint32_t channel);
|
| D | dma_smartbond.c | 198 uint32_t channel, bool status) in dma_smartbond_set_channel_status() argument
201 struct channel_regs *regs = DMA_CHN2REG(channel); in dma_smartbond_set_channel_status()
207 DMA->DMA_CLEAR_INT_REG |= BIT(channel); in dma_smartbond_set_channel_status()
209 DMA->DMA_INT_MASK_REG |= BIT(channel); in dma_smartbond_set_channel_status()
230 DMA->DMA_INT_MASK_REG &= ~(BIT(channel)); in dma_smartbond_set_channel_status()
232 DMA->DMA_CLEAR_INT_REG |= BIT(channel); in dma_smartbond_set_channel_status()
245 static bool dma_channel_dst_addr_check_and_adjust(uint32_t channel, uint32_t *dst) in dma_channel_dst_addr_check_and_adjust() argument
265 (channel != DMA_SECURE_CHANNEL))) { in dma_channel_dst_addr_check_and_adjust()
281 static bool dma_channel_src_addr_check_and_adjust(uint32_t channel, uint32_t *src) in dma_channel_src_addr_check_and_adjust() argument
313 (channel != DMA_SECURE_CHANNEL)) { in dma_channel_src_addr_check_and_adjust()
[all …]
|
| D | dma_intel_adsp_gpdma.c | 18 #define GPDMA_CHLLPC_OFFSET(channel) (0x0010 + channel*0x10) argument
23 #define GPDMA_CHLLPL(channel) (0x0018 + channel*0x10) argument
24 #define GPDMA_CHLLPU(channel) (0x001c + channel*0x10) argument
56 static void intel_adsp_gpdma_dump_registers(const struct device *dev, uint32_t channel) in intel_adsp_gpdma_dump_registers() argument
67 llpc = dw_read(dev_cfg->shim, GPDMA_CHLLPC_OFFSET(channel)); in intel_adsp_gpdma_dump_registers()
68 llpl = dw_read(dev_cfg->shim, GPDMA_CHLLPL(channel)); in intel_adsp_gpdma_dump_registers()
69 llpu = dw_read(dev_cfg->shim, GPDMA_CHLLPU(channel)); in intel_adsp_gpdma_dump_registers()
72 channel, cap, ctl, ipptr, llpc, llpl, llpu); in intel_adsp_gpdma_dump_registers()
77 dw_read(dw_cfg->base, DW_CHAN_OFFSET(channel) + chan_reg_offs[i])); in intel_adsp_gpdma_dump_registers()
90 uint32_t channel, uint32_t dma_slot) in intel_adsp_gpdma_llp_config() argument
[all …]
|
| D | dma_mcux_edma.c | 174 uint32_t channel) in dma_mcux_edma_add_channel_gap() argument
179 return (channel < config->channel_gap[0]) ? channel : in dma_mcux_edma_add_channel_gap()
180 (channel + 1 + config->channel_gap[1] - config->channel_gap[0]); in dma_mcux_edma_add_channel_gap()
183 return channel; in dma_mcux_edma_add_channel_gap()
188 uint32_t channel) in dma_mcux_edma_remove_channel_gap() argument
193 return (channel < config->channel_gap[0]) ? channel : in dma_mcux_edma_remove_channel_gap()
194 (channel + config->channel_gap[0] - config->channel_gap[1] - 1); in dma_mcux_edma_remove_channel_gap()
197 return channel; in dma_mcux_edma_remove_channel_gap()
217 uint32_t channel = dma_mcux_edma_remove_channel_gap(data->dev, handle->channel); in nxp_edma_callback() local
230 data->dma_callback(data->dev, data->user_data, channel, ret); in nxp_edma_callback()
[all …]
|
| D | dma_xilinx_axi_dma.c | 580 static int dma_xilinx_axi_dma_start(const struct device *dev, uint32_t channel) in dma_xilinx_axi_dma_start() argument
584 struct dma_xilinx_axi_dma_channel *channel_data = &data->channels[channel]; in dma_xilinx_axi_dma_start()
592 const int irq_key = dma_xilinx_axi_dma_lock_irq(cfg, channel); in dma_xilinx_axi_dma_start()
594 if (channel >= cfg->channels) { in dma_xilinx_axi_dma_start()
595 LOG_ERR("Invalid channel %" PRIu32 " - must be < %" PRIu32 "!", channel, in dma_xilinx_axi_dma_start()
597 dma_xilinx_axi_dma_unlock_irq(cfg, channel, irq_key); in dma_xilinx_axi_dma_start()
605 channel == XILINX_AXI_DMA_TX_CHANNEL_NUM ? "TX" : "RX"); in dma_xilinx_axi_dma_start()
615 channel == XILINX_AXI_DMA_TX_CHANNEL_NUM ? "TX" : "RX", tail_descriptor, in dma_xilinx_axi_dma_start()
692 dma_xilinx_axi_dma_unlock_irq(cfg, channel, irq_key); in dma_xilinx_axi_dma_start()
700 static int dma_xilinx_axi_dma_stop(const struct device *dev, uint32_t channel) in dma_xilinx_axi_dma_stop() argument
[all …]
|
| D | dma_stm32_bdma.c | 308 struct bdma_stm32_channel *channel; in bdma_stm32_irq_handler() local
313 channel = &config->channels[id]; in bdma_stm32_irq_handler()
316 if ((channel->hal_override != true) && (channel->busy == false)) { in bdma_stm32_irq_handler()
326 callback_arg = channel->mux_channel; in bdma_stm32_irq_handler()
335 if (!channel->hal_override) { in bdma_stm32_irq_handler()
338 channel->bdma_callback(dev, channel->user_data, callback_arg, 0); in bdma_stm32_irq_handler()
341 if (!channel->cyclic) { in bdma_stm32_irq_handler()
342 channel->busy = false; in bdma_stm32_irq_handler()
345 if (!channel->hal_override) { in bdma_stm32_irq_handler()
348 channel->bdma_callback(dev, channel->user_data, callback_arg, 0); in bdma_stm32_irq_handler()
[all …]
|
| D | dma_sam0.c | 36 uint32_t channel; in dma_sam0_isr() local
41 channel = (pend & DMAC_INTPEND_ID_Msk) >> DMAC_INTPEND_ID_Pos; in dma_sam0_isr()
42 chdata = &data->channels[channel]; in dma_sam0_isr()
47 channel, -DMAC_INTPEND_TERR); in dma_sam0_isr()
51 chdata->cb(dev, chdata->user_data, channel, 0); in dma_sam0_isr()
62 static int dma_sam0_config(const struct device *dev, uint32_t channel, in dma_sam0_config() argument
66 DmacDescriptor *desc = &data->descriptors[channel]; in dma_sam0_config()
72 if (channel >= DMAC_CH_NUM) { in dma_sam0_config()
101 DMA_REGS->CHID.reg = DMAC_CHID_ID(channel); in dma_sam0_config()
137 DmacChannel * chcfg = &DMA_REGS->Channel[channel]; in dma_sam0_config()
[all …]
|
| /Zephyr-latest/drivers/pwm/ |
| D | pwm_handlers.c | 12 uint32_t channel, uint32_t period, in z_vrfy_pwm_set_cycles() argument
16 return z_impl_pwm_set_cycles((const struct device *)dev, channel, in z_vrfy_pwm_set_cycles()
22 uint32_t channel, in z_vrfy_pwm_get_cycles_per_sec() argument
28 channel, (uint64_t *)cycles); in z_vrfy_pwm_get_cycles_per_sec()
35 uint32_t channel) in z_vrfy_pwm_enable_capture() argument
38 return z_impl_pwm_enable_capture((const struct device *)dev, channel); in z_vrfy_pwm_enable_capture()
43 uint32_t channel) in z_vrfy_pwm_disable_capture() argument
46 return z_impl_pwm_disable_capture((const struct device *)dev, channel); in z_vrfy_pwm_disable_capture()
51 uint32_t channel, pwm_flags_t flags, in z_vrfy_pwm_capture_cycles() argument
64 err = z_impl_pwm_capture_cycles((const struct device *)dev, channel, in z_vrfy_pwm_capture_cycles()
|
| D | pwm_rcar.c | 30 #define RCAR_PWM_CR(channel) \ argument
31 ((uint32_t)((channel * RCAR_PWM_REG_SHIFT)) + 0x00) /* PWM Control Register */
32 #define RCAR_PWM_CNT(channel) \ argument
33 ((uint32_t)((channel * RCAR_PWM_REG_SHIFT)) + 0x04) /* PWM Count Register */
89 static int pwm_rcar_update_clk(const struct pwm_rcar_cfg *config, uint32_t channel, in pwm_rcar_update_clk() argument
94 power = pwm_rcar_read(config, RCAR_PWM_CR(channel)) & RCAR_PWM_DIVISER_MASK; in pwm_rcar_update_clk()
127 reg_val = pwm_rcar_read(config, RCAR_PWM_CR(channel)); in pwm_rcar_update_clk()
130 pwm_rcar_write(config, RCAR_PWM_CR(channel), reg_val); in pwm_rcar_update_clk()
135 static int pwm_rcar_set_cycles(const struct device *dev, uint32_t channel, uint32_t period_cycles, in pwm_rcar_set_cycles() argument
142 if (channel > RCAR_PWM_MAX_CHANNEL) { in pwm_rcar_set_cycles()
[all …]
|
| D | pwm_numaker.c | 78 static int pwm_numaker_set_cycles(const struct device *dev, uint32_t channel, in pwm_numaker_set_cycles() argument
84 uint32_t channel_mask = BIT(channel); in pwm_numaker_set_cycles()
86 LOG_DBG("Channel=0x%x, CAPIEN=0x%x, CAPIF=0x%x", channel, epwm->CAPIEN, in pwm_numaker_set_cycles()
91 epwm->POLCTL |= BIT(EPWM_POLCTL_PINV0_Pos + channel); in pwm_numaker_set_cycles()
93 epwm->POLCTL &= ~BIT(EPWM_POLCTL_PINV0_Pos + channel); in pwm_numaker_set_cycles()
105 EPWM_ConfigOutputChannel(epwm, channel, data->cycles_per_sec / period_cycles, in pwm_numaker_set_cycles()
117 LOG_DBG("Channel=0x%x, CAPIEN=0x%x, CAPIF=0x%x", channel, epwm->CAPIEN, epwm->CAPIF); in pwm_numaker_set_cycles()
122 static int pwm_numaker_get_cycles_per_sec(const struct device *dev, uint32_t channel, in pwm_numaker_get_cycles_per_sec() argument
128 ARG_UNUSED(channel); in pwm_numaker_get_cycles_per_sec()
137 static int pwm_numaker_configure_capture(const struct device *dev, uint32_t channel, in pwm_numaker_configure_capture() argument
[all …]
|
| D | pwm_mcux.c | 38 pwm_signal_param_t channel[CHANNEL_COUNT]; member
42 static int mcux_pwm_set_cycles_internal(const struct device *dev, uint32_t channel, in mcux_pwm_set_cycles_internal() argument
56 if (period_cycles != data->period_cycles[channel] in mcux_pwm_set_cycles_internal()
57 || level != data->channel[channel].level) { in mcux_pwm_set_cycles_internal()
61 data->period_cycles[channel] = period_cycles; in mcux_pwm_set_cycles_internal()
68 data->channel[channel].pwmchannelenable = true; in mcux_pwm_set_cycles_internal()
79 data->channel[channel].dutyCyclePercent = 0; in mcux_pwm_set_cycles_internal()
80 data->channel[channel].level = level; in mcux_pwm_set_cycles_internal()
83 &data->channel[channel], 1U, in mcux_pwm_set_cycles_internal()
91 if (channel == 0) { in mcux_pwm_set_cycles_internal()
[all …]
|
| D | pwm_stm32.c | 63 uint8_t channel; member
312 static int pwm_stm32_set_cycles(const struct device *dev, uint32_t channel, in pwm_stm32_set_cycles() argument
322 if (channel < 1u || channel > TIMER_MAX_CH) { in pwm_stm32_set_cycles()
323 LOG_ERR("Invalid channel (%d)", channel); in pwm_stm32_set_cycles()
345 ll_channel = ch2ll[channel - 1u]; in pwm_stm32_set_cycles()
347 if (channel <= ARRAY_SIZE(ch2ll_n)) { in pwm_stm32_set_cycles()
348 negative_ll_channel = ch2ll_n[channel - 1u]; in pwm_stm32_set_cycles()
359 LOG_ERR("Channel %d has NO complementary output", channel); in pwm_stm32_set_cycles()
449 set_timer_compare[channel - 1u](cfg->timer, pulse_cycles); in pwm_stm32_set_cycles()
457 static int init_capture_channels(const struct device *dev, uint32_t channel, in init_capture_channels() argument
[all …]
|
| /Zephyr-latest/tests/drivers/sensor/sbs_gauge/src/ |
| D | test_sbs_gauge.c | 21 static void test_get_sensor_value(int16_t channel) in test_get_sensor_value() argument
26 zassert_ok(sensor_sample_fetch_chan(dev, channel), "Sample fetch failed"); in test_get_sensor_value()
27 zassert_ok(sensor_channel_get(dev, channel, &value), "Get sensor value failed"); in test_get_sensor_value()
31 static void test_get_sensor_value_not_supp(int16_t channel) in test_get_sensor_value_not_supp() argument
35 zassert_true(sensor_sample_fetch_chan(dev, channel) == -ENOTSUP, "Invalid function"); in test_get_sensor_value_not_supp()
95 uint8_t channel; in ZTEST() local
97 for (channel = SENSOR_CHAN_ACCEL_X; channel <= SENSOR_CHAN_RPM; channel++) { in ZTEST()
98 test_get_sensor_value_not_supp(channel); in ZTEST()
|
| /Zephyr-latest/include/zephyr/drivers/ |
| D | mipi_dsi.h | 123 int (*attach)(const struct device *dev, uint8_t channel,
125 ssize_t (*transfer)(const struct device *dev, uint8_t channel,
127 int (*detach)(const struct device *dev, uint8_t channel,
141 uint8_t channel, in mipi_dsi_attach() argument
146 return api->attach(dev, channel, mdev); in mipi_dsi_attach()
159 uint8_t channel, in mipi_dsi_transfer() argument
164 return api->transfer(dev, channel, msg); in mipi_dsi_transfer()
179 ssize_t mipi_dsi_generic_read(const struct device *dev, uint8_t channel,
193 ssize_t mipi_dsi_generic_write(const struct device *dev, uint8_t channel,
207 ssize_t mipi_dsi_dcs_read(const struct device *dev, uint8_t channel,
[all …]
|
| /Zephyr-latest/tests/bsim/bluetooth/host/gatt/ccc_store/src/ |
| D | common.c | 12 void backchannel_sync_send(uint channel, uint device_nbr) in backchannel_sync_send() argument
16 bs_bc_send_msg(channel, sync_msg, ARRAY_SIZE(sync_msg)); in backchannel_sync_send()
19 void backchannel_sync_wait(uint channel, uint device_nbr) in backchannel_sync_wait() argument
23 LOG_DBG("Wait for %d on channel %d", device_nbr, channel); in backchannel_sync_wait()
26 if (bs_bc_is_msg_received(channel) > 0) { in backchannel_sync_wait()
27 bs_bc_receive_msg(channel, sync_msg, ARRAY_SIZE(sync_msg)); in backchannel_sync_wait()
|
| /Zephyr-latest/tests/bsim/bluetooth/host/security/ccc_update/src/ |
| D | common.c | 12 void backchannel_sync_send(uint channel, uint device_nbr) in backchannel_sync_send() argument
16 bs_bc_send_msg(channel, sync_msg, ARRAY_SIZE(sync_msg)); in backchannel_sync_send()
19 void backchannel_sync_wait(uint channel, uint device_nbr) in backchannel_sync_wait() argument
23 LOG_DBG("Wait for %d on channel %d", device_nbr, channel); in backchannel_sync_wait()
26 if (bs_bc_is_msg_received(channel) > 0) { in backchannel_sync_wait()
27 bs_bc_receive_msg(channel, sync_msg, ARRAY_SIZE(sync_msg)); in backchannel_sync_wait()
|
| /Zephyr-latest/tests/drivers/build_all/adc/boards/ |
| D | native_sim.overlay | 23 #io-channel-cells = <1>;
46 #io-channel-cells = <1>;
53 #io-channel-cells = <1>;
60 #io-channel-cells = <1>;
66 #io-channel-cells = <1>;
73 #io-channel-cells = <1>;
80 #io-channel-cells = <1>;
86 #io-channel-cells = <1>;
92 #io-channel-cells = <1>;
99 #io-channel-cells = <1>;
[all …]
|
| /Zephyr-latest/samples/bluetooth/iso_peripheral/ |
| D | README.rst | 11 … sample starts advertising, waits for a central to connect to it and set up an isochronous channel.
12 Once the isochronous channel is set up, received isochronous data is printed out.
34 2. Observe that the central device connects and sets up an isochronous channel.
42 Incoming data channel 0x20000698 len 1
44 Incoming data channel 0x20000698 len 2
46 Incoming data channel 0x20000698 len 3
48 Incoming data channel 0x20000698 len 4
50 Incoming data channel 0x20000698 len 5
52 Incoming data channel 0x20000698 len 6
54 Incoming data channel 0x20000698 len 7
[all …]
|
| /Zephyr-latest/samples/drivers/mbox_data/ |
| D | README.rst | 75 Client send (on channel 3) value: 0
76 Client received (on channel 2) value: 1
77 Client send (on channel 3) value: 2
78 Client received (on channel 2) value: 3
79 Client send (on channel 3) value: 4
81 Client received (on channel 2) value: 95
82 Client send (on channel 3) value: 96
83 Client received (on channel 2) value: 97
84 Client send (on channel 3) value: 98
85 Client received (on channel 2) value: 99
[all …]
|
| /Zephyr-latest/samples/drivers/adc/adc_dt/boards/ |
| D | s32z2xxdc2_s32z270_rtu0.overlay | 17 group-channel = "precision";
24 channel@2 {
32 channel@3 {
40 channel@4 {
48 channel@5 {
59 group-channel = "standard";
64 channel@3 {
72 channel@4 {
80 channel@5 {
88 channel@6 {
|
| /Zephyr-latest/samples/drivers/mbox/ |
| D | README.rst | 42 Pong (on channel 0)
43 Ping (on channel 1)
44 Pong (on channel 0)
45 Ping (on channel 1)
46 Ping (on channel 1)
47 Pong (on channel 0)
48 Ping (on channel 1)
49 Pong (on channel 0)
50 Ping (on channel 1)
58 Ping (on channel 0)
[all …]
|
