Lines Matching refs:channel
174 uint32_t channel) in dma_mcux_edma_add_channel_gap() argument
179 return (channel < config->channel_gap[0]) ? channel : in dma_mcux_edma_add_channel_gap()
180 (channel + 1 + config->channel_gap[1] - config->channel_gap[0]); in dma_mcux_edma_add_channel_gap()
183 return channel; in dma_mcux_edma_add_channel_gap()
188 uint32_t channel) in dma_mcux_edma_remove_channel_gap() argument
193 return (channel < config->channel_gap[0]) ? channel : in dma_mcux_edma_remove_channel_gap()
194 (channel + config->channel_gap[0] - config->channel_gap[1] - 1); in dma_mcux_edma_remove_channel_gap()
197 return channel; in dma_mcux_edma_remove_channel_gap()
217 uint32_t channel = dma_mcux_edma_remove_channel_gap(data->dev, handle->channel); in nxp_edma_callback() local
230 data->dma_callback(data->dev, data->user_data, channel, ret); in nxp_edma_callback()
233 static void dma_mcux_edma_irq_handler(const struct device *dev, uint32_t channel) in dma_mcux_edma_irq_handler() argument
235 uint32_t hw_channel = dma_mcux_edma_add_channel_gap(dev, channel); in dma_mcux_edma_irq_handler()
241 EDMA_HandleIRQ(DEV_EDMA_HANDLE(dev, channel)); in dma_mcux_edma_irq_handler()
248 EDMA_ClearChannelStatusFlags(DEV_BASE(dev), channel, 0xFFFFFFFF); in dma_mcux_edma_irq_handler()
249 EDMA_AbortTransfer(DEV_EDMA_HANDLE(dev, channel)); in dma_mcux_edma_irq_handler()
250 DEV_CHANNEL_DATA(dev, channel)->busy = false; in dma_mcux_edma_irq_handler()
251 LOG_INF("channel %d error status is 0x%x", channel, flag); in dma_mcux_edma_irq_handler()
281 static int dma_mcux_edma_configure(const struct device *dev, uint32_t channel, in dma_mcux_edma_configure() argument
289 edma_handle_t *p_handle = DEV_EDMA_HANDLE(dev, channel); in dma_mcux_edma_configure()
290 struct call_back *data = DEV_CHANNEL_DATA(dev, channel); in dma_mcux_edma_configure()
304 if (channel >= DEV_CFG(dev)->dma_channels) { in dma_mcux_edma_configure()
305 LOG_ERR("out of DMA channel %d", channel); in dma_mcux_edma_configure()
309 hw_channel = dma_mcux_edma_add_channel_gap(dev, channel); in dma_mcux_edma_configure()
313 dmamux_idx = DEV_DMAMUX_IDX(dev, channel); in dma_mcux_edma_configure()
314 dmamux_channel = DEV_DMAMUX_CHANNEL(dev, channel); in dma_mcux_edma_configure()
398 LOG_DBG("channel is %d", channel); in dma_mcux_edma_configure()
403 memset(&DEV_CFG(dev)->tcdpool[channel][i], 0, in dma_mcux_edma_configure()
404 sizeof(DEV_CFG(dev)->tcdpool[channel][i])); in dma_mcux_edma_configure()
422 &DEV_CFG(dev)->tcdpool[channel][i], &data->transferConfig, in dma_mcux_edma_configure()
423 &DEV_CFG(dev)->tcdpool[channel][(i + 1) % in dma_mcux_edma_configure()
427 EDMA_TcdEnableInterrupts(&DEV_CFG(dev)->tcdpool[channel][i], in dma_mcux_edma_configure()
433 tcd = &(DEV_CFG(dev)->tcdpool[channel] in dma_mcux_edma_configure()
463 &DEV_CFG(dev)->tcdpool[channel][0]); in dma_mcux_edma_configure()
467 EDMA_InstallTCDMemory(p_handle, DEV_CFG(dev)->tcdpool[channel], in dma_mcux_edma_configure()
512 EDMA_SetChannelLink(DEV_BASE(dev), channel, kEDMA_MajorLink, in dma_mcux_edma_configure()
517 EDMA_SetChannelLink(DEV_BASE(dev), channel, kEDMA_MinorLink, in dma_mcux_edma_configure()
523 LOG_DBG("INSTALL call back on channel %d", channel); in dma_mcux_edma_configure()
534 static int dma_mcux_edma_start(const struct device *dev, uint32_t channel) in dma_mcux_edma_start() argument
536 struct call_back *data = DEV_CHANNEL_DATA(dev, channel); in dma_mcux_edma_start()
541 uint8_t dmamux_idx = DEV_DMAMUX_IDX(dev, channel); in dma_mcux_edma_start()
542 uint8_t dmamux_channel = DEV_DMAMUX_CHANNEL(dev, channel); in dma_mcux_edma_start()
551 EDMA_StartTransfer(DEV_EDMA_HANDLE(dev, channel)); in dma_mcux_edma_start()
555 static int dma_mcux_edma_stop(const struct device *dev, uint32_t channel) in dma_mcux_edma_stop() argument
560 hw_channel = dma_mcux_edma_add_channel_gap(dev, channel); in dma_mcux_edma_stop()
562 data->data_cb[channel].transfer_settings.valid = false; in dma_mcux_edma_stop()
564 if (!data->data_cb[channel].busy) { in dma_mcux_edma_stop()
568 EDMA_AbortTransfer(DEV_EDMA_HANDLE(dev, channel)); in dma_mcux_edma_stop()
573 data->data_cb[channel].busy = false; in dma_mcux_edma_stop()
577 static int dma_mcux_edma_suspend(const struct device *dev, uint32_t channel) in dma_mcux_edma_suspend() argument
579 struct call_back *data = DEV_CHANNEL_DATA(dev, channel); in dma_mcux_edma_suspend()
584 EDMA_StopTransfer(DEV_EDMA_HANDLE(dev, channel)); in dma_mcux_edma_suspend()
588 static int dma_mcux_edma_resume(const struct device *dev, uint32_t channel) in dma_mcux_edma_resume() argument
590 struct call_back *data = DEV_CHANNEL_DATA(dev, channel); in dma_mcux_edma_resume()
595 EDMA_StartTransfer(DEV_EDMA_HANDLE(dev, channel)); in dma_mcux_edma_resume()
599 static void dma_mcux_edma_update_hw_tcd(const struct device *dev, uint32_t channel, uint32_t src, in dma_mcux_edma_update_hw_tcd() argument
602 EDMA_HW_TCD_SADDR(dev, channel) = src; in dma_mcux_edma_update_hw_tcd()
603 EDMA_HW_TCD_DADDR(dev, channel) = dst; in dma_mcux_edma_update_hw_tcd()
604 EDMA_HW_TCD_BITER(dev, channel) = size; in dma_mcux_edma_update_hw_tcd()
605 EDMA_HW_TCD_CITER(dev, channel) = size; in dma_mcux_edma_update_hw_tcd()
606 EDMA_HW_TCD_CSR(dev, channel) |= DMA_CSR_DREQ(1U); in dma_mcux_edma_update_hw_tcd()
609 static int dma_mcux_edma_reload(const struct device *dev, uint32_t channel, in dma_mcux_edma_reload() argument
612 struct call_back *data = DEV_CHANNEL_DATA(dev, channel); in dma_mcux_edma_reload()
644 tcd = &(DEV_CFG(dev)->tcdpool[channel][data->transfer_settings.write_idx]); in dma_mcux_edma_reload()
645 pre_tcd = &(DEV_CFG(dev)->tcdpool[channel][pre_idx]); in dma_mcux_edma_reload()
660 EDMA_DisableChannelRequest(DEV_BASE(dev), channel); in dma_mcux_edma_reload()
666 while (EDMA_HW_TCD_CSR(dev, channel) & EDMA_HW_TCD_CH_ACTIVE_MASK) { in dma_mcux_edma_reload()
671 hw_id = EDMA_GetNextTCDAddress(DEV_EDMA_HANDLE(dev, channel)); in dma_mcux_edma_reload()
677 dma_mcux_edma_update_hw_tcd(dev, channel, src, dst, size); in dma_mcux_edma_reload()
691 EDMA_EnableAutoStopRequest(DEV_BASE(dev), channel, false); in dma_mcux_edma_reload()
701 EDMA_ClearChannelStatusFlags(DEV_BASE(dev), channel, kEDMA_DoneFlag); in dma_mcux_edma_reload()
702 EDMA_HW_TCD_CSR(dev, channel) |= DMA_CSR_ESG_MASK; in dma_mcux_edma_reload()
707 EDMA_EnableChannelRequest(DEV_BASE(dev), channel); in dma_mcux_edma_reload()
715 data->transfer_settings.empty_tcds, channel); in dma_mcux_edma_reload()
735 EDMA_SubmitTransfer(DEV_EDMA_HANDLE(dev, channel), &(data->transferConfig)); in dma_mcux_edma_reload()
748 static int dma_mcux_edma_get_status(const struct device *dev, uint32_t channel, in dma_mcux_edma_get_status() argument
751 uint32_t hw_channel = dma_mcux_edma_add_channel_gap(dev, channel); in dma_mcux_edma_get_status()
753 if (DEV_CHANNEL_DATA(dev, channel)->busy) { in dma_mcux_edma_get_status()
760 DEV_CHANNEL_DATA(dev, channel)->transfer_settings.source_data_size; in dma_mcux_edma_get_status()
765 status->dir = DEV_CHANNEL_DATA(dev, channel)->transfer_settings.direction; in dma_mcux_edma_get_status()
768 uint8_t dmamux_idx = DEV_DMAMUX_IDX(dev, channel); in dma_mcux_edma_get_status()
769 uint8_t dmamux_channel = DEV_DMAMUX_CHANNEL(dev, channel); in dma_mcux_edma_get_status()