| /Zephyr-latest/drivers/dac/ |
| D | dac_mcux_gau.c | 19 DAC_Type *base; member
65 DAC_SetChannelConfig(config->base, in nxp_gau_dac_channel_setup()
77 DAC_SetChannelData(config->base, in nxp_gau_dac_write_value()
99 DAC_Init(config->base, &dac_cfg); in nxp_gau_dac_init()
107 .base = (DAC_Type *) DT_INST_REG_ADDR(inst), \
|
| /Zephyr-latest/drivers/dma/ |
| D | dma_mcux_smartdma.c | 23 SMARTDMA_Type *base; member
58 dev_config->base->ARM2EZH = (uint32_t)config->head_block; in dma_mcux_smartdma_configure()
60 dev_config->base->BOOTADR = (uint32_t)dev_config->smartdma_progs[prog_idx]; in dma_mcux_smartdma_configure()
61 LOG_DBG("Boot address set to 0x%X", dev_config->base->BOOTADR); in dma_mcux_smartdma_configure()
73 config->base->CTRL = SMARTDMA_MAGIC | SMARTDMA_BOOT; in dma_mcux_smartdma_start()
149 .base = (SMARTDMA_Type *)DT_INST_REG_ADDR(n), \
|
| /Zephyr-latest/kernel/include/ |
| D | kswap.h | 99 arch_current_thread()->base.thread_state & (_THREAD_DUMMY | _THREAD_DEAD), in do_swap()
128 new_thread->base.cpu = arch_curr_cpu()->id; in do_swap()
240 dummy_thread->base.thread_state = _THREAD_DUMMY; in z_dummy_thread_init()
242 dummy_thread->base.cpu_mask = -1; in z_dummy_thread_init()
244 dummy_thread->base.user_options = K_ESSENTIAL; in z_dummy_thread_init()
259 dummy_thread->base.slice_ticks = 0; in z_dummy_thread_init()
|
| /Zephyr-latest/kernel/ |
| D | smp.c | 61 if (!arch_current_thread()->base.global_lock_count) { in z_smp_global_lock()
67 arch_current_thread()->base.global_lock_count++; in z_smp_global_lock()
74 if (arch_current_thread()->base.global_lock_count != 0U) { in z_smp_global_unlock()
75 arch_current_thread()->base.global_lock_count--; in z_smp_global_unlock()
77 if (!arch_current_thread()->base.global_lock_count) { in z_smp_global_unlock()
88 if (!thread->base.global_lock_count) { in z_smp_release_global_lock()
|
| D | mutex.c | 93 if (mutex->owner->base.prio != new_prio) { in adjust_owner_prio()
98 new_prio, mutex->owner->base.prio); in adjust_owner_prio()
120 arch_current_thread()->base.prio : in z_impl_k_mutex_lock()
147 new_prio = new_prio_for_inheritance(arch_current_thread()->base.prio, in z_impl_k_mutex_lock()
148 mutex->owner->base.prio); in z_impl_k_mutex_lock()
152 if (z_is_prio_higher(new_prio, mutex->owner->base.prio)) { in z_impl_k_mutex_lock()
182 new_prio_for_inheritance(waiter->base.prio, mutex->owner_orig_prio) : in z_impl_k_mutex_lock()
262 mutex, new_owner, new_owner ? new_owner->base.prio : -1000); in z_impl_k_mutex_unlock()
270 mutex->owner_orig_prio = new_owner->base.prio; in z_impl_k_mutex_unlock()
|
| /Zephyr-latest/arch/arc/core/mpu/ |
| D | arc_mpu_common_internal.h | 24 static inline int _mpu_configure(uint8_t type, uint32_t base, uint32_t size) in _mpu_configure() argument
29 LOG_DBG("Region info: 0x%x 0x%x", base, size); in _mpu_configure()
39 _region_init(region_index, base, size, region_attr); in _mpu_configure()
75 if (thread->base.user_options & K_USER) { in arc_core_mpu_configure_thread()
111 int arc_core_mpu_region(uint32_t index, uint32_t base, uint32_t size, uint32_t region_attr) in arc_core_mpu_region() argument
119 _region_init(index, base, size, region_attr); in arc_core_mpu_region()
270 _region_init(r_index, mpu_config.mpu_regions[i].base, in arc_mpu_init()
|
| /Zephyr-latest/drivers/spi/ |
| D | spi_mcux_ecspi.c | 24 ECSPI_Type *base; member
58 ECSPI_Type *base = config->base; in spi_mcux_transfer_next_packet() local
98 status = ECSPI_MasterTransferNonBlocking(base, &data->handle, &transfer); in spi_mcux_transfer_next_packet()
110 ECSPI_Type *base = config->base; in spi_mcux_isr() local
112 ECSPI_MasterTransferHandleIRQ(base, &data->handle); in spi_mcux_isr()
115 static void spi_mcux_master_transfer_callback(ECSPI_Type *base, ecspi_master_handle_t *handle, in spi_mcux_master_transfer_callback() argument
146 ECSPI_Type *base = config->base; in spi_mcux_configure() local
209 ECSPI_MasterInit(base, &master_config, clock_freq); in spi_mcux_configure()
210 ECSPI_MasterTransferCreateHandle(base, &data->handle, in spi_mcux_configure()
321 .base = (ECSPI_Type *) DT_INST_REG_ADDR(n), \
|
| D | spi_opentitan.c | 71 uint32_t base; member
125 sys_write32(reg, cfg->base + SPI_HOST_CONFIGOPTS_REG_OFFSET); in spi_config()
133 return !(sys_read32(cfg->base + SPI_HOST_STATUS_REG_OFFSET) & SPI_HOST_STATUS_RXEMPTY_BIT); in spi_opentitan_rx_available()
169 sys_write32(fifo_word, cfg->base + SPI_HOST_TXDATA_REG_OFFSET); in spi_opentitan_xfer()
183 sys_write32(host_command_reg, cfg->base + SPI_HOST_COMMAND_REG_OFFSET); in spi_opentitan_xfer()
192 uint32_t rx_word = sys_read32(cfg->base + in spi_opentitan_xfer()
221 cfg->base + SPI_HOST_CONTROL_REG_OFFSET); in spi_opentitan_init()
222 while (sys_read32(cfg->base + SPI_HOST_STATUS_REG_OFFSET) in spi_opentitan_init()
229 cfg->base + SPI_HOST_CONTROL_REG_OFFSET); in spi_opentitan_init()
323 .base = DT_INST_REG_ADDR(n), \
|
| /Zephyr-latest/subsys/bluetooth/audio/ |
| D | bap_base.c | 108 const struct bt_bap_base *base; in bt_bap_base_get_base_from_ad() local
147 base = (const struct bt_bap_base *)net_buf.data; in bt_bap_base_get_base_from_ad()
221 return base; in bt_bap_base_get_base_from_ad()
224 int bt_bap_base_get_size(const struct bt_bap_base *base) in bt_bap_base_get_size() argument
230 CHECKIF(base == NULL) { in bt_bap_base_get_size()
236 net_buf_simple_init_with_data(&net_buf, (void *)base, BASE_MAX_SIZE); in bt_bap_base_get_size()
276 int bt_bap_base_get_pres_delay(const struct bt_bap_base *base) in bt_bap_base_get_pres_delay() argument
281 CHECKIF(base == NULL) { in bt_bap_base_get_pres_delay()
287 net_buf_simple_init_with_data(&net_buf, (void *)base, sizeof(pd)); in bt_bap_base_get_pres_delay()
293 int bt_bap_base_get_subgroup_count(const struct bt_bap_base *base) in bt_bap_base_get_subgroup_count() argument
[all …]
|
| /Zephyr-latest/drivers/adc/ |
| D | adc_mcux_lpadc.c | 39 ADC_Type *base; member
330 LPADC_SetConvCommandConfig(config->base, in mcux_lpadc_start_read()
380 LPADC_SetConvTriggerConfig(config->base, 0, &trigger_config); in mcux_lpadc_start_channel()
383 LPADC_DoSoftwareTrigger(config->base, 1); in mcux_lpadc_start_channel()
412 ADC_Type *base = config->base; local
421 LPADC_GetConvResult(base, &conv_result, 0U);
423 LPADC_GetConvResult(base, &conv_result);
476 ADC_Type *base = config->base; local
509 LPADC_Init(base, &adc_config);
519 LPADC_DoOffsetCalibration(base);
[all …]
|
| /Zephyr-latest/drivers/i2c/ |
| D | i2c_rv32m1_lpi2c.c | 26 LPI2C_Type *base; member
92 LPI2C_MasterSetBaudRate(config->base, clk_freq, baudrate); in rv32m1_lpi2c_configure()
97 static void rv32m1_lpi2c_master_transfer_callback(LPI2C_Type *base, in rv32m1_lpi2c_master_transfer_callback() argument
104 ARG_UNUSED(base); in rv32m1_lpi2c_master_transfer_callback()
164 status = LPI2C_MasterTransferNonBlocking(config->base, in rv32m1_lpi2c_transfer()
186 LPI2C_MasterTransferAbort(config->base, &data->handle); in rv32m1_lpi2c_transfer()
205 LPI2C_MasterTransferHandleIRQ(config->base, &data->handle); in rv32m1_lpi2c_isr()
236 LPI2C_MasterInit(config->base, &master_config, clk_freq); in rv32m1_lpi2c_init()
237 LPI2C_MasterTransferCreateHandle(config->base, &data->handle, in rv32m1_lpi2c_init()
270 .base = \
|
| D | i2c_lpc11u6x.c | 15 #define DEV_BASE(dev) (((struct lpc11u6x_i2c_config *)(dev->config))->base)
27 cfg->base->sclh = div / 2; in lpc11u6x_i2c_set_bus_speed()
28 cfg->base->scll = div - (div / 2); in lpc11u6x_i2c_set_bus_speed()
95 cfg->base->con_clr = LPC11U6X_I2C_CONTROL_SI | in lpc11u6x_i2c_transfer()
100 cfg->base->con_set = LPC11U6X_I2C_CONTROL_START; in lpc11u6x_i2c_transfer()
111 cfg->base->con_set = LPC11U6X_I2C_CONTROL_AA; in lpc11u6x_i2c_transfer()
141 dev_cfg->base->addr0 = (cfg->address << 1); in lpc11u6x_i2c_slave_register()
142 dev_cfg->base->con_clr = LPC11U6X_I2C_CONTROL_START | in lpc11u6x_i2c_slave_register()
144 dev_cfg->base->con_set = LPC11U6X_I2C_CONTROL_AA; in lpc11u6x_i2c_slave_register()
167 dev_cfg->base->con_clr = LPC11U6X_I2C_CONTROL_AA; in lpc11u6x_i2c_slave_unregister()
[all …]
|
| /Zephyr-latest/drivers/entropy/ |
| D | entropy_mcux_caam.c | 18 CAAM_Type *base; member
57 config->base, &handle, kCAAM_RngStateHandle0, in entropy_mcux_caam_get_entropy()
74 .base = (CAAM_Type *)DT_INST_REG_ADDR(0)
86 status = CAAM_Init(config->base, &conf); in entropy_mcux_caam_init()
|
| /Zephyr-latest/drivers/pwm/ |
| D | pwm_rv32m1_tpm.c | 27 TPM_Type *base; member
98 TPM_StopTimer(config->base); in rv32m1_tpm_set_cycles()
100 status = TPM_SetupPwm(config->base, data->channel, in rv32m1_tpm_set_cycles()
108 TPM_StartTimer(config->base, config->tpm_clock_source); in rv32m1_tpm_set_cycles()
110 TPM_UpdateChnlEdgeLevelSelect(config->base, channel, in rv32m1_tpm_set_cycles()
112 TPM_UpdatePwmDutycycle(config->base, channel, config->mode, in rv32m1_tpm_set_cycles()
176 TPM_Init(config->base, &tpm_config); in rv32m1_tpm_init()
189 .base = (TPM_Type *) \
|
| /Zephyr-latest/drivers/clock_control/ |
| D | clock_control_gd32.c | 40 uint32_t base; member
76 sys_set_bit(config->base + GD32_CLOCK_ID_OFFSET(id), in clock_control_gd32_on()
88 sys_clear_bit(config->base + GD32_CLOCK_ID_OFFSET(id), in clock_control_gd32_off()
103 cfg = sys_read32(config->base + RCU_CFG0_OFFSET); in clock_control_gd32_get_rate()
141 uint32_t cfg1 = sys_read32(config->base + RCU_CFG1_OFFSET); in clock_control_gd32_get_rate()
193 if (sys_test_bit(config->base + GD32_CLOCK_ID_OFFSET(id), in clock_control_gd32_get_status()
209 .base = DT_REG_ADDR(DT_INST_PARENT(0)),
|
| /Zephyr-latest/drivers/usb/udc/ |
| D | udc_rpi_pico.c | 26 usb_hw_t *base; member
86 usb_hw_t *base = config->base; in sie_status_clr() local
88 rpi_pico_bit_clr((mm_reg_t)&base->sie_status, bit); in sie_status_clr()
167 usb_hw_t *base = config->base; in rpi_pico_ep_cancel() local
168 mm_reg_t abort_done_reg = (mm_reg_t)&base->abort_done; in rpi_pico_ep_cancel()
169 mm_reg_t abort_reg = (mm_reg_t)&base->abort; in rpi_pico_ep_cancel()
565 usb_hw_t *base = config->base; in rpi_pico_handle_buff_status() local
569 buf_status = sys_read32((mm_reg_t)&base->buf_status); in rpi_pico_handle_buff_status()
585 rpi_pico_bit_clr((mm_reg_t)&base->buf_status, BIT(i)); in rpi_pico_handle_buff_status()
594 usb_hw_t *base = config->base; in rpi_pico_isr_handler() local
[all …]
|
| /Zephyr-latest/include/zephyr/arch/nios2/ |
| D | nios2.h | 160 #define z_nios2_get_register_address(base, regnum) \ argument
161 ((void *)(((uint8_t *)base) + ((regnum) * (SYSTEM_BUS_WIDTH / 8))))
163 static inline void _nios2_reg_write(void *base, int regnum, uint32_t data) in _nios2_reg_write() argument
166 (mm_reg_t)z_nios2_get_register_address(base, regnum)); in _nios2_reg_write()
169 static inline uint32_t _nios2_reg_read(void *base, int regnum) in _nios2_reg_read() argument
171 return sys_read32((mm_reg_t)z_nios2_get_register_address(base, regnum)); in _nios2_reg_read()
|
| /Zephyr-latest/samples/sensor/fdc2x1x/src/ |
| D | main.c | 70 enum sensor_channel base; in main() local
119 base = SENSOR_CHAN_FDC2X1X_FREQ_CH0; in main()
121 sensor_channel_get(dev, base++, &ch_buf[i]); in main()
126 base = SENSOR_CHAN_FDC2X1X_CAPACITANCE_CH0; in main()
128 sensor_channel_get(dev, base++, &ch_buf[i]); in main()
|
| /Zephyr-latest/drivers/gpio/ |
| D | gpio_xlnx_axi.c | 39 mm_reg_t base; member
69 return sys_read32(config->base + (config->channel * GPIO2_OFFSET) + GPIO_DATA_OFFSET); in gpio_xlnx_axi_read_data()
76 sys_write32(val, config->base + (config->channel * GPIO2_OFFSET) + GPIO_DATA_OFFSET); in gpio_xlnx_axi_write_data()
83 sys_write32(val, config->base + (config->channel * GPIO2_OFFSET) + GPIO_TRI_OFFSET); in gpio_xlnx_axi_write_tri()
243 enabled_interrupts = sys_read32(config->base + IPIER_OFFSET); in gpio_xlnx_axi_pin_interrupt_configure()
249 if (sys_read32(config->base + IPISR_OFFSET) & chan_mask) { in gpio_xlnx_axi_pin_interrupt_configure()
250 sys_write32(chan_mask, config->base + IPISR_OFFSET); in gpio_xlnx_axi_pin_interrupt_configure()
259 sys_write32(enabled_interrupts, config->base + IPIER_OFFSET); in gpio_xlnx_axi_pin_interrupt_configure()
297 interrupt_flags = sys_read32(config->base + IPISR_OFFSET); in gpio_xlnx_axi_get_pending_int()
305 sys_write32(chan_mask, config->base + IPISR_OFFSET); in gpio_xlnx_axi_get_pending_int()
[all …]
|
| /Zephyr-latest/drivers/interrupt_controller/ |
| D | intc_gicv3_its.c | 43 mm_reg_t base; member
82 uint32_t reg = sys_read32(data->base + GITS_CTLR); in its_force_quiescent()
87 sys_write32(reg, data->base + GITS_CTLR); in its_force_quiescent()
101 reg = sys_read32(data->base + GITS_CTLR); in its_force_quiescent()
118 uint64_t reg = sys_read64(data->base + GITS_BASER(i)); in its_probe_baser_page_size()
123 sys_write64(reg, data->base + GITS_BASER(i)); in its_probe_baser_page_size()
125 reg = sys_read64(data->base + GITS_BASER(i)); in its_probe_baser_page_size()
152 unsigned int device_ids = GITS_TYPER_DEVBITS_GET(sys_read64(data->base + GITS_TYPER)) + 1; in its_alloc_tables()
156 uint64_t reg = sys_read64(data->base + GITS_BASER(i)); in its_alloc_tables()
239 sys_write64(reg, data->base + GITS_BASER(i)); in its_alloc_tables()
[all …]
|
| /Zephyr-latest/drivers/mipi_dsi/ |
| D | dsi_mcux_2l.c | 31 MIPI_DSI_HOST_Type *base; member
79 DSI_DisableInterrupts(config->base, kDSI_InterruptGroup1ApbTxDone | in dsi_mcux_dma_cb()
81 DSI_GetAndClearInterruptStatus(config->base, &int_flags1, &int_flags2); in dsi_mcux_dma_cb()
130 DSI_EnableInterrupts(config->base, kDSI_InterruptGroup1ApbTxDone | in dsi_mcux_tx_color()
146 static void dsi_transfer_complete(MIPI_DSI_HOST_Type *base, in dsi_transfer_complete() argument
194 status = DSI_TransferNonBlocking(config->base, in dsi_mcux_tx_color()
211 DSI_TransferHandleIRQ(config->base, &data->mipi_handle); in mipi_dsi_isr()
237 DSI_Init(config->base, &dsi_config); in dsi_mcux_attach()
283 if (DSI_TransferCreateHandle(config->base, &data->mipi_handle, in dsi_mcux_attach()
337 dphy_bit_clk_freq = DSI_InitDphy(config->base, in dsi_mcux_attach()
[all …]
|
| /Zephyr-latest/drivers/led_strip/ |
| D | ws2812_gpio.c | 57 #define ONE_BIT(base, pin) do { \ argument
63 [r] "l" (base), \
67 #define ZERO_BIT(base, pin) do { \ argument
73 [r] "l" (base), \
79 volatile uint32_t *base = (uint32_t *)&NRF_GPIO->OUTSET; in send_buf() local
116 ONE_BIT(base, val); in send_buf()
118 ZERO_BIT(base, val); in send_buf()
|
| /Zephyr-latest/soc/snps/emsdp/ |
| D | linker.ld | 14 * SRAM base address and size
24 /* Instruction Closely Coupled Memory (ICCM) base address and size */
32 * DCCM base address and size. DCCM is the data memory.
34 /* Data Closely Coupled Memory (DCCM) base address and size */
|
| /Zephyr-latest/drivers/bbram/ |
| D | bbram_xec.c | 20 uint8_t *base; member
57 bytecpy(data, dcfg->base + offset, size); in bbram_xec_read()
71 bytecpy(dcfg->base + offset, data, size); in bbram_xec_write()
84 .base = (uint8_t *)(DT_INST_REG_ADDR(inst)), \
|
| /Zephyr-latest/drivers/comparator/ |
| D | comparator_mcux_acmp.c | 210 CMP_Type *base; member
295 status = ACMP_GetStatusFlags(config->base); in mcux_acmp_get_output()
305 ACMP_DisableInterrupts(config->base, UINT32_MAX); in mcux_acmp_set_trigger()
327 ACMP_EnableInterrupts(config->base, data->interrupt_mask); in mcux_acmp_set_trigger()
340 ACMP_DisableInterrupts(config->base, UINT32_MAX); in mcux_acmp_set_trigger_callback()
350 ACMP_EnableInterrupts(config->base, data->interrupt_mask); in mcux_acmp_set_trigger_callback()
362 status_flags = ACMP_GetStatusFlags(config->base); in mcux_acmp_trigger_is_pending()
363 ACMP_ClearStatusFlags(config->base, UINT32_MAX); in mcux_acmp_trigger_is_pending()
404 ACMP_Init(dev_config->base, &acmp_config); in comp_mcux_acmp_init_mode_config()
415 ACMP_Enable(dev_config->base, true); in comp_mcux_acmp_set_mode_config()
[all …]
|
