Searched +full:slow +full:- +full:clock +full:- +full:div (Results 1 – 11 of 11) sorted by relevance
/Zephyr-latest/tests/drivers/spi/spi_loopback/boards/ |
D | nucleo_h723zg.overlay | 4 * SPDX-License-Identifier: Apache-2.0 7 /* Set div-q to get test clk freq into acceptable SPI freq range */ 9 /delete-property/ div-q; 10 div-q = <8>; 13 /* Define PLL1_Q as SPI1 kernel clock source */ 15 /delete-property/ clocks; 18 slow@0 { 19 compatible = "test-spi-loopback-slow"; 21 spi-max-frequency = <500000>; 24 compatible = "test-spi-loopback-fast"; [all …]
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/Zephyr-latest/tests/drivers/pwm/pwm_loopback/boards/ |
D | frdm_ke17z.overlay | 4 * SPDX-License-Identifier: Apache-2.0 12 drive-strength = "low"; 13 slew-rate = "slow"; 20 drive-strength = "low"; 21 slew-rate = "slow"; 27 * PTB14(J3-11) ---> PTE11(J2-2) 32 compatible = "test-pwm-loopback"; 40 compatible = "nxp,ftm-pwm"; 43 #pwm-cells = <3>; 44 pinctrl-0 = <&ftm0_default>; [all …]
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D | frdm_ke17z512.overlay | 4 * SPDX-License-Identifier: Apache-2.0 12 drive-strength = "low"; 13 slew-rate = "slow"; 20 drive-strength = "low"; 21 slew-rate = "slow"; 27 * PTB14(J3-11) ---> PTE11(J2-11) 32 compatible = "test-pwm-loopback"; 40 compatible = "nxp,ftm-pwm"; 43 #pwm-cells = <3>; 44 pinctrl-0 = <&ftm0_default>; [all …]
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/Zephyr-latest/dts/bindings/clock/ |
D | microchip,xec-pcr.yaml | 2 # SPDX-License-Identifier: Apache-2.0 4 description: Microchip XEC Power Clock Reset and VBAT register (PCR) 6 compatible: "microchip,xec-pcr" 8 include: [clock-controller.yaml, pinctrl-device.yaml, base.yaml] 14 core-clock-div: 17 description: Divide 96 MHz PLL clock to produce Cortex-M4 core clock 19 slow-clock-div: 22 PWM and TACH clock domain divided down from 48 MHz AHB clock. The 25 pll-32k-src: 28 description: 32 KHz clock source for PLL [all …]
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/Zephyr-latest/soc/atmel/sam/common/ |
D | soc_gpio.h | 2 * Copyright (c) 2016-2017 Piotr Mienkowski 4 * SPDX-License-Identifier: Apache-2.0 101 * - configure pin(s) as input with debounce filter enabled. 102 * - connect pin(s) to a peripheral B and enable pull-up. 103 * - configure pin(s) as open drain output. 106 * @remark The function will enable the GPIO module's clock only if 108 * a user wants. A pin will function correctly without clock enabled 111 * a pull-up and user wants to read pin's input value it is necessary 112 * to enable GPIO module's clock separately. 143 pin->regs->OVRS = pin->mask; in soc_gpio_set() [all …]
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/Zephyr-latest/drivers/clock_control/ |
D | clock_stm32_ll_wb0.c | 4 * SPDX-License-Identifier: Apache-2.0 43 # error slow-clock source is not enabled 53 # error Invalid device selected as slow-clock 66 "clksys-prescaler cannot be 64 when SYSCLK source is Direct HSE"); 69 /* Check clock configuration allows MR_BLE IP to work. 78 "System clock frequency must be at least 32MHz to use LSI"); 80 /* In PLL or Direct HSE mode, the clock is stable, so 16MHz can be used. */ 82 "System clock frequency must be at least 16MHz to use LSI"); 108 * NOTE: (size - 1) is required to get the correct count, in measure_lsi_frequency() 113 (CONFIG_STM32WB0_LSI_MEASUREMENT_WINDOW - 1)); in measure_lsi_frequency() [all …]
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/Zephyr-latest/dts/bindings/pinctrl/ |
D | nxp,lpc-iocon-pinctrl.yaml | 2 # SPDX-License-Identifier: Apache-2.0 16 slew-rate = "standard"; 24 IOCON_SLEW=<slew-rate selection>, 38 drive-open-drain: IOCON_OD=1 39 bias-pull-up: IOCON_MODE=2 40 bias-pull-down: IOCON_MODE=1 41 drive-push-pull: IOCON_MODE=3 44 IOCON_HYS- set by input-schmitt-enable 45 IOCON_S_MODE- set by nxp,digital-filter 46 IOCON_CLKDIV- set by nxp,filter-clock-div [all …]
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/Zephyr-latest/dts/arm/nxp/ |
D | nxp_kw2xd.dtsi | 1 /* SPDX-License-Identifier: Apache-2.0 */ 4 #include <arm/armv7-m.dtsi> 5 #include <zephyr/dt-bindings/adc/adc.h> 6 #include <zephyr/dt-bindings/clock/kinetis_sim.h> 7 #include <zephyr/dt-bindings/clock/kinetis_mcg.h> 8 #include <zephyr/dt-bindings/gpio/gpio.h> 9 #include <zephyr/dt-bindings/i2c/i2c.h> 12 #include <nxp/kinetis/MKW24D512VHA5-pinctrl.h> 21 zephyr,flash-controller = &ftfl; 25 #address-cells = <1>; [all …]
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/Zephyr-latest/drivers/entropy/ |
D | entropy_stm32.c | 7 * SPDX-License-Identifier: Apache-2.0 44 * - simple rng without hardware fifo and no DMA. 45 * - Variable delay between two consecutive random numbers 46 * (depending on family and clock settings) 74 (CONFIG_ENTROPY_STM32_ISR_POOL_SIZE - 1)) == 0, 78 (CONFIG_ENTROPY_STM32_THR_POOL_SIZE - 1)) == 0, 87 const struct device *clock; member 110 struct entropy_stm32_rng_dev_data *dev_data = dev->data; in entropy_stm32_suspend() 111 const struct entropy_stm32_rng_dev_cfg *dev_cfg = dev->config; in entropy_stm32_suspend() 112 RNG_TypeDef *rng = dev_data->rng; in entropy_stm32_suspend() [all …]
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/Zephyr-latest/doc/releases/ |
D | release-notes-2.5.rst | 27 * CVE-2021-3323: Under embargo until 2021-04-14 28 * CVE-2021-3321: Under embargo until 2021-04-14 29 * CVE-2021-3320: Under embargo until 2021-04-14 39 <https://github.com/zephyrproject-rtos/zephyr/issues?q=is%3Aissue+is%3Aopen+label%3Abug>`_. 56 * Changed vcnl4040 dts binding default for property 'proximity-trigger'. 63 * The :c:func:`mqtt_keepalive_time_left` function now returns -1 if keep alive 67 timeout usage must use the new-style k_timeout_t type and not the 87 GPIO-only regulators a devicetree property ``supply-gpios`` is defined as a 101 * ARM Musca-A board and SoC support deprecated and planned to be removed in 2.6.0. 146 sys_heap/k_heaps. Note that the new-style heap is a general [all …]
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D | release-notes-3.2.rst | 13 * Added support for :ref:`bin-blobs` (also see :ref:`west-blobs`). 15 * Converted all supported boards from ``pinmux`` to :ref:`pinctrl-guide`. 31 * CVE-2022-2993: Under embargo until 2022-11-03 33 * CVE-2022-2741: Under embargo until 2022-10-14 56 This definition can be used by third-party code to compile code conditional 58 Therefore, any third-party code integrated using the Zephyr build system will 91 changed from ``-ENETDOWN`` to ``-ENETUNREACH``. A return value of ``-ENETDOWN`` now indicates 129 * Removed support for configuring the CAN-FD maximum DLC value via Kconfig 151 * STM32 LPTIM domain clock should now be configured using devicetree. 156 valid for specific bindings to specify like :dtcompatible:`gpio-leds` and [all …]
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