Home
last modified time | relevance | path

Searched +full:pincfg +full:- +full:node (Results 1 – 25 of 89) sorted by relevance

1234

/Zephyr-latest/soc/silabs/common/
Dpinctrl_soc.h4 * SPDX-License-Identifier: Apache-2.0
20 #include <zephyr/dt-bindings/pinctrl/silabs-pinctrl-dbus.h>
22 #include <zephyr/dt-bindings/pinctrl/gecko-pinctrl-s1.h>
24 #include <zephyr/dt-bindings/pinctrl/gecko-pinctrl.h>
46 #define Z_PINCTRL_SILABS_MODE_INIT(node) \ argument
47 (DT_PROP(node, drive_push_pull) ? (4 + DT_PROP(node, silabs_alternate_port_control)) \
48 : DT_PROP(node, drive_open_source) ? (6 + DT_PROP(node, bias_pull_down)) \
49 : DT_PROP(node, drive_open_drain) \
50 ? (8 + DT_PROP(node, silabs_input_filter) + 2 * DT_PROP(node, bias_pull_up) + \
51 4 * DT_PROP(node, silabs_alternate_port_control)) \
[all …]
/Zephyr-latest/soc/nordic/common/
Dpinctrl_soc.h4 * SPDX-License-Identifier: Apache-2.0
16 #include <zephyr/dt-bindings/pinctrl/nrf-pinctrl.h>
17 #include <zephyr/dt-bindings/power/nordic-nrf-gpd.h>
32 * @param node_id Node identifier.
35 * @param p_node_id Parent node identifier.
47 * @param node_id Node identifier.
50 * @param p_node_id Parent node identifier.
62 * @param p_node_id Parent node identifier.
72 * @param node_id Node identifier.
75 * @param p_node_id Parent node identifier.
[all …]
/Zephyr-latest/soc/infineon/cat1a/psoc6_legacy/
Dpinctrl_soc.h2 * Copyright (c) 2016-2017 Piotr Mienkowski
7 * SPDX-License-Identifier: Apache-2.0
50 /* Push-Pull means Strong, see dts/pinctrl/pincfg-node.yaml */
54 /* Input-Enable means Input-Buffer, see dts/pinctrl/pincfg-node.yaml */
65 * [0..7] - Port nunder
66 * [8..15] - Pin number
67 * [16..23]- HSIOM function
72 uint32_t pincfg; member
81 * @param node_id Node identifier.
86 * @brief Utility macro to initialize pincfg field in #pinctrl_pin_t.
[all …]
/Zephyr-latest/soc/adi/max32/common/
Dpinctrl_soc.h2 * Copyright (c) 2023-2024 Analog Devices, Inc.
4 * SPDX-License-Identifier: Apache-2.0
13 #include <zephyr/dt-bindings/pinctrl/max32-pinctrl.h>
21 uint32_t pincfg; member
26 #define Z_PINCTRL_MAX32_PINCFG_INIT(node) \ argument
27 ((DT_PROP_OR(node, input_enable, 0) << MAX32_INPUT_ENABLE_SHIFT) | \
28 (DT_PROP_OR(node, output_enable, 0) << MAX32_OUTPUT_ENABLE_SHIFT) | \
29 (DT_PROP_OR(node, bias_pull_up, 0) << MAX32_BIAS_PULL_UP_SHIFT) | \
30 (DT_PROP_OR(node, bias_pull_down, 0) << MAX32_BIAS_PULL_DOWN_SHIFT) | \
31 (DT_PROP_OR(node, power_source, 0) << MAX32_POWER_SOURCE_SHIFT) | \
[all …]
/Zephyr-latest/soc/espressif/esp32/
Dpinctrl_soc.h4 * SPDX-License-Identifier: Apache-2.0
18 #include <zephyr/dt-bindings/pinctrl/esp-pinctrl-common.h>
26 /** Pincfg settings (bias). */
27 uint32_t pincfg; member
33 * @param node_id Node identifier.
38 * @brief Utility macro to initialize pincfg field in #pinctrl_pin_t.
40 * @param node_id Node identifier.
56 * @param node_id Node identifier.
62 .pincfg = Z_PINCTRL_ESP32_PINCFG_INIT(node_id)},
67 * @param node_id Node identifier.
/Zephyr-latest/soc/espressif/esp32c2/
Dpinctrl_soc.h4 * SPDX-License-Identifier: Apache-2.0
18 #include <zephyr/dt-bindings/pinctrl/esp-pinctrl-common.h>
26 /** Pincfg settings (bias). */
27 uint32_t pincfg; member
33 * @param node_id Node identifier.
38 * @brief Utility macro to initialize pincfg field in #pinctrl_pin_t.
40 * @param node_id Node identifier.
56 * @param node_id Node identifier.
62 .pincfg = Z_PINCTRL_ESP32_PINCFG_INIT(node_id)},
67 * @param node_id Node identifier.
/Zephyr-latest/soc/espressif/esp32c3/
Dpinctrl_soc.h4 * SPDX-License-Identifier: Apache-2.0
18 #include <zephyr/dt-bindings/pinctrl/esp-pinctrl-common.h>
26 /** Pincfg settings (bias). */
27 uint32_t pincfg; member
33 * @param node_id Node identifier.
38 * @brief Utility macro to initialize pincfg field in #pinctrl_pin_t.
40 * @param node_id Node identifier.
56 * @param node_id Node identifier.
62 .pincfg = Z_PINCTRL_ESP32_PINCFG_INIT(node_id)},
67 * @param node_id Node identifier.
/Zephyr-latest/soc/espressif/esp32c6/
Dpinctrl_soc.h4 * SPDX-License-Identifier: Apache-2.0
18 #include <zephyr/dt-bindings/pinctrl/esp-pinctrl-common.h>
26 /** Pincfg settings (bias). */
27 uint32_t pincfg; member
33 * @param node_id Node identifier.
39 * @brief Utility macro to initialize pincfg field in #pinctrl_pin_t.
41 * @param node_id Node identifier.
57 * @param node_id Node identifier.
63 .pincfg = Z_PINCTRL_ESP32_PINCFG_INIT(node_id) },
68 * @param node_id Node identifier.
/Zephyr-latest/soc/espressif/esp32s2/
Dpinctrl_soc.h4 * SPDX-License-Identifier: Apache-2.0
18 #include <zephyr/dt-bindings/pinctrl/esp-pinctrl-common.h>
26 /** Pincfg settings (bias). */
27 uint32_t pincfg; member
33 * @param node_id Node identifier.
38 * @brief Utility macro to initialize pincfg field in #pinctrl_pin_t.
40 * @param node_id Node identifier.
56 * @param node_id Node identifier.
62 .pincfg = Z_PINCTRL_ESP32_PINCFG_INIT(node_id)},
67 * @param node_id Node identifier.
/Zephyr-latest/soc/espressif/esp32s3/
Dpinctrl_soc.h4 * SPDX-License-Identifier: Apache-2.0
18 #include <zephyr/dt-bindings/pinctrl/esp-pinctrl-common.h>
26 /** Pincfg settings (bias). */
27 uint32_t pincfg; member
35 * @param node_id Node identifier.
40 * @brief Utility macro to initialize pincfg field in #pinctrl_pin_t.
42 * @param node_id Node identifier.
58 * @param node_id Node identifier.
64 .pincfg = Z_PINCTRL_ESP32_PINCFG_INIT(node_id)},
69 * @param node_id Node identifier.
/Zephyr-latest/soc/infineon/cat1a/common/
Dpinctrl_soc.h2 * Copyright (c) 2016-2017 Piotr Mienkowski
7 * SPDX-License-Identifier: Apache-2.0
54 /* Push-Pull means Strong, see dts/pinctrl/pincfg-node.yaml */
58 /* Input-Enable means Input-Buffer, see dts/pinctrl/pincfg-node.yaml */
69 * [0..7] - Port nunder
70 * [8..15] - Pin number
71 * [16..23]- HSIOM function
76 uint32_t pincfg; member
88 * @param node_id Node identifier.
93 * @brief Utility macro to initialize pincfg field in #pinctrl_pin_t.
[all …]
/Zephyr-latest/soc/infineon/cat1b/common/
Dpinctrl_soc.h2 * Copyright (c) 2016-2017 Piotr Mienkowski
7 * SPDX-License-Identifier: Apache-2.0
54 /* Push-Pull means Strong, see dts/pinctrl/pincfg-node.yaml */
58 /* Input-Enable means Input-Buffer, see dts/pinctrl/pincfg-node.yaml */
69 * [0..7] - Port nunder
70 * [8..15] - Pin number
71 * [16..23]- HSIOM function
76 uint32_t pincfg; member
88 * @param node_id Node identifier.
93 * @brief Utility macro to initialize pincfg field in #pinctrl_pin_t.
[all …]
/Zephyr-latest/tests/drivers/pinctrl/api/src/
Dpinctrl_soc.h4 * SPDX-License-Identifier: Apache-2.0
39 * @name Test pinctrl pull-up/down.
43 /** Pull-up disabled. */
45 /** Pull-down enabled. */
47 /** Pull-up enabled. */
55 * @param pincfg Pin configuration bit field.
57 #define TEST_GET_PULL(pincfg) (((pincfg) >> TEST_PULL_POS) & TEST_PULL_MSK) argument
62 * @param pincfg Pin configuration bit field.
64 #define TEST_GET_PIN(pincfg) (((pincfg) >> TEST_PIN_POS) & TEST_PIN_MSK) argument
74 * @param node_id Node identifier.
[all …]
/Zephyr-latest/drivers/mdio/
Dmdio_renesas_ra.c4 * SPDX-License-Identifier: Apache-2.0
24 const struct pinctrl_dev_config *pincfg; member
37 struct renesas_ra_mdio_data *dev_data = dev->data; in renesas_ra_mdio_read()
41 dev_data->ether_phy_ctrl.phy_lsi_address = prtad; in renesas_ra_mdio_read()
43 k_mutex_lock(&dev_data->rw_mutex, K_FOREVER); in renesas_ra_mdio_read()
45 err = R_ETHER_PHY_Read(&dev_data->ether_phy_ctrl, regad, &read); in renesas_ra_mdio_read()
47 k_mutex_unlock(&dev_data->rw_mutex); in renesas_ra_mdio_read()
50 return -EIO; in renesas_ra_mdio_read()
61 struct renesas_ra_mdio_data *dev_data = dev->data; in renesas_ra_mdio_write()
64 dev_data->ether_phy_ctrl.phy_lsi_address = prtad; in renesas_ra_mdio_write()
[all …]
/Zephyr-latest/soc/st/stm32/common/
Dpinctrl_soc.h5 * SPDX-License-Identifier: Apache-2.0
20 #include <zephyr/dt-bindings/pinctrl/stm32f1-pinctrl.h>
22 #include <zephyr/dt-bindings/pinctrl/stm32-pinctrl.h>
36 uint32_t pincfg; member
42 * @param node_id Node identifier.
60 * @brief Utility macro to initialize pincfg field in #pinctrl_pin_t (F1).
62 * @param node_id Node identifier.
75 * @brief Utility macro to initialize pincfg field in #pinctrl_pin_t (non-F1).
77 * @param node_id Node identifier.
95 * @param node_id Node identifier.
[all …]
/Zephyr-latest/dts/bindings/test/
Dvnd,pinctrl.yaml2 # SPDX-License-Identifier: Apache-2.0
4 description: Test pin controller node
8 include: pincfg-node.yaml
/Zephyr-latest/dts/bindings/pinctrl/
Dnxp,port-pinmux.yaml1 description: NXP PORT pinmux node
3 compatible: "nxp,port-pinmux"
14 child-binding:
15 include: pincfg-node.yaml
Dsilabs,si32-pinctrl.yaml3 # SPDX-License-Identifier: Apache-2.0
6 Silabs Si32 pinctrl node
8 compatible: "silabs,si32-pinctrl"
11 - name: base.yaml
13 child-binding:
15 child-binding:
17 Si32 pin controller pin configuration node
20 - name: pincfg-node.yaml
21 property-allowlist:
22 - input-enable
[all …]
Dxlnx,pinctrl-zynqmp.yaml2 # SPDX-License-Identifier: Apache-2.0
5 Xilinx ZynqMP SoC pinctrl node. It allows configuration of pin assignments
10 compatible: "xlnx,pinctrl-zynqmp"
14 child-binding:
17 child-binding:
20 - name: pincfg-node.yaml
Drenesas,rzg-pinctrl.yaml3 # SPDX-License-Identifier: Apache-2.0
8 #include <zephyr/dt-bindings/pinctrl/renesas/pinctrl_rzg3s.h>
10 device-pinmux {
15 drive-strength = <1>;
18 device-spins {
20 input-enable;
22 drive-strength = <2>;
27 compatible: renesas,rzg-pinctrl
34 reg-names:
37 child-binding:
[all …]
Dmicrochip,xec-pinctrl.yaml3 # SPDX-License-Identifier: Apache-2.0
6 Microchip XEC Pin controller Node
7 Based on pincfg-node.yaml binding.
8 The MCHP XEC pin controller is a singleton node responsible for controlling
10 node to select peripheral pin functions.
12 The node has the 'pinctrl' node label set in your SoC's devicetree,
20 'pinctrl' node, as in the spi0 example shown at the end:
23 pins, such as the 'bias-pull-up' property in group 2. Here is a list of
26 - bias-disable: Disable pull-up/down (default behavior, not required).
27 - bias-pull-down: Enable pull-down resistor.
[all …]
Dmicrochip,mec5-pinctrl.yaml2 # SPDX-License-Identifier: Apache-2.0
5 Microchip XEC Pin controller Node
6 Based on pincfg-node.yaml binding.
7 The MCHP XEC pin controller is a singleton node responsible for controlling
9 node to select peripheral pin functions.
11 The node has the 'pinctrl' node label set in your SoC's devicetree,
19 'pinctrl' node, as in the spi0 example shown at the end:
22 pins, such as the 'bias-pull-up' property in group 2. Here is a list of
25 - bias-disable: Disable pull-up/down (default behavior, not required).
26 - bias-pull-down: Enable pull-down resistor.
[all …]
Dadi,max32-pinctrl.yaml1 # Copyright (c) 2023-2024 Analog Devices, Inc.
2 # SPDX-License-Identifier: Apache-2.0
5 MAX32 Pin controller Node
6 Based on pincfg-node.yaml binding.
8 Note: `bias-disable` are default pin configurations.
10 compatible: "adi,max32-pinctrl"
19 child-binding:
24 - name: pincfg-node.yaml
25 property-allowlist:
26 - bias-disable
[all …]
/Zephyr-latest/soc/gd/gd32/common/
Dpinctrl_soc.h4 * SPDX-License-Identifier: Apache-2.0
19 #include <dt-bindings/pinctrl/gd32-af.h>
21 #include <dt-bindings/pinctrl/gd32-afio.h>
33 * - 0-12: GD32_PINMUX_AF bit field.
34 * - 13-25: Reserved.
35 * - 26-31: Pin configuration bit field (@ref GD32_PINCFG).
38 * - 0-19: GD32_PINMUX_AFIO bit field.
39 * - 20-25: Reserved.
40 * - 26-31: Pin configuration bit field (@ref GD32_PINCFG).
47 * @param node_id Node identifier.
[all …]
/Zephyr-latest/include/zephyr/drivers/pinctrl/
Dpinctrl_soc_sam_common.h4 * SPDX-License-Identifier: Apache-2.0
17 #include <dt-bindings/pinctrl/atmel_sam_pinctrl.h>
28 * - 0-15: SAM pinmux bit field (@ref SAM_PINMUX).
29 * - 16-21: Pin flags bit field (@ref SAM_PINFLAGS).
30 * - 22-31: Reserved.
37 * @param node_id Node identifier.
62 * @param node_id Node identifier.
102 * @param pincfg pinctrl_soc_pin_t bit field value.
105 #define SAM_PINCTRL_FLAG_GET(pincfg, pos) \ argument
106 (((pincfg) >> pos) & SAM_PINCTRL_FLAG_MASK)
[all …]

1234