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Searched +full:periph +full:- +full:clock +full:- +full:config (Results 1 – 20 of 20) sorted by relevance

/Zephyr-latest/dts/arm/renesas/smartbond/
Dda1469x.dtsi3 * SPDX-License-Identifier: Apache-2.0
6 #include <arm/armv8-m.dtsi>
9 #include <zephyr/dt-bindings/gpio/gpio.h>
10 #include <zephyr/dt-bindings/adc/smartbond-adc.h>
11 #include <zephyr/dt-bindings/pinctrl/smartbond-pinctrl.h>
12 #include <zephyr/dt-bindings/dma/dma_smartbond.h>
17 zephyr,flash-controller = &flash_controller;
21 compatible = "zephyr,lvgl-pointer-input";
25 #address-cells = <1>;
26 #size-cells = <0>;
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/Zephyr-latest/dts/bindings/i2c/
Drenesas,smartbond-i2c.yaml3 compatible: "renesas,smartbond-i2c"
5 include: [i2c-controller.yaml, pinctrl-device.yaml]
14 periph-clock-config:
16 description: Peripheral clock register configuration (COM domain)
/Zephyr-latest/dts/bindings/spi/
Drenesas,smartbond-spi.yaml2 # SPDX-License-Identifier: Apache-2.0
6 compatible: "renesas,smartbond-spi"
8 include: [spi-controller.yaml, pinctrl-device.yaml]
17 periph-clock-config:
19 description: Peripheral clock register configuration (COM domain)
/Zephyr-latest/dts/bindings/serial/
Drenesas,smartbond-uart.yaml3 compatible: "renesas,smartbond-uart"
5 include: [uart-controller.yaml, pinctrl-device.yaml]
14 periph-clock-config:
16 description: Peripheral clock register configuration (COM domain)
19 current-speed:
24 - 4800
25 - 9600
26 - 14400
27 - 19200
28 - 28800
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/Zephyr-latest/dts/bindings/ospi/
Dst,stm32-ospi.yaml2 # SPDX-License-Identifier: Apache-2.0
9 pinctrl-0 = <&octospi_clk_pe9 &octospi_ncs_pe10 &octospi_dqs_pe11
16 dma-names = "tx_rx";
21 compatible: "st,stm32-ospi"
23 include: [base.yaml, pinctrl-device.yaml]
34 pinctrl-0:
37 pinctrl-names:
40 clock-names:
50 - &dma1: dma controller phandle
51 - 5: channel number (0 to Max-Channel minus 1). From 0 to 15 on stm32u5x.
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/Zephyr-latest/drivers/i2c/
Di2c_ll_stm32.h5 * SPDX-License-Identifier: Apache-2.0
25 /* i2c peripheral clock in Hz */
60 /* Store the current timing structure set by runtime config */
98 uint16_t periph);
100 int i2c_stm32_runtime_configure(const struct device *dev, uint32_t config);
101 int i2c_stm32_get_config(const struct device *dev, uint32_t *config);
110 int i2c_stm32_target_register(const struct device *dev, struct i2c_target_config *config);
111 int i2c_stm32_target_unregister(const struct device *dev, struct i2c_target_config *config);
Di2c_ll_stm32_v2.c5 * SPDX-License-Identifier: Apache-2.0
28 #include "i2c-priv.h"
58 uint32_t lscl_min; /* Minimum low period of the SCL clock in ns */
59 uint32_t hscl_min; /* Minimum high period of SCL clock in ns */
124 const struct i2c_stm32_config *cfg = dev->config; in msg_init()
125 struct i2c_stm32_data *data = dev->data; in msg_init()
126 I2C_TypeDef *i2c = cfg->i2c; in msg_init()
129 LL_I2C_SetTransferSize(i2c, msg->len); in msg_init()
131 if (I2C_ADDR_10_BITS & data->dev_config) { in msg_init()
141 if (!(msg->flags & I2C_MSG_STOP) && next_msg_flags && in msg_init()
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Di2c_ll_stm32_v1.c2 * Copyright (c) 2017, I-SENSE group of ICCS
5 * SPDX-License-Identifier: Apache-2.0
25 #include "i2c-priv.h"
50 const struct i2c_stm32_config *cfg = dev->config; in stm32_i2c_disable_transfer_interrupts()
51 struct i2c_stm32_data *data = dev->data; in stm32_i2c_disable_transfer_interrupts()
52 I2C_TypeDef *i2c = cfg->i2c; in stm32_i2c_disable_transfer_interrupts()
59 if (!data->smbalert_active) { in stm32_i2c_disable_transfer_interrupts()
66 const struct i2c_stm32_config *cfg = dev->config; in stm32_i2c_enable_transfer_interrupts()
67 I2C_TypeDef *i2c = cfg->i2c; in stm32_i2c_enable_transfer_interrupts()
78 const struct i2c_stm32_config *cfg = dev->config; in stm32_i2c_reset()
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/Zephyr-latest/soc/nxp/imxrt/imxrt10xx/
Dlpm_rt1064.c4 * SPDX-License-Identifier: Apache-2.0
16 * Clock configuration structures populated at boot time. These structures are
63 /* Clock switch need Handshake? */ in clock_set_mux()
66 while ((CCM->CDHIPR & ((1UL << busy_shift))) != 0UL) { in clock_set_mux()
85 /* Clock switch need Handshake? */ in clock_set_div()
88 while ((CCM->CDHIPR & ((uint32_t)(1UL << busy_shift))) != 0UL) { in clock_set_div()
99 static void clock_init_usb1_pll(const clock_usb_pll_config_t *config) in clock_init_usb1_pll() argument
102 CCM_ANALOG->PLL_USB1 = (CCM_ANALOG->PLL_USB1 & (~CCM_ANALOG_PLL_USB1_BYPASS_CLK_SRC_MASK)) | in clock_init_usb1_pll()
103 CCM_ANALOG_PLL_USB1_BYPASS_MASK | CCM_ANALOG_PLL_USB1_BYPASS_CLK_SRC(config->src); in clock_init_usb1_pll()
105 CCM_ANALOG->PLL_USB1 = (CCM_ANALOG->PLL_USB1 & (~CCM_ANALOG_PLL_USB1_DIV_SELECT_MASK)) | in clock_init_usb1_pll()
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/Zephyr-latest/drivers/clock_control/
Dclock_stm32_ll_wba.c4 * SPDX-License-Identifier: Apache-2.0
38 static uint32_t get_bus_clock(uint32_t clock, uint32_t prescaler) in get_bus_clock() argument
40 return clock / prescaler; in get_bus_clock()
43 /** @brief Verifies clock is part of active clock configuration */
62 return -ENOTSUP; in enabled_clock()
73 if (IN_RANGE(pclken->bus, STM32_PERIPH_BUS_MIN, STM32_PERIPH_BUS_MAX) == 0) { in stm32_clock_control_on()
74 /* Attempt to toggle a wrong periph clock bit */ in stm32_clock_control_on()
75 return -ENOTSUP; in stm32_clock_control_on()
78 sys_set_bits(DT_REG_ADDR(DT_NODELABEL(rcc)) + pclken->bus, in stm32_clock_control_on()
79 pclken->enr); in stm32_clock_control_on()
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Dclock_stm32_ll_common.c2 * Copyright (c) 2017-2022 Linaro Limited.
5 * SPDX-License-Identifier: Apache-2.0
76 #define RCC_PLLP_ENABLE() SET_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLPEN)
81 #define RCC_PLLQ_ENABLE() SET_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQEN)
100 static uint32_t get_bus_clock(uint32_t clock, uint32_t prescaler) in get_bus_clock() argument
102 return clock / prescaler; in get_bus_clock()
119 /** @brief Verifies clock is part of active clock configuration */
136 r = -ENOTSUP; in enabled_clock()
150 r = -ENOTSUP; in enabled_clock()
157 r = -ENOTSUP; in enabled_clock()
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Dclock_stm32_ll_u5.c6 * SPDX-License-Identifier: Apache-2.0
39 static uint32_t get_bus_clock(uint32_t clock, uint32_t prescaler) in get_bus_clock() argument
41 return clock / prescaler; in get_bus_clock()
123 /** @brief Verifies clock is part of active clock configuration */
150 return -ENOTSUP; in enabled_clock()
161 if (IN_RANGE(pclken->bus, STM32_PERIPH_BUS_MIN, STM32_PERIPH_BUS_MAX) == 0) { in stm32_clock_control_on()
162 /* Attempt to toggle a wrong periph clock bit */ in stm32_clock_control_on()
163 return -ENOTSUP; in stm32_clock_control_on()
166 sys_set_bits(DT_REG_ADDR(DT_NODELABEL(rcc)) + pclken->bus, in stm32_clock_control_on()
167 pclken->enr); in stm32_clock_control_on()
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/Zephyr-latest/drivers/spi/
Dspi_ll_stm32.c4 * SPDX-License-Identifier: Apache-2.0
35 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
39 #include <zephyr/linker/linker-defs.h>
79 struct spi_stm32_data *data = dev->data; in spi_stm32_pm_policy_state_lock_get()
81 if (!data->pm_policy_state_on) { in spi_stm32_pm_policy_state_lock_get()
82 data->pm_policy_state_on = true; in spi_stm32_pm_policy_state_lock_get()
95 struct spi_stm32_data *data = dev->data; in spi_stm32_pm_policy_state_lock_put()
97 if (data->pm_policy_state_on) { in spi_stm32_pm_policy_state_lock_put()
98 data->pm_policy_state_on = false; in spi_stm32_pm_policy_state_lock_put()
119 * the linker to avoid potential DMA cache-coherency problems.
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Dspi_mcux_flexcomm.c5 * SPDX-License-Identifier: Apache-2.0
79 const struct spi_mcux_config *config = dev->config; in spi_mcux_transfer_next_packet() local
80 struct spi_mcux_data *data = dev->data; in spi_mcux_transfer_next_packet()
81 SPI_Type *base = config->base; in spi_mcux_transfer_next_packet()
82 struct spi_context *ctx = &data->ctx; in spi_mcux_transfer_next_packet()
86 if ((ctx->tx_len == 0) && (ctx->rx_len == 0)) { in spi_mcux_transfer_next_packet()
88 spi_context_cs_control(&data->ctx, false); in spi_mcux_transfer_next_packet()
89 spi_context_complete(&data->ctx, dev, 0); in spi_mcux_transfer_next_packet()
94 if (ctx->tx_len == 0) { in spi_mcux_transfer_next_packet()
97 transfer.rxData = ctx->rx_buf; in spi_mcux_transfer_next_packet()
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Dspi_mcux_lpspi.c4 * SPDX-License-Identifier: Apache-2.0
36 #define DEV_CFG(_dev) ((const struct spi_mcux_config *)(_dev)->config)
37 #define DEV_DATA(_dev) ((struct spi_mcux_data *)(_dev)->data)
97 struct spi_mcux_data *data = dev->data; in spi_mcux_isr()
100 LPSPI_MasterTransferHandleIRQ(LPSPI_IRQ_HANDLE_ARG, &data->handle); in spi_mcux_isr()
108 spi_context_update_tx(&data->ctx, 1, data->transfer_len); in spi_mcux_master_callback()
109 spi_context_update_rx(&data->ctx, 1, data->transfer_len); in spi_mcux_master_callback()
111 spi_mcux_transfer_next_packet(data->dev); in spi_mcux_master_callback()
116 struct spi_mcux_data *data = dev->data; in spi_mcux_transfer_next_packet()
118 struct spi_context *ctx = &data->ctx; in spi_mcux_transfer_next_packet()
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/Zephyr-latest/drivers/dma/
Ddma_stm32u5.c6 * SPDX-License-Identifier: Apache-2.0
48 const struct dma_stm32_config *config = dev->config; in dma_stm32_dump_stream_irq() local
49 DMA_TypeDef *dma = (DMA_TypeDef *)(config->base); in dma_stm32_dump_stream_irq()
56 const struct dma_stm32_config *config = dev->config; in dma_stm32_clear_stream_irq() local
57 DMA_TypeDef *dma = (DMA_TypeDef *)(config->base); in dma_stm32_clear_stream_irq()
227 return -EAGAIN; in stm32_dma_disable_stream()
238 /* same function to set periph/mem addresses */
249 const struct dma_stm32_config *config = dev->config; in dma_stm32_irq_handler() local
250 DMA_TypeDef *dma = (DMA_TypeDef *)(config->base); in dma_stm32_irq_handler()
254 __ASSERT_NO_MSG(id < config->max_streams); in dma_stm32_irq_handler()
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Ddma_stm32.c5 * SPDX-License-Identifier: Apache-2.0
72 const struct dma_stm32_config *config = dev->config; in dma_stm32_dump_stream_irq() local
73 DMA_TypeDef *dma = (DMA_TypeDef *)(config->base); in dma_stm32_dump_stream_irq()
80 const struct dma_stm32_config *config = dev->config; in dma_stm32_clear_stream_irq() local
81 DMA_TypeDef *dma = (DMA_TypeDef *)(config->base); in dma_stm32_clear_stream_irq()
90 const struct dma_stm32_config *config = dev->config; in dma_stm32_irq_handler() local
91 DMA_TypeDef *dma = (DMA_TypeDef *)(config->base); in dma_stm32_irq_handler()
95 __ASSERT_NO_MSG(id < config->max_streams); in dma_stm32_irq_handler()
97 stream = &config->streams[id]; in dma_stm32_irq_handler()
100 if ((stream->hal_override != true) && (stream->busy == false)) { in dma_stm32_irq_handler()
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Ddma_stm32_bdma.c4 * SPDX-License-Identifier: Apache-2.0
16 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
278 return -EAGAIN; in stm32_bdma_disable_channel()
288 const struct bdma_stm32_config *config = dev->config; in bdma_stm32_dump_channel_irq() local
289 BDMA_TypeDef *dma = (BDMA_TypeDef *)(config->base); in bdma_stm32_dump_channel_irq()
296 const struct bdma_stm32_config *config = dev->config; in bdma_stm32_clear_channel_irq() local
297 BDMA_TypeDef *dma = (BDMA_TypeDef *)(config->base); in bdma_stm32_clear_channel_irq()
306 const struct bdma_stm32_config *config = dev->config; in bdma_stm32_irq_handler() local
307 BDMA_TypeDef *dma = (BDMA_TypeDef *)(config->base); in bdma_stm32_irq_handler()
311 __ASSERT_NO_MSG(id < config->max_channels); in bdma_stm32_irq_handler()
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/Zephyr-latest/doc/releases/
Drelease-notes-3.2.rst13 * Added support for :ref:`bin-blobs` (also see :ref:`west-blobs`).
15 * Converted all supported boards from ``pinmux`` to :ref:`pinctrl-guide`.
31 * CVE-2022-2993: Under embargo until 2022-11-03
33 * CVE-2022-2741: Under embargo until 2022-10-14
56 This definition can be used by third-party code to compile code conditional
58 Therefore, any third-party code integrated using the Zephyr build system will
91 changed from ``-ENETDOWN`` to ``-ENETUNREACH``. A return value of ``-ENETDOWN`` now indicates
129 * Removed support for configuring the CAN-FD maximum DLC value via Kconfig
151 * STM32 LPTIM domain clock should now be configured using devicetree.
156 valid for specific bindings to specify like :dtcompatible:`gpio-leds` and
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Drelease-notes-3.3.rst14 * Introduced :ref:`USB-C <usbc_api>` device stack with PD (power delivery)
17 CMSIS-DSP as the default backend.
30 * CVE-2023-0359: Under embargo until 2023-04-20
32 * CVE-2023-0779: Under embargo until 2023-04-22
66 removed in favor of new :dtcompatible:`zephyr,flash-disk` devicetree binding.
71 * Starting from this release ``zephyr-`` prefixed tags won't be created
82 image states). Use of a truncated hash or non-sha256 hash will still work
88 registration function at boot-up. If applications register this then
93 application code, these will now automatically be registered at boot-up (this
129 This may cause out-of-tree scripts or commands to fail if they have relied
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