Lines Matching +full:periph +full:- +full:clock +full:- +full:config
6 * SPDX-License-Identifier: Apache-2.0
48 const struct dma_stm32_config *config = dev->config; in dma_stm32_dump_stream_irq() local
49 DMA_TypeDef *dma = (DMA_TypeDef *)(config->base); in dma_stm32_dump_stream_irq()
56 const struct dma_stm32_config *config = dev->config; in dma_stm32_clear_stream_irq() local
57 DMA_TypeDef *dma = (DMA_TypeDef *)(config->base); in dma_stm32_clear_stream_irq()
227 return -EAGAIN; in stm32_dma_disable_stream()
238 /* same function to set periph/mem addresses */
249 const struct dma_stm32_config *config = dev->config; in dma_stm32_irq_handler() local
250 DMA_TypeDef *dma = (DMA_TypeDef *)(config->base); in dma_stm32_irq_handler()
254 __ASSERT_NO_MSG(id < config->max_streams); in dma_stm32_irq_handler()
256 stream = &config->streams[id]; in dma_stm32_irq_handler()
258 if ((stream->hal_override != true) && (stream->busy == false)) { in dma_stm32_irq_handler()
268 /* The dma stream id is in range from STM32_DMA_STREAM_OFFSET..<dma-requests> */ in dma_stm32_irq_handler()
271 if (!stream->hal_override) { in dma_stm32_irq_handler()
274 stream->dma_callback(dev, stream->user_data, callback_arg, DMA_STATUS_BLOCK); in dma_stm32_irq_handler()
277 stream->busy = false; in dma_stm32_irq_handler()
279 if (!stream->hal_override) { in dma_stm32_irq_handler()
282 stream->dma_callback(dev, stream->user_data, callback_arg, DMA_STATUS_COMPLETE); in dma_stm32_irq_handler()
285 stream->busy = false; in dma_stm32_irq_handler()
288 stream->dma_callback(dev, stream->user_data, in dma_stm32_irq_handler()
289 callback_arg, -EIO); in dma_stm32_irq_handler()
297 return -EINVAL; in dma_stm32_get_priority()
319 return -EINVAL; in dma_stm32_get_direction()
335 return -EBUSY; in dma_stm32_disable_stream()
345 struct dma_config *config) in dma_stm32_configure() argument
347 const struct dma_stm32_config *dev_config = dev->config; in dma_stm32_configure()
349 &dev_config->streams[id - STM32_DMA_STREAM_OFFSET]; in dma_stm32_configure()
350 DMA_TypeDef *dma = (DMA_TypeDef *)dev_config->base; in dma_stm32_configure()
357 id = id - STM32_DMA_STREAM_OFFSET; in dma_stm32_configure()
359 if (id >= dev_config->max_streams) { in dma_stm32_configure()
361 return -EINVAL; in dma_stm32_configure()
364 if (stream->busy) { in dma_stm32_configure()
366 return -EBUSY; in dma_stm32_configure()
371 return -EBUSY; in dma_stm32_configure()
377 if (config->linked_channel == STM32_DMA_HAL_OVERRIDE) { in dma_stm32_configure()
382 stream->busy = true; in dma_stm32_configure()
383 stream->hal_override = true; in dma_stm32_configure()
384 stream->dma_callback = config->dma_callback; in dma_stm32_configure()
385 stream->user_data = config->user_data; in dma_stm32_configure()
389 if (config->head_block->block_size > DMA_STM32_MAX_DATA_ITEMS) { in dma_stm32_configure()
391 config->head_block->block_size); in dma_stm32_configure()
392 return -EINVAL; in dma_stm32_configure()
396 if (config->dest_data_size != config->source_data_size) { in dma_stm32_configure()
398 return -EINVAL; in dma_stm32_configure()
401 if (config->source_data_size != 4U && in dma_stm32_configure()
402 config->source_data_size != 2U && in dma_stm32_configure()
403 config->source_data_size != 1U) { in dma_stm32_configure()
405 config->source_data_size); in dma_stm32_configure()
406 return -EINVAL; in dma_stm32_configure()
412 if (config->head_block->source_reload_en || in dma_stm32_configure()
413 config->head_block->dest_reload_en) { in dma_stm32_configure()
416 return -EINVAL; in dma_stm32_configure()
419 stream->busy = true; in dma_stm32_configure()
420 stream->dma_callback = config->dma_callback; in dma_stm32_configure()
421 stream->direction = config->channel_direction; in dma_stm32_configure()
422 stream->user_data = config->user_data; in dma_stm32_configure()
423 stream->src_size = config->source_data_size; in dma_stm32_configure()
424 stream->dst_size = config->dest_data_size; in dma_stm32_configure()
427 if (config->head_block->source_address == 0) { in dma_stm32_configure()
431 if (config->head_block->dest_address == 0) { in dma_stm32_configure()
435 DMA_InitStruct.SrcAddress = config->head_block->source_address; in dma_stm32_configure()
436 DMA_InitStruct.DestAddress = config->head_block->dest_address; in dma_stm32_configure()
440 ret = dma_stm32_get_priority(config->channel_priority, in dma_stm32_configure()
446 ret = dma_stm32_get_direction(config->channel_direction, in dma_stm32_configure()
453 switch (config->head_block->source_addr_adj) { in dma_stm32_configure()
461 return -ENOTSUP; in dma_stm32_configure()
464 config->head_block->source_addr_adj); in dma_stm32_configure()
465 return -EINVAL; in dma_stm32_configure()
471 switch (config->head_block->dest_addr_adj) { in dma_stm32_configure()
479 return -ENOTSUP; in dma_stm32_configure()
481 LOG_ERR("Periph increment error. %d", in dma_stm32_configure()
482 config->head_block->dest_addr_adj); in dma_stm32_configure()
483 return -EINVAL; in dma_stm32_configure()
488 stream->source_periph = (stream->direction == PERIPHERAL_TO_MEMORY); in dma_stm32_configure()
491 int index = find_lsb_set(config->source_data_size) - 1; in dma_stm32_configure()
495 index = find_lsb_set(config->dest_data_size) - 1; in dma_stm32_configure()
498 DMA_InitStruct.BlkDataLength = config->head_block->block_size; in dma_stm32_configure()
501 DMA_InitStruct.Request = config->dma_slot; in dma_stm32_configure()
510 /* Enable Half-Transfer irq if circular mode is enabled */ in dma_stm32_configure()
511 if (config->head_block->source_reload_en) { in dma_stm32_configure()
522 const struct dma_stm32_config *config = dev->config; in dma_stm32_reload() local
523 DMA_TypeDef *dma = (DMA_TypeDef *)(config->base); in dma_stm32_reload()
527 id = id - STM32_DMA_STREAM_OFFSET; in dma_stm32_reload()
529 if (id >= config->max_streams) { in dma_stm32_reload()
530 return -EINVAL; in dma_stm32_reload()
533 stream = &config->streams[id]; in dma_stm32_reload()
536 return -EBUSY; in dma_stm32_reload()
539 if (stream->direction > PERIPHERAL_TO_MEMORY) { in dma_stm32_reload()
540 return -EINVAL; in dma_stm32_reload()
550 stream->busy = true; in dma_stm32_reload()
559 const struct dma_stm32_config *config = dev->config; in dma_stm32_start() local
560 DMA_TypeDef *dma = (DMA_TypeDef *)(config->base); in dma_stm32_start()
564 id = id - STM32_DMA_STREAM_OFFSET; in dma_stm32_start()
567 if (id >= config->max_streams) { in dma_stm32_start()
568 return -EINVAL; in dma_stm32_start()
577 stream = &config->streams[id]; in dma_stm32_start()
578 stream->busy = true; in dma_stm32_start()
589 const struct dma_stm32_config *config = dev->config; in dma_stm32_suspend() local
590 DMA_TypeDef *dma = (DMA_TypeDef *)(config->base); in dma_stm32_suspend()
593 id = id - STM32_DMA_STREAM_OFFSET; in dma_stm32_suspend()
595 if (id >= config->max_streams) { in dma_stm32_suspend()
596 return -EINVAL; in dma_stm32_suspend()
612 const struct dma_stm32_config *config = dev->config; in dma_stm32_resume() local
613 DMA_TypeDef *dma = (DMA_TypeDef *)(config->base); in dma_stm32_resume()
616 id = id - STM32_DMA_STREAM_OFFSET; in dma_stm32_resume()
618 if (id >= config->max_streams) { in dma_stm32_resume()
619 return -EINVAL; in dma_stm32_resume()
630 const struct dma_stm32_config *config = dev->config; in dma_stm32_stop() local
631 struct dma_stm32_stream *stream = &config->streams[id - STM32_DMA_STREAM_OFFSET]; in dma_stm32_stop()
632 DMA_TypeDef *dma = (DMA_TypeDef *)(config->base); in dma_stm32_stop()
635 id = id - STM32_DMA_STREAM_OFFSET; in dma_stm32_stop()
637 if (id >= config->max_streams) { in dma_stm32_stop()
638 return -EINVAL; in dma_stm32_stop()
641 if (stream->hal_override) { in dma_stm32_stop()
642 stream->busy = false; in dma_stm32_stop()
660 stream->busy = false; in dma_stm32_stop()
667 const struct dma_stm32_config *config = dev->config; in dma_stm32_init() local
671 (clock_control_subsys_t) &config->pclken) != 0) { in dma_stm32_init()
672 LOG_ERR("clock op failed\n"); in dma_stm32_init()
673 return -EIO; in dma_stm32_init()
676 config->config_irq(dev); in dma_stm32_init()
678 for (uint32_t i = 0; i < config->max_streams; i++) { in dma_stm32_init()
679 config->streams[i].busy = false; in dma_stm32_init()
682 ((struct dma_stm32_data *)dev->data)->dma_ctx.magic = 0; in dma_stm32_init()
683 ((struct dma_stm32_data *)dev->data)->dma_ctx.dma_channels = 0; in dma_stm32_init()
684 ((struct dma_stm32_data *)dev->data)->dma_ctx.atomic = 0; in dma_stm32_init()
692 const struct dma_stm32_config *config = dev->config; in dma_stm32_get_status() local
693 DMA_TypeDef *dma = (DMA_TypeDef *)(config->base); in dma_stm32_get_status()
697 id = id - STM32_DMA_STREAM_OFFSET; in dma_stm32_get_status()
698 if (id >= config->max_streams) { in dma_stm32_get_status()
699 return -EINVAL; in dma_stm32_get_status()
702 stream = &config->streams[id]; in dma_stm32_get_status()
703 stat->pending_length = LL_DMA_GetBlkDataLength(dma, dma_stm32_id_to_stream(id)); in dma_stm32_get_status()
704 stat->dir = stream->direction; in dma_stm32_get_status()
705 stat->busy = stream->busy; in dma_stm32_get_status()
712 .config = dma_stm32_configure,