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/Zephyr-latest/dts/bindings/clock/
Dnordic,nrf-hsfll-local.yaml2 # SPDX-License-Identifier: Apache-2.0
7 The local HSFLL mixed-mode IP generates several clock frequencies in the range
13 compatible = "nordic,nrf-hsfll-local";
16 clock-frequency = <DT_FREQ_M(320)>;
20 nordic,ficr-names = "vsup", "coarse", "fine";
25 compatible: "nordic,nrf-hsfll-local"
27 include: [base.yaml, fixed-clock.yaml, nordic-nrf-ficr-client.yaml]
36 clock-frequency:
38 - 64000000
39 - 80000000
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Dlitex,clkout.yaml2 # SPDX-License-Identifier: Apache-2.0
7 LiteX Mixed Mode Clock Manager clock output binding
13 "#clock-cells":
22 clock-output-names:
28 litex,clock-frequency:
34 litex,clock-phase:
40 litex,clock-duty-num:
46 litex,clock-duty-den:
52 litex,clock-margin:
58 litex,clock-margin-exp:
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Dlitex,clk.yaml2 # SPDX-License-Identifier: Apache-2.0
4 include: [clock-controller.yaml, base.yaml]
7 LiteX Mixed Mode Clock Manager
14 clock-cells:
15 - id
22 "#clock-cells":
26 clock-output-names:
28 type: string-array
33 litex,lock-timeout:
38 litex,drdy-timeout:
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/Zephyr-latest/cmake/ide/
Declipse_cdt4_generator_amendment.cmake1 # SPDX-License-Identifier: Apache-2.0
17 #2. Eclipse CDT4 indexer has problems with CMake 'Eclipse CDT4 - x'
18 # generator projects that use mixed C/C++.
22 # The root cause of the problem is the g++ built-in __cplusplus macro,
25 # In mixed C/C++ projects, the header files often contain the following
56 # 1 - work mode: "C and CXX includes, defines in .cproject without __cplusplus"
57 # 2 - work mode: "C and CXX includes, defines in .cproject with __cplusplus"
58 # 5 - work mode: "C and CXX includes, defines in Eclipse with project defines"
64 ## 3 - work mode: "C and CXX includes, defines in .settings - [EXPERIMENTAL]"
65 ## 4 - work mode: "C and CXX includes, defines in .settings with project defines - [EXPERIMENTAL]"
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/Zephyr-latest/include/zephyr/
Dsyscall.h4 * SPDX-License-Identifier: Apache-2.0
30 * - Kernel-only code, or CONFIG_USERSPACE disabled, these inlines will
32 * - User-only code, these inlines will marshal parameters and elevate
34 * - Mixed or indeterminate code, these inlines will do a runtime check
41 * - The handler function will be named z_vrfy_k_foo(). Handler
45 * more information. - The implementation function will be named
54 * These are kernel-side skeleton functions for system calls. They are
57 * - Any kernel object or device pointers are validated with _SYSCALL_IS_OBJ()
58 * - Any memory buffers passed in are checked to ensure that the calling thread
60 * - Many kernel calls do no sanity checking of parameters other than
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/Zephyr-latest/scripts/ci/
Dpylintrc2 # SPDX-License-Identifier: Apache-2.0
8 # pylint3 --rcfile=ci-tools/scripts/pylintrc <Python file>
12 # pylint3 --rcfile=ci-tools/scripts/pylintrc $(git ls-files '*.py')
35 # 'pylint3 --list-msgs' to list messages and their IDs.
39 # no-member
40 # arguments-differ
41 # redefine-in-handler
42 # abstract-method
46 # no-else-return
47 # consider-using-get
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/Zephyr-latest/samples/drivers/clock_control_litex/
DREADME.rst1 .. zephyr:code-sample:: clock-control-litex
3 :relevant-api: clock_control_interface
11 The driver uses Mixed Mode Clock Manager (MMCM) module to generate up to 7 clocks with defined phas…
15 * LiteX-capable FPGA platform with MMCM modules (for example Digilent Arty A7 development board)
16 * SoC configuration with VexRiscv soft CPU and Xilinx 7-series MMCM interface in LiteX (S7MMCM modu…
23 .. literalinclude:: ../../../dts/riscv/riscv32-litex-vexriscv.dtsi
25 :start-at: clk0: clock-controller@0 {
26 :end-at: };
29 .. literalinclude:: ../../../dts/riscv/riscv32-litex-vexriscv.dtsi
31 :start-at: clk1: clock-controller@1 {
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/Zephyr-latest/doc/develop/languages/cpp/
Dindex.rst6 C++ is a general-purpose object-oriented programming language that is based on
49 * OS-specific C++ standard library classes (e.g. ``std::thread``,
86 the applications that implement their own (non-standard) class library and do
101 pre-built C++ standard library included in the C++ compiler toolchain.
103 To enable C++ standard library, select an applicable toolchain-specific C++
141 These compatibility issues affect header files dis-proportionally. Not
145 headers organization`_ that is typical in real-world projects. So, header
154 practices" and lessons learned in a Zephyr-specific context. While a lot
155 of the information here is not Zephyr-specific, this section is not a
160 -------
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/Zephyr-latest/drivers/can/
Dcan_rcar.c4 * SPDX-License-Identifier: Apache-2.0
24 #define RCAR_CAN_CTLR_BOM (3 << 11) /* Bus-Off Recovery Mode Bits */
25 #define RCAR_CAN_CTLR_BOM_ENT BIT(11) /* Automatic halt mode entry at bus-off entry */
30 #define RCAR_CAN_CTLR_MLM BIT(3) /* Message Lost Mode Select */
31 #define RCAR_CAN_CTLR_IDFM (3 << 1) /* ID Format Mode Select Bits */
32 #define RCAR_CAN_CTLR_IDFM_MIXED BIT(2) /* Mixed ID mode */
33 #define RCAR_CAN_CTLR_MBM BIT(0) /* Mailbox Mode select */
116 #define RCAR_CAN_ECSR_EDPM BIT(7) /* Error Display Mode Select */
127 #define RCAR_CAN_TCR_TSTE BIT(0) /* Test Mode Enable Bit*/
136 #define RCAR_CAN_EIFR_BORIF BIT(4) /* Bus-Off Recovery Detect Flag */
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/Zephyr-latest/tests/drivers/can/api/src/
Dcanfd.c5 * SPDX-License-Identifier: Apache-2.0
27 zassert_equal(frame->id, TEST_CAN_STD_ID_1, "ID does not match"); in tx_std_callback_1()
37 zassert_equal(frame->id, TEST_CAN_STD_ID_2, "ID does not match"); in tx_std_callback_2()
100 zassert_not_equal(err, -EBUSY, "arbitration lost in loopback mode"); in send_test_frame()
120 zassert_not_equal(err, -EBUSY, "arbitration lost in loopback mode"); in send_test_frame_nowait()
137 zassert_not_equal(filter_id, -ENOSPC, "no filters available"); in add_rx_msgq()
161 zassert_not_equal(filter_id, -ENOSPC, "no filters available"); in add_rx_filter()
196 if ((frame1->flags & CAN_FRAME_FDF) != 0) { in send_receive()
202 if ((frame2->flags & CAN_FRAME_FDF) != 0) { in send_receive()
238 "CAN FD loopback mode not supported"); in ZTEST()
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/Zephyr-latest/drivers/i3c/
Di3c_stm32.c4 * SPDX-License-Identifier: Apache-2.0
133 size_t ccc_target_idx; /* Current target index, used for filling C-FIFO */
163 * Determine I3C bus mode from the i2c devices on the bus.
166 * Mode.
174 enum i3c_bus_mode mode = I3C_BUS_MODE_PURE; in i3c_bus_mode() local
176 for (int i = 0; i < dev_list->num_i2c; i++) { in i3c_bus_mode()
177 switch (I3C_LVR_I2C_DEV_IDX(dev_list->i2c[i].lvr)) { in i3c_bus_mode()
179 if (mode < I3C_BUS_MODE_MIXED_FAST) { in i3c_bus_mode()
180 mode = I3C_BUS_MODE_MIXED_FAST; in i3c_bus_mode()
184 if (mode < I3C_BUS_MODE_MIXED_LIMITED) { in i3c_bus_mode()
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Di3c_mcux.c6 * SPDX-License-Identifier: Apache-2.0
129 * @param reg Pointer to 32-bit Register.
135 * @retval -ETIMEDOUT Timedout without matching.
143 * quickly (some sub-microseconds) so no extra in reg32_poll_timeout()
147 return -ETIMEDOUT; in reg32_poll_timeout()
155 * @param reg Pointer to 32-bit Register.
173 * @param reg Pointer to 32-bit register.
190 * @param reg Pointer to 32-bit register.
209 uint32_t intmask = base->MINTSET; in mcux_i3c_interrupt_disable()
211 base->MINTCLR = intmask; in mcux_i3c_interrupt_disable()
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/Zephyr-latest/tests/bsim/bluetooth/mesh/src/
Dtest_blob.c4 * SPDX-License-Identifier: Apache-2.0
39 .option = "use-pull-mode", in test_args_parse()
40 .descript = "Set transfer type to pull mode" in test_args_parse()
46 .option = "msg-fail-type", in test_args_parse()
52 .name = "{inactive, start, wait-block, wait-chunk, complete, suspended}", in test_args_parse()
53 .option = "expected-phase", in test_args_parse()
63 enum bt_mesh_blob_io_mode mode) in blob_io_open() argument
79 partial_block += chunk->size; in blob_chunk_wr()
80 ASSERT_TRUE_MSG(partial_block <= block->size, "Received block is too large\n"); in blob_chunk_wr()
83 if (partial_block == block->size) { in blob_chunk_wr()
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/Zephyr-latest/doc/releases/
Drelease-notes-3.7.rst10 This release is the last non-maintenance 3.x release and, as such, will be the next
18 * A long-awaited :ref:`HTTP Server <http_server_interface>` library, and associated service API,
21 * :ref:`POSIX support <posix_support>` has been extended, with most Options of the IEEE 1003-2017
25 * Bluetooth Host has been extended with support for the Nordic UART Service (NUS), Hands-free Audio
29 :ref:`read-then-decode approach <sensor-read-and-decode>` that enables more types of sensors and
35 * Trusted Firmware-M (TF-M) 2.1.0 and Mbed TLS 3.6.0 have been integrated into Zephyr.
39 1588) allows to synchronize time across devices with sub-microsecond accuracy.
52 * 1-Wire
71 :ref:`pinctrl-guide` for more details.
88 * CVE-2024-3077 `Zephyr project bug tracker GHSA-gmfv-4vfh-2mh8
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Drelease-notes-3.1.rst32 * Disk Subsystem: SPI mode SD cards now use the SD subsystem to communicate
61 * Split CAN classic and CAN-FD APIs:
68 * Converted the ``enum can_mode`` into a ``can_mode_t`` bitfield and renamed the CAN mode
90 was moved from Kconfig to :ref:`devicetree <dt-guide>`.
91 See the :dtcompatible:`st,stm32f1-pinctrl` devicetree binding for more information.
182 * MIPI-DSI
184 * Added a :ref:`MIPI-DSI api <mipi_dsi_api>`. This is an experimental API,
196 * Added support for enabling/disabling CAN-FD mode at runtime using :c:macro:`CAN_MODE_FD`.
220 * Added support for Provisioners over PB-GATT
231 * Implemented ISO-AL TX unframed fragmentation
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Drelease-notes-3.2.rst13 * Added support for :ref:`bin-blobs` (also see :ref:`west-blobs`).
15 * Converted all supported boards from ``pinmux`` to :ref:`pinctrl-guide`.
31 * CVE-2022-2993: Under embargo until 2022-11-03
33 * CVE-2022-2741: Under embargo until 2022-10-14
56 This definition can be used by third-party code to compile code conditional
58 Therefore, any third-party code integrated using the Zephyr build system will
91 changed from ``-ENETDOWN`` to ``-ENETUNREACH``. A return value of ``-ENETDOWN`` now indicates
123 * Removed support for enabling passthrough mode on MPU9150 to
129 * Removed support for configuring the CAN-FD maximum DLC value via Kconfig
156 valid for specific bindings to specify like :dtcompatible:`gpio-leds` and
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Drelease-notes-3.3.rst14 * Introduced :ref:`USB-C <usbc_api>` device stack with PD (power delivery)
17 CMSIS-DSP as the default backend.
30 * CVE-2023-0359: Under embargo until 2023-04-20
32 * CVE-2023-0779: Under embargo until 2023-04-22
66 removed in favor of new :dtcompatible:`zephyr,flash-disk` devicetree binding.
71 * Starting from this release ``zephyr-`` prefixed tags won't be created
82 image states). Use of a truncated hash or non-sha256 hash will still work
88 registration function at boot-up. If applications register this then
93 application code, these will now automatically be registered at boot-up (this
129 This may cause out-of-tree scripts or commands to fail if they have relied
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Drelease-notes-2.6.rst13 * Added support for 64-bit ARCv3
14 * Split ARM32 and ARM64, ARM64 is now a top-level architecture
15 * Added initial support for Arm v8.1-m and Cortex-M55
22 https://github.com/zephyrproject-rtos/example-application
34 * CVE-2021-3581: Under embargo until 2021-09-04
41 <https://github.com/zephyrproject-rtos/zephyr/issues?q=is%3Aissue+is%3Aopen+label%3Abug>`_.
46 * Driver APIs now return ``-ENOSYS`` if optional functions are not implemented.
47 If the feature is not supported by the hardware ``-ENOTSUP`` will be returned.
48 Formerly ``-ENOTSUP`` was returned for both failure modes, meaning this change
194 * Added support for null pointer dereferencing detection in Cortex-M.
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Drelease-notes-2.7.rst17 * Support for M-Profile Vector Extensions (MVE) on ARMv8.1-M
18 * Improved thread safety for Newlib and C++ on SMP-capable systems
20 * New Action-based Power Management API
23 * Linker Support for Tightly-Coupled Memory in RISC-V
25 * Support for extended PCI / PCIe capabilities, improved MIS-X support
33 * The kernel now supports both 32- and 64-bit architectures
36 * We added support for Point-to-Point Protocol (PPP)
37 * We added support for UpdateHub, an end-to-end solution for over-the-air device updates
38 * We added support for ARM Cortex-R Architecture
40 * Expanded support for ARMv6-M architecture
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/Zephyr-latest/dts/bindings/
Dvendor-prefixes.txt5 # before using them to avoid name-space collisions.
9 # Non-empty lines should be in this format:
11 # <vendor-prefix><TAB><Full name of vendor>
13 # zephyr-keep-sorted-start
27 active-semi Active-Semi International Inc
45 alt Altus-Escon-Company BV
57 amstaos AMS-Taos Inc.
60 anvo Anvo-Systems Dresden GmbH
78 asahi-kasei Asahi Kasei Corp.
157 csky Hangzhou C-SKY Microsystems Co., Ltd
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/Zephyr-latest/drivers/ethernet/dwc_xgmac/
Deth_dwc_xgmac_priv.h7 * SPDX-License-Identifier: Apache-2.0
467 * the EDMA starts pre-fetching the TxDMA descriptors
471 * the EDMA starts pre-fetching the RxDMA descriptors
474 /* Mixed burst: AXI master can perform burst transfers that are equal to or
492 /* Address-Aligned Beats. When this bit is set to 1, the AXI master performs
493 * address-aligned burst transfers on Read and Write channels
496 /* Enhanced Address Mode Enable: e DMA engine uses either the 40- or 48-bit address,
519 * programmed to a non-zero value (when split header feature is not enabled).
579 * the MAC Receiver based on the DMA channel number programmed in the L3-L4 filter
590 * blocks of 256 bytes. Range 0 - 63
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/Zephyr-latest/include/zephyr/sys/
Dutil.h2 * Copyright (c) 2011-2014, Wind River Systems, Inc.
4 * SPDX-License-Identifier: Apache-2.0
40 * @defgroup sys-util Utility Functions
80 (((~0UL) - (1UL << (l)) + 1) & (~0UL >> (BITS_PER_LONG - 1 - (h))))
83 * @brief Create a contiguous 64-bit bitmask starting at bit position @p l
87 (((~0ULL) - (1ULL << (l)) + 1) & (~0ULL >> (BITS_PER_LONG_LONG - 1 - (h))))
89 /** @brief 0 if @p cond is true-ish; causes a compile error otherwise. */
90 #define ZERO_OR_COMPILE_ERROR(cond) ((int) sizeof(char[1 - 2 * !(cond)]) - 1)
94 /* The built-in function used below for type checking in C is not
152 * in that it also ensures that @p ptr is aligned to an array-element boundary
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/Zephyr-latest/boards/adi/max32675evkit/doc/
Dindex.rst6 the MAX32675 microcontroller, which is a highly integrated, mixed-signal, ultralow-power
7 microcontroller designed for industrial and medical sensors. It contains an integrated, low-power
16 - MAX32675 MCU:
18 - Low-Power, High-Performance for IndustrialApplications
20 - 100MHz Arm Cortex-M4 with FPU
21 - 384KB Internal Flash
22 - 160KB SRAM
23 - 128kB ECC Enabled
24 - 44.1μA/MHz ACTIVE Mode at 0.9V up to 12MHzCoremark®
25 - 64.5μA/MHz ACTIVE Mode at 1.1V up to 100MHzCoremark
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